1 From 30abd0e5f27bc57fba7084ba51aca671316b6d24 Mon Sep 17 00:00:00 2001
2 From: Samuel Holland <samuel@sholland.org>
3 Date: Sun, 7 Aug 2022 10:50:21 -0500
4 Subject: [PATCH 095/117] dt-bindings: display: sun6i-dsi: Add the A100 variant
6 The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the
7 same register layout as previous SoC integrations. However, its module
8 clock now comes from the TCON, which means it no longer runs at a fixed
9 rate, so this needs to be distinguished in the driver.
11 The controller also now uses pins on Port D instead of dedicated pins,
12 so it drops the separate power domain.
15 Removal of the vcc-dsi-supply is maybe a bit questionable. Since there
16 is no "VCC-DSI" pin anymore, it's not obvious which pin actually does
17 power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO
18 or VCC-LVDS. So far, all boards have all of these as always-on supplies,
19 so it is hard to test.
22 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
23 Signed-off-by: Samuel Holland <samuel@sholland.org>
25 .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++----
26 1 file changed, 23 insertions(+), 5 deletions(-)
28 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
29 +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
30 @@ -12,9 +12,14 @@ maintainers:
35 - - allwinner,sun6i-a31-mipi-dsi
36 - - allwinner,sun50i-a64-mipi-dsi
39 + - allwinner,sun6i-a31-mipi-dsi
40 + - allwinner,sun50i-a64-mipi-dsi
41 + - allwinner,sun50i-a100-mipi-dsi
43 + - const: allwinner,sun20i-d1-mipi-dsi
44 + - const: allwinner,sun50i-a100-mipi-dsi
48 @@ -59,7 +64,6 @@ required:
56 @@ -68,7 +72,9 @@ allOf:
60 - const: allwinner,sun6i-a31-mipi-dsi
62 + - allwinner,sun6i-a31-mipi-dsi
63 + - allwinner,sun50i-a100-mipi-dsi
67 @@ -83,6 +89,18 @@ allOf:
76 + - allwinner,sun6i-a31-mipi-dsi
77 + - allwinner,sun50i-a64-mipi-dsi
83 unevaluatedProperties: false