1 From 860005c1a2f16aaa33458a7d80c9728b710ae292 Mon Sep 17 00:00:00 2001
2 From: Linus Walleij <linus.walleij@linaro.org>
3 Date: Mon, 6 Nov 2017 00:05:28 +0100
4 Subject: [PATCH 23/31] ARM: dts: Add ethernet to the Gemini SoC
6 This adds the Gemini ethernet node to the Gemini SoC.
8 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
10 arch/arm/boot/dts/gemini.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++-
11 1 file changed, 43 insertions(+), 1 deletion(-)
13 --- a/arch/arm/boot/dts/gemini.dtsi
14 +++ b/arch/arm/boot/dts/gemini.dtsi
18 gmii_default_pins: pinctrl-gmii {
20 + * Only activate GMAC0 by default since
21 + * GMAC1 will overlap with 8 GPIO lines
22 + * gpio2a, gpio2b. Overlay groups with
23 + * "gmii_gmac0_grp", "gmii_gmac1_grp" for
24 + * both ethernet interfaces.
29 + groups = "gmii_gmac0_grp";
32 pci_default_pins: pinctrl-pci {
38 + compatible = "cortina,gemini-ethernet";
39 + reg = <0x60000000 0x4000>, /* Global registers, queue */
40 + <0x60004000 0x2000>, /* V-bit */
41 + <0x60006000 0x2000>; /* A-bit */
42 + pinctrl-names = "default";
43 + pinctrl-0 = <&gmii_default_pins>;
44 + status = "disabled";
45 + #address-cells = <1>;
49 + gmac0: ethernet-port@0 {
50 + compatible = "cortina,gemini-ethernet-port";
51 + reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
52 + <0x6000a000 0x2000>; /* Port 0 GMAC */
53 + interrupt-parent = <&intcon>;
54 + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
55 + resets = <&syscon GEMINI_RESET_GMAC0>;
56 + clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
57 + clock-names = "PCLK";
60 + gmac1: ethernet-port@1 {
61 + compatible = "cortina,gemini-ethernet-port";
62 + reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
63 + <0x6000e000 0x2000>; /* Port 1 GMAC */
64 + interrupt-parent = <&intcon>;
65 + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
66 + resets = <&syscon GEMINI_RESET_GMAC1>;
67 + clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
68 + clock-names = "PCLK";
73 compatible = "cortina,gemini-pata", "faraday,ftide010";
74 reg = <0x63000000 0x1000>;