1 From 1ff9a279dbeb0034929042faef186ce934474c2b Mon Sep 17 00:00:00 2001
2 From: Linus Walleij <linus.walleij@linaro.org>
3 Date: Fri, 21 Apr 2017 20:50:22 +0200
4 Subject: [PATCH 18/18] ARM: dts: Add the FOTG210 USB host to Gemini boards
6 This adds the FOTG210 USB host controller to the Gemini
7 device trees. In the main SoC DTSI it is flagged as disabled
8 and then it is selectively enabled on the devices that utilize
11 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
14 - Rebased to kernel v4.19-rc1
15 - Drop pinctrl-0 handle from the second USB port
16 - Add comment on how to deal with the USB pin control
18 arch/arm/boot/dts/gemini-dlink-dir-685.dts | 8 ++++++
19 arch/arm/boot/dts/gemini-nas4220b.dts | 8 ++++++
20 arch/arm/boot/dts/gemini-rut1xx.dts | 20 ++++++++++++++
21 arch/arm/boot/dts/gemini-sl93512r.dts | 8 ++++++
22 arch/arm/boot/dts/gemini-sq201.dts | 8 ++++++
23 arch/arm/boot/dts/gemini-wbd111.dts | 8 ++++++
24 arch/arm/boot/dts/gemini-wbd222.dts | 8 ++++++
25 arch/arm/boot/dts/gemini.dtsi | 32 ++++++++++++++++++++++
26 8 files changed, 100 insertions(+)
28 diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
29 index 850a605124eb..848b16375873 100644
30 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
31 +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
46 diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
47 index 963ea890c87f..53b65ebe8454 100644
48 --- a/arch/arm/boot/dts/gemini-nas4220b.dts
49 +++ b/arch/arm/boot/dts/gemini-nas4220b.dts
64 diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
65 index eb4f0bf074da..b2354c215a84 100644
66 --- a/arch/arm/boot/dts/gemini-rut1xx.dts
67 +++ b/arch/arm/boot/dts/gemini-rut1xx.dts
69 /* Not used in this platform */
78 + phy-handle = <&phy0>;
81 + /* Not used in this platform */
94 diff --git a/arch/arm/boot/dts/gemini-sl93512r.dts b/arch/arm/boot/dts/gemini-sl93512r.dts
95 index ebefb7297379..2bb953440793 100644
96 --- a/arch/arm/boot/dts/gemini-sl93512r.dts
97 +++ b/arch/arm/boot/dts/gemini-sl93512r.dts
112 diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
113 index c5bb24102b75..ecbc27d93b2d 100644
114 --- a/arch/arm/boot/dts/gemini-sq201.dts
115 +++ b/arch/arm/boot/dts/gemini-sq201.dts
130 diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts
131 index 29af86cd10f7..6831d2aed17a 100644
132 --- a/arch/arm/boot/dts/gemini-wbd111.dts
133 +++ b/arch/arm/boot/dts/gemini-wbd111.dts
135 /* Not used in this platform */
148 diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts
149 index 24e6ae3616f7..ed38d48ef5f6 100644
150 --- a/arch/arm/boot/dts/gemini-wbd222.dts
151 +++ b/arch/arm/boot/dts/gemini-wbd222.dts
153 phy-handle = <&phy1>;
166 diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
167 index eb752e9495de..8cf67b11751f 100644
168 --- a/arch/arm/boot/dts/gemini.dtsi
169 +++ b/arch/arm/boot/dts/gemini.dtsi
176 + compatible = "cortina,gemini-usb", "faraday,fotg210";
177 + reg = <0x68000000 0x1000>;
178 + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
179 + resets = <&syscon GEMINI_RESET_USB0>;
180 + clocks = <&syscon GEMINI_CLK_GATE_USB0>;
181 + clock-names = "PCLK";
183 + * This will claim pins for USB0 and USB1 at the same
184 + * time as they are using some common pins. If you for
185 + * some reason have a system using USB1 at 96000000 but
186 + * NOT using USB0 at 68000000 you wll have to add the
187 + * usb_default_pins to the USB controller at 96000000
188 + * in your .dts for the board.
190 + pinctrl-names = "default";
191 + pinctrl-0 = <&usb_default_pins>;
192 + syscon = <&syscon>;
193 + status = "disabled";
197 + compatible = "cortina,gemini-usb", "faraday,fotg210";
198 + reg = <0x69000000 0x1000>;
199 + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
200 + resets = <&syscon GEMINI_RESET_USB1>;
201 + clocks = <&syscon GEMINI_CLK_GATE_USB1>;
202 + clock-names = "PCLK";
203 + syscon = <&syscon>;
204 + status = "disabled";