1 From 815f0e738a8d5663a02350e2580706829144a722 Mon Sep 17 00:00:00 2001
2 From: Horatiu Vultur <horatiu.vultur@microchip.com>
3 Date: Wed, 3 Nov 2021 09:50:59 +0100
4 Subject: [PATCH] clk: gate: Add devm_clk_hw_register_gate()
6 Add devm_clk_hw_register_gate() - devres-managed version of
9 Suggested-by: Stephen Boyd <sboyd@kernel.org>
10 Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
11 Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
12 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
13 Link: https://lore.kernel.org/r/20211103085102.1656081-2-horatiu.vultur@microchip.com
15 drivers/clk/clk-gate.c | 35 +++++++++++++++++++++++++++++++++++
16 include/linux/clk-provider.h | 23 +++++++++++++++++++++++
17 2 files changed, 58 insertions(+)
19 --- a/drivers/clk/clk-gate.c
20 +++ b/drivers/clk/clk-gate.c
24 #include <linux/clk-provider.h>
25 +#include <linux/device.h>
26 #include <linux/module.h>
27 #include <linux/slab.h>
29 @@ -222,3 +223,37 @@ void clk_hw_unregister_gate(struct clk_h
32 EXPORT_SYMBOL_GPL(clk_hw_unregister_gate);
34 +static void devm_clk_hw_release_gate(struct device *dev, void *res)
36 + clk_hw_unregister_gate(*(struct clk_hw **)res);
39 +struct clk_hw *__devm_clk_hw_register_gate(struct device *dev,
40 + struct device_node *np, const char *name,
41 + const char *parent_name, const struct clk_hw *parent_hw,
42 + const struct clk_parent_data *parent_data,
43 + unsigned long flags,
44 + void __iomem *reg, u8 bit_idx,
45 + u8 clk_gate_flags, spinlock_t *lock)
47 + struct clk_hw **ptr, *hw;
49 + ptr = devres_alloc(devm_clk_hw_release_gate, sizeof(*ptr), GFP_KERNEL);
51 + return ERR_PTR(-ENOMEM);
53 + hw = __clk_hw_register_gate(dev, np, name, parent_name, parent_hw,
54 + parent_data, flags, reg, bit_idx,
55 + clk_gate_flags, lock);
59 + devres_add(dev, ptr);
66 +EXPORT_SYMBOL_GPL(__devm_clk_hw_register_gate);
67 --- a/include/linux/clk-provider.h
68 +++ b/include/linux/clk-provider.h
69 @@ -490,6 +490,13 @@ struct clk_hw *__clk_hw_register_gate(st
71 void __iomem *reg, u8 bit_idx,
72 u8 clk_gate_flags, spinlock_t *lock);
73 +struct clk_hw *__devm_clk_hw_register_gate(struct device *dev,
74 + struct device_node *np, const char *name,
75 + const char *parent_name, const struct clk_hw *parent_hw,
76 + const struct clk_parent_data *parent_data,
77 + unsigned long flags,
78 + void __iomem *reg, u8 bit_idx,
79 + u8 clk_gate_flags, spinlock_t *lock);
80 struct clk *clk_register_gate(struct device *dev, const char *name,
81 const char *parent_name, unsigned long flags,
82 void __iomem *reg, u8 bit_idx,
83 @@ -544,6 +551,22 @@ struct clk *clk_register_gate(struct dev
84 __clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), \
85 (flags), (reg), (bit_idx), \
86 (clk_gate_flags), (lock))
88 + * devm_clk_hw_register_gate - register a gate clock with the clock framework
89 + * @dev: device that is registering this clock
90 + * @name: name of this clock
91 + * @parent_name: name of this clock's parent
92 + * @flags: framework-specific flags for this clock
93 + * @reg: register address to control gating of this clock
94 + * @bit_idx: which bit in the register controls gating of this clock
95 + * @clk_gate_flags: gate-specific flags for this clock
96 + * @lock: shared register lock for this clock
98 +#define devm_clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx,\
99 + clk_gate_flags, lock) \
100 + __devm_clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
101 + NULL, (flags), (reg), (bit_idx), \
102 + (clk_gate_flags), (lock))
103 void clk_unregister_gate(struct clk *clk);
104 void clk_hw_unregister_gate(struct clk_hw *hw);
105 int clk_gate_is_enabled(struct clk_hw *hw);