1 From 5c74c54ce6fff719999ff48f128cf4150ee4ff59 Mon Sep 17 00:00:00 2001
2 From: Iwan R Timmer <irtimmer@gmail.com>
3 Date: Thu, 7 Nov 2019 22:11:13 +0100
4 Subject: [PATCH] net: dsa: mv88e6xxx: Split monitor port configuration
6 Separate the configuration of the egress and ingress monitor port.
7 This allows the port mirror functionality to do ingress and egress
8 port mirroring to separate ports.
10 Signed-off-by: Iwan R Timmer <irtimmer@gmail.com>
11 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
12 Signed-off-by: David S. Miller <davem@davemloft.net>
14 drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++-
15 drivers/net/dsa/mv88e6xxx/chip.h | 9 ++++++-
16 drivers/net/dsa/mv88e6xxx/global1.c | 42 ++++++++++++++++++++---------
17 drivers/net/dsa/mv88e6xxx/global1.h | 8 ++++--
18 4 files changed, 52 insertions(+), 16 deletions(-)
20 --- a/drivers/net/dsa/mv88e6xxx/chip.c
21 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
22 @@ -2378,7 +2378,14 @@ static int mv88e6xxx_setup_upstream_port
24 if (chip->info->ops->set_egress_port) {
25 err = chip->info->ops->set_egress_port(chip,
27 + MV88E6XXX_EGRESS_DIR_INGRESS,
32 + err = chip->info->ops->set_egress_port(chip,
33 + MV88E6XXX_EGRESS_DIR_EGRESS,
38 --- a/drivers/net/dsa/mv88e6xxx/chip.h
39 +++ b/drivers/net/dsa/mv88e6xxx/chip.h
40 @@ -33,6 +33,11 @@ enum mv88e6xxx_egress_mode {
41 MV88E6XXX_EGRESS_MODE_ETHERTYPE,
44 +enum mv88e6xxx_egress_direction {
45 + MV88E6XXX_EGRESS_DIR_INGRESS,
46 + MV88E6XXX_EGRESS_DIR_EGRESS,
49 enum mv88e6xxx_frame_mode {
50 MV88E6XXX_FRAME_MODE_NORMAL,
51 MV88E6XXX_FRAME_MODE_DSA,
52 @@ -464,7 +469,9 @@ struct mv88e6xxx_ops {
53 int (*stats_get_stats)(struct mv88e6xxx_chip *chip, int port,
55 int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
56 - int (*set_egress_port)(struct mv88e6xxx_chip *chip, int port);
57 + int (*set_egress_port)(struct mv88e6xxx_chip *chip,
58 + enum mv88e6xxx_egress_direction direction,
61 #define MV88E6XXX_CASCADE_PORT_NONE 0xe
62 #define MV88E6XXX_CASCADE_PORT_MULTIPLE 0xf
63 --- a/drivers/net/dsa/mv88e6xxx/global1.c
64 +++ b/drivers/net/dsa/mv88e6xxx/global1.c
65 @@ -263,7 +263,9 @@ int mv88e6250_g1_ieee_pri_map(struct mv8
66 /* Offset 0x1a: Monitor Control */
67 /* Offset 0x1a: Monitor & MGMT Control on some devices */
69 -int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
70 +int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
71 + enum mv88e6xxx_egress_direction direction,
76 @@ -272,11 +274,20 @@ int mv88e6095_g1_set_egress_port(struct
80 - reg &= ~(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK |
81 - MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
83 - reg |= port << __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK) |
84 - port << __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
85 + switch (direction) {
86 + case MV88E6XXX_EGRESS_DIR_INGRESS:
87 + reg &= MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;
89 + __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);
91 + case MV88E6XXX_EGRESS_DIR_EGRESS:
92 + reg &= MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;
94 + __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);
100 return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);
102 @@ -310,17 +321,24 @@ static int mv88e6390_g1_monitor_write(st
103 return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);
106 -int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port)
107 +int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
108 + enum mv88e6xxx_egress_direction direction,
114 - ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
115 - err = mv88e6390_g1_monitor_write(chip, ptr, port);
118 + switch (direction) {
119 + case MV88E6XXX_EGRESS_DIR_INGRESS:
120 + ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;
122 + case MV88E6XXX_EGRESS_DIR_EGRESS:
123 + ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
129 - ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;
130 err = mv88e6390_g1_monitor_write(chip, ptr, port);
133 --- a/drivers/net/dsa/mv88e6xxx/global1.h
134 +++ b/drivers/net/dsa/mv88e6xxx/global1.h
135 @@ -288,8 +288,12 @@ int mv88e6095_g1_stats_set_histogram(str
136 int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
137 void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
138 int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
139 -int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
140 -int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip, int port);
141 +int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
142 + enum mv88e6xxx_egress_direction direction,
144 +int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
145 + enum mv88e6xxx_egress_direction direction,
147 int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
148 int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
149 int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);