efe7071de4f0db030326c20469682309cbbe27f6
[openwrt/staging/hauke.git] / target / linux / generic / backport-5.4 / 806-v5.8-i2c-pxa-re-arrange-functions-to-flow-better.patch
1 From: Russell King <rmk+kernel@armlinux.org.uk>
2 Bcc: linux@mail.armlinux.org.uk
3 Cc: linux-i2c@vger.kernel.org
4 Subject: [PATCH 04/17] i2c: pxa: re-arrange functions to flow better
5 MIME-Version: 1.0
6 Content-Disposition: inline
7 Content-Transfer-Encoding: 8bit
8 Content-Type: text/plain; charset="utf-8"
9
10 Re-arrange the PXA I2C code to avoid forward declarations, and keep
11 similar functionality (e.g. the non-IRQ mode support) together. This
12 improves code readability.
13
14 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
15 ---
16 drivers/i2c/busses/i2c-pxa.c | 325 +++++++++++++++++------------------
17 1 file changed, 162 insertions(+), 163 deletions(-)
18
19 diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
20 index ee83d2e46de0..e5f00ae39861 100644
21 --- a/drivers/i2c/busses/i2c-pxa.c
22 +++ b/drivers/i2c/busses/i2c-pxa.c
23 @@ -327,7 +327,6 @@ static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
24 #endif /* ifdef DEBUG / else */
25
26 static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
27 -static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
28
29 static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
30 {
31 @@ -703,34 +702,6 @@ static inline void i2c_pxa_stop_message(struct pxa_i2c *i2c)
32 writel(icr, _ICR(i2c));
33 }
34
35 -static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
36 -{
37 - /* make timeout the same as for interrupt based functions */
38 - long timeout = 2 * DEF_TIMEOUT;
39 -
40 - /*
41 - * Wait for the bus to become free.
42 - */
43 - while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
44 - udelay(1000);
45 - show_state(i2c);
46 - }
47 -
48 - if (timeout < 0) {
49 - show_state(i2c);
50 - dev_err(&i2c->adap.dev,
51 - "i2c_pxa: timeout waiting for bus free\n");
52 - return I2C_RETRY;
53 - }
54 -
55 - /*
56 - * Set master mode.
57 - */
58 - writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
59 -
60 - return 0;
61 -}
62 -
63 /*
64 * PXA I2C send master code
65 * 1. Load master code to IDBR and send it.
66 @@ -759,140 +730,6 @@ static int i2c_pxa_send_mastercode(struct pxa_i2c *i2c)
67 return (timeout == 0) ? I2C_RETRY : 0;
68 }
69
70 -static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
71 - struct i2c_msg *msg, int num)
72 -{
73 - unsigned long timeout = 500000; /* 5 seconds */
74 - int ret = 0;
75 -
76 - ret = i2c_pxa_pio_set_master(i2c);
77 - if (ret)
78 - goto out;
79 -
80 - i2c->msg = msg;
81 - i2c->msg_num = num;
82 - i2c->msg_idx = 0;
83 - i2c->msg_ptr = 0;
84 - i2c->irqlogidx = 0;
85 -
86 - i2c_pxa_start_message(i2c);
87 -
88 - while (i2c->msg_num > 0 && --timeout) {
89 - i2c_pxa_handler(0, i2c);
90 - udelay(10);
91 - }
92 -
93 - i2c_pxa_stop_message(i2c);
94 -
95 - /*
96 - * We place the return code in i2c->msg_idx.
97 - */
98 - ret = i2c->msg_idx;
99 -
100 -out:
101 - if (timeout == 0) {
102 - i2c_pxa_scream_blue_murder(i2c, "timeout");
103 - ret = I2C_RETRY;
104 - }
105 -
106 - return ret;
107 -}
108 -
109 -/*
110 - * We are protected by the adapter bus mutex.
111 - */
112 -static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
113 -{
114 - long timeout;
115 - int ret;
116 -
117 - /*
118 - * Wait for the bus to become free.
119 - */
120 - ret = i2c_pxa_wait_bus_not_busy(i2c);
121 - if (ret) {
122 - dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
123 - goto out;
124 - }
125 -
126 - /*
127 - * Set master mode.
128 - */
129 - ret = i2c_pxa_set_master(i2c);
130 - if (ret) {
131 - dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
132 - goto out;
133 - }
134 -
135 - if (i2c->high_mode) {
136 - ret = i2c_pxa_send_mastercode(i2c);
137 - if (ret) {
138 - dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
139 - goto out;
140 - }
141 - }
142 -
143 - spin_lock_irq(&i2c->lock);
144 -
145 - i2c->msg = msg;
146 - i2c->msg_num = num;
147 - i2c->msg_idx = 0;
148 - i2c->msg_ptr = 0;
149 - i2c->irqlogidx = 0;
150 -
151 - i2c_pxa_start_message(i2c);
152 -
153 - spin_unlock_irq(&i2c->lock);
154 -
155 - /*
156 - * The rest of the processing occurs in the interrupt handler.
157 - */
158 - timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
159 - i2c_pxa_stop_message(i2c);
160 -
161 - /*
162 - * We place the return code in i2c->msg_idx.
163 - */
164 - ret = i2c->msg_idx;
165 -
166 - if (!timeout && i2c->msg_num) {
167 - i2c_pxa_scream_blue_murder(i2c, "timeout");
168 - ret = I2C_RETRY;
169 - }
170 -
171 - out:
172 - return ret;
173 -}
174 -
175 -static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
176 - struct i2c_msg msgs[], int num)
177 -{
178 - struct pxa_i2c *i2c = adap->algo_data;
179 - int ret, i;
180 -
181 - /* If the I2C controller is disabled we need to reset it
182 - (probably due to a suspend/resume destroying state). We do
183 - this here as we can then avoid worrying about resuming the
184 - controller before its users. */
185 - if (!(readl(_ICR(i2c)) & ICR_IUE))
186 - i2c_pxa_reset(i2c);
187 -
188 - for (i = adap->retries; i >= 0; i--) {
189 - ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
190 - if (ret != I2C_RETRY)
191 - goto out;
192 -
193 - if (i2c_debug)
194 - dev_dbg(&adap->dev, "Retrying transmission\n");
195 - udelay(100);
196 - }
197 - i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
198 - ret = -EREMOTEIO;
199 - out:
200 - i2c_pxa_set_slave(i2c, ret);
201 - return ret;
202 -}
203 -
204 /*
205 * i2c_pxa_master_complete - complete the message and wake up.
206 */
207 @@ -1099,6 +936,71 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
208 return IRQ_HANDLED;
209 }
210
211 +/*
212 + * We are protected by the adapter bus mutex.
213 + */
214 +static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
215 +{
216 + long timeout;
217 + int ret;
218 +
219 + /*
220 + * Wait for the bus to become free.
221 + */
222 + ret = i2c_pxa_wait_bus_not_busy(i2c);
223 + if (ret) {
224 + dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
225 + goto out;
226 + }
227 +
228 + /*
229 + * Set master mode.
230 + */
231 + ret = i2c_pxa_set_master(i2c);
232 + if (ret) {
233 + dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
234 + goto out;
235 + }
236 +
237 + if (i2c->high_mode) {
238 + ret = i2c_pxa_send_mastercode(i2c);
239 + if (ret) {
240 + dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
241 + goto out;
242 + }
243 + }
244 +
245 + spin_lock_irq(&i2c->lock);
246 +
247 + i2c->msg = msg;
248 + i2c->msg_num = num;
249 + i2c->msg_idx = 0;
250 + i2c->msg_ptr = 0;
251 + i2c->irqlogidx = 0;
252 +
253 + i2c_pxa_start_message(i2c);
254 +
255 + spin_unlock_irq(&i2c->lock);
256 +
257 + /*
258 + * The rest of the processing occurs in the interrupt handler.
259 + */
260 + timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
261 + i2c_pxa_stop_message(i2c);
262 +
263 + /*
264 + * We place the return code in i2c->msg_idx.
265 + */
266 + ret = i2c->msg_idx;
267 +
268 + if (!timeout && i2c->msg_num) {
269 + i2c_pxa_scream_blue_murder(i2c, "timeout");
270 + ret = I2C_RETRY;
271 + }
272 +
273 + out:
274 + return ret;
275 +}
276
277 static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
278 {
279 @@ -1132,6 +1034,103 @@ static const struct i2c_algorithm i2c_pxa_algorithm = {
280 .functionality = i2c_pxa_functionality,
281 };
282
283 +/* Non-interrupt mode support */
284 +static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
285 +{
286 + /* make timeout the same as for interrupt based functions */
287 + long timeout = 2 * DEF_TIMEOUT;
288 +
289 + /*
290 + * Wait for the bus to become free.
291 + */
292 + while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
293 + udelay(1000);
294 + show_state(i2c);
295 + }
296 +
297 + if (timeout < 0) {
298 + show_state(i2c);
299 + dev_err(&i2c->adap.dev,
300 + "i2c_pxa: timeout waiting for bus free\n");
301 + return I2C_RETRY;
302 + }
303 +
304 + /*
305 + * Set master mode.
306 + */
307 + writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
308 +
309 + return 0;
310 +}
311 +
312 +static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
313 + struct i2c_msg *msg, int num)
314 +{
315 + unsigned long timeout = 500000; /* 5 seconds */
316 + int ret = 0;
317 +
318 + ret = i2c_pxa_pio_set_master(i2c);
319 + if (ret)
320 + goto out;
321 +
322 + i2c->msg = msg;
323 + i2c->msg_num = num;
324 + i2c->msg_idx = 0;
325 + i2c->msg_ptr = 0;
326 + i2c->irqlogidx = 0;
327 +
328 + i2c_pxa_start_message(i2c);
329 +
330 + while (i2c->msg_num > 0 && --timeout) {
331 + i2c_pxa_handler(0, i2c);
332 + udelay(10);
333 + }
334 +
335 + i2c_pxa_stop_message(i2c);
336 +
337 + /*
338 + * We place the return code in i2c->msg_idx.
339 + */
340 + ret = i2c->msg_idx;
341 +
342 +out:
343 + if (timeout == 0) {
344 + i2c_pxa_scream_blue_murder(i2c, "timeout");
345 + ret = I2C_RETRY;
346 + }
347 +
348 + return ret;
349 +}
350 +
351 +static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
352 + struct i2c_msg msgs[], int num)
353 +{
354 + struct pxa_i2c *i2c = adap->algo_data;
355 + int ret, i;
356 +
357 + /* If the I2C controller is disabled we need to reset it
358 + (probably due to a suspend/resume destroying state). We do
359 + this here as we can then avoid worrying about resuming the
360 + controller before its users. */
361 + if (!(readl(_ICR(i2c)) & ICR_IUE))
362 + i2c_pxa_reset(i2c);
363 +
364 + for (i = adap->retries; i >= 0; i--) {
365 + ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
366 + if (ret != I2C_RETRY)
367 + goto out;
368 +
369 + if (i2c_debug)
370 + dev_dbg(&adap->dev, "Retrying transmission\n");
371 + udelay(100);
372 + }
373 + i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
374 + ret = -EREMOTEIO;
375 + out:
376 + i2c_pxa_set_slave(i2c, ret);
377 + return ret;
378 +}
379 +
380 static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
381 .master_xfer = i2c_pxa_pio_xfer,
382 .functionality = i2c_pxa_functionality,
383 --
384 2.20.1
385