target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch

   1 From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
   3 Date: Sat, 17 Jun 2023 09:26:44 +0300
   4 Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
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   8
   9 MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
  10 frames (further restricted by PCR_MATRIX).
  11
  12 Currently the driver sets the first CPU port as the single port in this bit
  13 mask, which works fine regardless of whether the device tree defines port
  14 5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's
  15 logic of picking the first CPU port as the CPU port that all user ports are
  16 affine to, by default.
  17
  18 An upcoming change would like to influence DSA's selection of the default
  19 CPU port to no longer be the first one, and in that case, this logic needs
  20 adaptation.
  21
  22 Since there is no observed leakage or duplication of frames if all CPU
  23 ports are defined in this bit mask, simply include them all.
  24
  25 Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
  26 Suggested-by: Vladimir Oltean <olteanv@gmail.com>
  27 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
  28 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
  29 Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  30 Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
  31 Signed-off-by: David S. Miller <davem@davemloft.net>
  32 ---
  33  drivers/net/dsa/mt7530.c | 15 +++++++--------
  34  drivers/net/dsa/mt7530.h |  1 +
  35  2 files changed, 8 insertions(+), 8 deletions(-)
  36
  37 --- a/drivers/net/dsa/mt7530.c
  38 +++ b/drivers/net/dsa/mt7530.c
  39 @@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch
  40         if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
  41                 mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
  42
  43 +       /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
  44 +        * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
  45 +        * is affine to the inbound user port.
  46 +        */
  47 +       if (priv->id == ID_MT7531 || priv->id == ID_MT7988)
  48 +               mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
  49 +
  50         /* CPU port gets connected to all user ports of
  51          * the switch.
  52          */
  53 @@ -2411,16 +2418,8 @@ static int
  54  mt7531_setup_common(struct dsa_switch *ds)
  55  {
  56         struct mt7530_priv *priv = ds->priv;
  57 -       struct dsa_port *cpu_dp;
  58         int ret, i;
  59
  60 -       /* BPDU to CPU port */
  61 -       dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  62 -               mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
  63 -                          BIT(cpu_dp->index));
  64 -               break;
  65 -       }
  66 -
  67         mt753x_trap_frames(priv);
  68
  69         /* Enable and reset MIB counters */
  70 --- a/drivers/net/dsa/mt7530.h
  71 +++ b/drivers/net/dsa/mt7530.h
  72 @@ -54,6 +54,7 @@ enum mt753x_id {
  73  #define  MT7531_MIRROR_PORT_GET(x)     (((x) >> 16) & MIRROR_MASK)
  74  #define  MT7531_MIRROR_PORT_SET(x)     (((x) & MIRROR_MASK) << 16)
  75  #define  MT7531_CPU_PMAP_MASK          GENMASK(7, 0)
  76 +#define  MT7531_CPU_PMAP(x)            FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
  77
  78  #define MT753X_MIRROR_REG(id)          ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
  79                                          MT7531_CFC : MT7530_MFC)