474633627ef1def34143d79182d6b70dc91bbebd
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71 #include "ctrlEnv/mvCtrlEnvSpec.h"
72 #include "pci/mvPciRegs.h"
75 /* NOTE not supported in this driver:
77 Built In Self Test (BIST)
78 Vital Product Data (VPD)
79 Message Signaled Interrupt (MSI)
84 Registers not supported:
85 1) PCI DLL Status and Control (PCI0 0x1D20, PCI1 0x1DA0)
86 2) PCI/MPP Pads Calibration (CI0/MPP[31:16] 0x1D1C, PCI1/MPP[15:0] 0X1D9C)
90 /* The number of supported PCI interfaces depend on Marvell controller */
91 /* device number. This device number ID is located on the PCI unit */
92 /* configuration header. This creates a loop where calling PCI */
93 /* configuration read/write routine results a call to get PCI configuration */
94 /* information etc. This macro defines a default PCI interface. This PCI */
95 /* interface is sure to exist. */
96 #define PCI_DEFAULT_IF 0
100 /* The Marvell controller supports both conventional PCI and PCI-X. */
101 /* This enumeration describes the PCI type. */
102 typedef enum _mvPciType
104 MV_PCI_CONV
, /* Conventional PCI */
108 typedef enum _mvPciMod
115 /* The Marvell controller supports both PCI width of 32 and 64 bit. */
116 /* This enumerator describes PCI width */
117 typedef enum _mvPciWidth
119 MV_PCI_32
, /* PCI width 32bit */
120 MV_PCI_64
/* PCI width 64bit */
123 /* This structure describes the PCI unit configured type, speed and width. */
124 typedef struct _mvPciMode
126 MV_PCI_TYPE pciType
; /* PCI type */
127 MV_U32 pciSpeed
; /* Assuming PCI base clock on board is 33MHz */
128 MV_PCI_WIDTH pciWidth
; /* PCI bus width */
131 /* mvPciInit - Initialize PCI interfaces*/
132 MV_VOID
mvPciHalInit(MV_U32 pciIf
, MV_PCI_MOD pciIfmod
);
134 /* mvPciCommandSet - Set PCI comman register value.*/
135 MV_STATUS
mvPciCommandSet(MV_U32 pciIf
, MV_U32 command
);
137 /* mvPciModeGet - Get PCI interface mode.*/
138 MV_STATUS
mvPciModeGet(MV_U32 pciIf
, MV_PCI_MODE
*pPciMode
);
140 /* mvPciRetrySet - Set PCI retry counters*/
141 MV_STATUS
mvPciRetrySet(MV_U32 pciIf
, MV_U32 counter
);
143 /* mvPciDiscardTimerSet - Set PCI discard timer*/
144 MV_STATUS
mvPciDiscardTimerSet(MV_U32 pciIf
, MV_U32 pClkCycles
);
146 /* mvPciArbEnable - PCI arbiter enable/disable*/
147 MV_STATUS
mvPciArbEnable(MV_U32 pciIf
, MV_BOOL enable
);
149 /* mvPciArbParkDis - Disable arbiter parking on agent */
150 MV_STATUS
mvPciArbParkDis(MV_U32 pciIf
, MV_U32 pciAgentMask
);
152 /* mvPciArbBrokDetectSet - Set PCI arbiter broken detection */
153 MV_STATUS
mvPciArbBrokDetectSet(MV_U32 pciIf
, MV_U32 pClkCycles
);
155 /* mvPciConfigRead - Read from configuration space */
156 MV_U32
mvPciConfigRead (MV_U32 pciIf
, MV_U32 bus
, MV_U32 dev
,
157 MV_U32 func
,MV_U32 regOff
);
159 /* mvPciConfigWrite - Write to configuration space */
160 MV_STATUS
mvPciConfigWrite(MV_U32 pciIf
, MV_U32 bus
, MV_U32 dev
,
161 MV_U32 func
, MV_U32 regOff
, MV_U32 data
);
163 /* mvPciMasterEnable - Enable/disale PCI interface master transactions.*/
164 MV_STATUS
mvPciMasterEnable(MV_U32 pciIf
, MV_BOOL enable
);
166 /* mvPciSlaveEnable - Enable/disale PCI interface slave transactions.*/
167 MV_STATUS
mvPciSlaveEnable(MV_U32 pciIf
, MV_U32 bus
, MV_U32 dev
,MV_BOOL enable
);
169 /* mvPciLocalBusNumSet - Set PCI interface local bus number.*/
170 MV_STATUS
mvPciLocalBusNumSet(MV_U32 pciIf
, MV_U32 busNum
);
172 /* mvPciLocalBusNumGet - Get PCI interface local bus number.*/
173 MV_U32
mvPciLocalBusNumGet(MV_U32 pciIf
);
175 /* mvPciLocalDevNumSet - Set PCI interface local device number.*/
176 MV_STATUS
mvPciLocalDevNumSet(MV_U32 pciIf
, MV_U32 devNum
);
178 /* mvPciLocalDevNumGet - Get PCI interface local device number.*/
179 MV_U32
mvPciLocalDevNumGet(MV_U32 pciIf
);
182 #endif /* #ifndef __INCPCIH */