2 * ADM6996 switch driver
4 * swconfig interface based on ar8216.c
6 * Copyright (c) 2008 Felix Fietkau <nbd@openwrt.org>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License v2 as published by the
12 * Free Software Foundation
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/errno.h>
21 #include <linux/unistd.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/gpio.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/platform_device.h>
35 #include <linux/platform_data/adm6996-gpio.h>
36 #include <linux/ethtool.h>
37 #include <linux/phy.h>
38 #include <linux/switch.h>
42 #include <asm/uaccess.h>
45 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
46 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
47 MODULE_LICENSE("GPL");
49 static const char * const adm6996_model_name
[] =
58 struct switch_dev dev
;
66 enum adm6996_model model
;
69 bool vlan_enabled
; /* Current hardware state */
72 u16 addr
; /* Debugging: register address to operate on */
75 u16 pvid
[ADM_NUM_PORTS
]; /* Primary VLAN ID */
78 u16 vlan_id
[ADM_NUM_VLANS
];
79 u8 vlan_table
[ADM_NUM_VLANS
]; /* bitmap, 1 = port is member */
80 u8 vlan_tagged
[ADM_NUM_VLANS
]; /* bitmap, 1 = tagged member */
82 struct mutex reg_mutex
;
84 /* use abstraction for regops, we want to add gpio support in the future */
85 u16 (*read
)(struct adm6996_priv
*priv
, enum admreg reg
);
86 void (*write
)(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
);
89 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
90 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
93 r16(struct adm6996_priv
*priv
, enum admreg reg
)
95 return priv
->read(priv
, reg
);
99 w16(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
101 priv
->write(priv
, reg
, val
);
104 /* Minimum timing constants */
105 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
106 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
107 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
109 static void adm6996_gpio_write(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
111 int i
, len
= (bits
+ 7) / 8;
114 gpio_set_value(priv
->eecs
, cs
);
115 udelay(EECK_EDGE_TIME
);
117 /* Byte assemble from MSB to LSB */
118 for (i
= 0; i
< len
; i
++) {
119 /* Bit bang from MSB to LSB */
120 for (mask
= 0x80; mask
&& bits
> 0; mask
>>= 1, bits
--) {
122 gpio_set_value(priv
->eesk
, 0);
123 udelay(EECK_EDGE_TIME
);
125 /* Output on rising edge */
126 gpio_set_value(priv
->eedi
, (mask
& buf
[i
]));
127 udelay(EEDI_SETUP_TIME
);
130 gpio_set_value(priv
->eesk
, 1);
131 udelay(EECK_EDGE_TIME
);
136 gpio_set_value(priv
->eesk
, 0);
137 udelay(EECK_EDGE_TIME
);
140 gpio_set_value(priv
->eecs
, 0);
143 static void adm6996_gpio_read(struct adm6996_priv
*priv
, int cs
, char *buf
, unsigned int bits
)
145 int i
, len
= (bits
+ 7) / 8;
148 gpio_set_value(priv
->eecs
, cs
);
149 udelay(EECK_EDGE_TIME
);
151 /* Byte assemble from MSB to LSB */
152 for (i
= 0; i
< len
; i
++) {
155 /* Bit bang from MSB to LSB */
156 for (mask
= 0x80, byte
= 0; mask
&& bits
> 0; mask
>>= 1, bits
--) {
160 gpio_set_value(priv
->eesk
, 0);
161 udelay(EECK_EDGE_TIME
);
163 /* Input on rising edge */
164 gp
= gpio_get_value(priv
->eedi
);
169 gpio_set_value(priv
->eesk
, 1);
170 udelay(EECK_EDGE_TIME
);
177 gpio_set_value(priv
->eesk
, 0);
178 udelay(EECK_EDGE_TIME
);
181 gpio_set_value(priv
->eecs
, 0);
184 /* Advance clock(s) */
185 static void adm6996_gpio_adclk(struct adm6996_priv
*priv
, int clocks
)
188 for (i
= 0; i
< clocks
; i
++) {
190 gpio_set_value(priv
->eesk
, 1);
191 udelay(EECK_EDGE_TIME
);
194 gpio_set_value(priv
->eesk
, 0);
195 udelay(EECK_EDGE_TIME
);
200 adm6996_read_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
)
202 /* cmd: 01 10 T DD R RRRRRR */
204 0xFF, 0xFF, 0xFF, 0xFF,
205 (0x06 << 4) | ((0 & 0x01) << 3 | (reg
&64)>>6),
211 /* Enable GPIO outputs with all pins to 0 */
212 gpio_direction_output(priv
->eecs
, 0);
213 gpio_direction_output(priv
->eesk
, 0);
214 gpio_direction_output(priv
->eedi
, 0);
216 adm6996_gpio_write(priv
, 0, bits
, 46);
217 gpio_direction_input(priv
->eedi
);
218 adm6996_gpio_adclk(priv
, 2);
219 adm6996_gpio_read(priv
, 0, rbits
, 32);
221 /* Extra clock(s) required per datasheet */
222 adm6996_gpio_adclk(priv
, 2);
224 /* Disable GPIO outputs */
225 gpio_direction_input(priv
->eecs
);
226 gpio_direction_input(priv
->eesk
);
228 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
229 return (reg
& 0x01 ? (rbits
[0]<<8) | rbits
[1] : (rbits
[2]<<8) | (rbits
[3]));
232 /* Write chip configuration register */
233 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
235 adm6996_write_gpio_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
237 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
239 (0x05 << 5) | (reg
>> 3),
240 (reg
<< 5) | (u8
)(val
>> 11),
245 /* Enable GPIO outputs with all pins to 0 */
246 gpio_direction_output(priv
->eecs
, 0);
247 gpio_direction_output(priv
->eesk
, 0);
248 gpio_direction_output(priv
->eedi
, 0);
250 /* Write cmd. Total 27 bits */
251 adm6996_gpio_write(priv
, 1, bits
, 27);
253 /* Extra clock(s) required per datasheet */
254 adm6996_gpio_adclk(priv
, 2);
256 /* Disable GPIO outputs */
257 gpio_direction_input(priv
->eecs
);
258 gpio_direction_input(priv
->eesk
);
259 gpio_direction_input(priv
->eedi
);
263 adm6996_read_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
)
265 struct phy_device
*phydev
= priv
->priv
;
266 struct mii_bus
*bus
= phydev
->bus
;
268 return bus
->read(bus
, PHYADDR(reg
));
272 adm6996_write_mii_reg(struct adm6996_priv
*priv
, enum admreg reg
, u16 val
)
274 struct phy_device
*phydev
= priv
->priv
;
275 struct mii_bus
*bus
= phydev
->bus
;
277 bus
->write(bus
, PHYADDR(reg
), val
);
281 adm6996_set_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
282 struct switch_val
*val
)
284 struct adm6996_priv
*priv
= to_adm(dev
);
286 if (val
->value
.i
> 1)
289 priv
->enable_vlan
= val
->value
.i
;
295 adm6996_get_enable_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
296 struct switch_val
*val
)
298 struct adm6996_priv
*priv
= to_adm(dev
);
300 val
->value
.i
= priv
->enable_vlan
;
308 adm6996_set_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
309 struct switch_val
*val
)
311 struct adm6996_priv
*priv
= to_adm(dev
);
313 if (val
->value
.i
> 1023)
316 priv
->addr
= val
->value
.i
;
322 adm6996_get_addr(struct switch_dev
*dev
, const struct switch_attr
*attr
,
323 struct switch_val
*val
)
325 struct adm6996_priv
*priv
= to_adm(dev
);
327 val
->value
.i
= priv
->addr
;
333 adm6996_set_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
334 struct switch_val
*val
)
336 struct adm6996_priv
*priv
= to_adm(dev
);
338 if (val
->value
.i
> 65535)
341 w16(priv
, priv
->addr
, val
->value
.i
);
347 adm6996_get_data(struct switch_dev
*dev
, const struct switch_attr
*attr
,
348 struct switch_val
*val
)
350 struct adm6996_priv
*priv
= to_adm(dev
);
352 val
->value
.i
= r16(priv
, priv
->addr
);
357 #endif /* def DEBUG */
360 adm6996_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
362 struct adm6996_priv
*priv
= to_adm(dev
);
364 pr_devel("set_pvid port %d vlan %d\n", port
, vlan
);
366 if (vlan
> ADM_VLAN_MAX_ID
)
369 priv
->pvid
[port
] = vlan
;
375 adm6996_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
377 struct adm6996_priv
*priv
= to_adm(dev
);
379 pr_devel("get_pvid port %d\n", port
);
380 *vlan
= priv
->pvid
[port
];
386 adm6996_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
387 struct switch_val
*val
)
389 struct adm6996_priv
*priv
= to_adm(dev
);
391 pr_devel("set_vid port %d vid %d\n", val
->port_vlan
, val
->value
.i
);
393 if (val
->value
.i
> ADM_VLAN_MAX_ID
)
396 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
402 adm6996_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
403 struct switch_val
*val
)
405 struct adm6996_priv
*priv
= to_adm(dev
);
407 pr_devel("get_vid port %d\n", val
->port_vlan
);
409 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
415 adm6996_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
417 struct adm6996_priv
*priv
= to_adm(dev
);
418 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
419 u8 tagged
= priv
->vlan_tagged
[val
->port_vlan
];
422 pr_devel("get_ports port_vlan %d\n", val
->port_vlan
);
426 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
427 struct switch_port
*p
;
429 if (!(ports
& (1 << i
)))
432 p
= &val
->value
.ports
[val
->len
++];
434 if (tagged
& (1 << i
))
435 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
444 adm6996_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
446 struct adm6996_priv
*priv
= to_adm(dev
);
447 u8
*ports
= &priv
->vlan_table
[val
->port_vlan
];
448 u8
*tagged
= &priv
->vlan_tagged
[val
->port_vlan
];
451 pr_devel("set_ports port_vlan %d ports", val
->port_vlan
);
456 for (i
= 0; i
< val
->len
; i
++) {
457 struct switch_port
*p
= &val
->value
.ports
[i
];
460 pr_cont(" %d%s", p
->id
,
461 ((p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) ? "T" :
465 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) {
466 *tagged
|= (1 << p
->id
);
467 priv
->tagged_ports
|= (1 << p
->id
);
470 *ports
|= (1 << p
->id
);
481 * Precondition: reg_mutex must be held
484 adm6996_enable_vlan(struct adm6996_priv
*priv
)
488 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
489 reg
&= ~(ADM_OTBE_MASK
);
490 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
491 reg
= r16(priv
, ADM_IFNTE
);
492 reg
&= ~(ADM_IFNTE_MASK
);
493 w16(priv
, ADM_IFNTE
, reg
);
494 reg
= r16(priv
, ADM_VID_CHECK
);
495 reg
|= ADM_VID_CHECK_MASK
;
496 w16(priv
, ADM_VID_CHECK
, reg
);
497 reg
= r16(priv
, ADM_SYSC0
);
500 w16(priv
, ADM_SYSC0
, reg
);
501 reg
= r16(priv
, ADM_SYSC3
);
503 w16(priv
, ADM_SYSC3
, reg
);
507 adm6996_enable_vlan_6996l(struct adm6996_priv
*priv
)
511 reg
= r16(priv
, ADM_SYSC3
);
513 reg
|= ADM_MAC_CLONE
;
514 w16(priv
, ADM_SYSC3
, reg
);
520 * Sets VLAN mapping for port-based VLAN with all ports connected to
521 * eachother (this is also the power-on default).
523 * Precondition: reg_mutex must be held
526 adm6996_disable_vlan(struct adm6996_priv
*priv
)
531 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
532 reg
= ADM_VLAN_FILT_MEMBER_MASK
;
533 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
534 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(1);
535 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
538 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
539 reg
|= ADM_OTBE_MASK
;
540 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
541 reg
= r16(priv
, ADM_IFNTE
);
542 reg
|= ADM_IFNTE_MASK
;
543 w16(priv
, ADM_IFNTE
, reg
);
544 reg
= r16(priv
, ADM_VID_CHECK
);
545 reg
&= ~(ADM_VID_CHECK_MASK
);
546 w16(priv
, ADM_VID_CHECK
, reg
);
547 reg
= r16(priv
, ADM_SYSC0
);
550 w16(priv
, ADM_SYSC0
, reg
);
551 reg
= r16(priv
, ADM_SYSC3
);
553 w16(priv
, ADM_SYSC3
, reg
);
559 * Sets VLAN mapping for port-based VLAN with all ports connected to
560 * eachother (this is also the power-on default).
562 * Precondition: reg_mutex must be held
565 adm6996_disable_vlan_6996l(struct adm6996_priv
*priv
)
570 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
571 w16(priv
, ADM_VLAN_MAP(i
), 0);
574 reg
= r16(priv
, ADM_SYSC3
);
576 reg
&= ~(ADM_MAC_CLONE
);
577 w16(priv
, ADM_SYSC3
, reg
);
581 * Precondition: reg_mutex must be held
584 adm6996_apply_port_pvids(struct adm6996_priv
*priv
)
589 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
590 reg
= r16(priv
, adm_portcfg
[i
]);
591 reg
&= ~(ADM_PORTCFG_PVID_MASK
);
592 reg
|= ADM_PORTCFG_PVID(priv
->pvid
[i
]);
593 if (priv
->model
== ADM6996L
) {
594 if (priv
->tagged_ports
& (1 << i
))
599 w16(priv
, adm_portcfg
[i
], reg
);
602 w16(priv
, ADM_P0_PVID
, ADM_P0_PVID_VAL(priv
->pvid
[0]));
603 w16(priv
, ADM_P1_PVID
, ADM_P1_PVID_VAL(priv
->pvid
[1]));
604 reg
= r16(priv
, ADM_OTBE_P2_PVID
);
605 reg
&= ~(ADM_P2_PVID_MASK
);
606 reg
|= ADM_P2_PVID_VAL(priv
->pvid
[2]);
607 w16(priv
, ADM_OTBE_P2_PVID
, reg
);
608 reg
= ADM_P3_PVID_VAL(priv
->pvid
[3]);
609 reg
|= ADM_P4_PVID_VAL(priv
->pvid
[4]);
610 w16(priv
, ADM_P3_P4_PVID
, reg
);
611 reg
= r16(priv
, ADM_P5_PVID
);
612 reg
&= ~(ADM_P2_PVID_MASK
);
613 reg
|= ADM_P5_PVID_VAL(priv
->pvid
[5]);
614 w16(priv
, ADM_P5_PVID
, reg
);
618 * Precondition: reg_mutex must be held
621 adm6996_apply_vlan_filters(struct adm6996_priv
*priv
)
627 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
628 vid
= priv
->vlan_id
[i
];
629 ports
= priv
->vlan_table
[i
];
630 tagged
= priv
->vlan_tagged
[i
];
633 /* Disable VLAN entry */
634 w16(priv
, ADM_VLAN_FILT_H(i
), 0);
635 w16(priv
, ADM_VLAN_FILT_L(i
), 0);
639 reg
= ADM_VLAN_FILT_MEMBER(ports
);
640 reg
|= ADM_VLAN_FILT_TAGGED(tagged
);
641 w16(priv
, ADM_VLAN_FILT_L(i
), reg
);
642 reg
= ADM_VLAN_FILT_VALID
| ADM_VLAN_FILT_VID(vid
);
643 w16(priv
, ADM_VLAN_FILT_H(i
), reg
);
648 adm6996_apply_vlan_filters_6996l(struct adm6996_priv
*priv
)
654 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
655 ports
= priv
->vlan_table
[i
];
658 /* Disable VLAN entry */
659 w16(priv
, ADM_VLAN_MAP(i
), 0);
662 reg
= ADM_VLAN_FILT(ports
);
663 w16(priv
, ADM_VLAN_MAP(i
), reg
);
669 adm6996_hw_apply(struct switch_dev
*dev
)
671 struct adm6996_priv
*priv
= to_adm(dev
);
673 pr_devel("hw_apply\n");
675 mutex_lock(&priv
->reg_mutex
);
677 if (!priv
->enable_vlan
) {
678 if (priv
->vlan_enabled
) {
679 if (priv
->model
== ADM6996L
)
680 adm6996_disable_vlan_6996l(priv
);
682 adm6996_disable_vlan(priv
);
683 priv
->vlan_enabled
= 0;
688 if (!priv
->vlan_enabled
) {
689 if (priv
->model
== ADM6996L
)
690 adm6996_enable_vlan_6996l(priv
);
692 adm6996_enable_vlan(priv
);
693 priv
->vlan_enabled
= 1;
696 adm6996_apply_port_pvids(priv
);
697 if (priv
->model
== ADM6996L
)
698 adm6996_apply_vlan_filters_6996l(priv
);
700 adm6996_apply_vlan_filters(priv
);
703 mutex_unlock(&priv
->reg_mutex
);
711 * The ADM6996 can't do a software-initiated reset, so we just initialise the
712 * registers we support in this driver.
714 * Precondition: reg_mutex must be held
717 adm6996_perform_reset (struct adm6996_priv
*priv
)
721 /* initialize port and vlan settings */
722 for (i
= 0; i
< ADM_NUM_PORTS
- 1; i
++) {
723 w16(priv
, adm_portcfg
[i
], ADM_PORTCFG_INIT
|
724 ADM_PORTCFG_PVID(0));
726 w16(priv
, adm_portcfg
[5], ADM_PORTCFG_CPU
);
728 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996FC
) {
729 /* reset all PHY ports */
730 for (i
= 0; i
< ADM_PHY_PORTS
; i
++) {
731 w16(priv
, ADM_PHY_PORT(i
), ADM_PHYCFG_INIT
);
735 priv
->enable_vlan
= 0;
736 priv
->vlan_enabled
= 0;
738 for (i
= 0; i
< ADM_NUM_PORTS
; i
++) {
742 for (i
= 0; i
< ADM_NUM_VLANS
; i
++) {
743 priv
->vlan_id
[i
] = i
;
744 priv
->vlan_table
[i
] = 0;
745 priv
->vlan_tagged
[i
] = 0;
748 if (priv
->model
== ADM6996M
) {
749 /* Clear VLAN priority map so prio's are unused */
750 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
752 adm6996_disable_vlan(priv
);
753 adm6996_apply_port_pvids(priv
);
754 } else if (priv
->model
== ADM6996L
) {
755 /* Clear VLAN priority map so prio's are unused */
756 w16 (priv
, ADM_VLAN_PRIOMAP
, 0);
758 adm6996_disable_vlan_6996l(priv
);
759 adm6996_apply_port_pvids(priv
);
764 adm6996_reset_switch(struct switch_dev
*dev
)
766 struct adm6996_priv
*priv
= to_adm(dev
);
770 mutex_lock(&priv
->reg_mutex
);
771 adm6996_perform_reset (priv
);
772 mutex_unlock(&priv
->reg_mutex
);
776 static struct switch_attr adm6996_globals
[] = {
778 .type
= SWITCH_TYPE_INT
,
779 .name
= "enable_vlan",
780 .description
= "Enable VLANs",
781 .set
= adm6996_set_enable_vlan
,
782 .get
= adm6996_get_enable_vlan
,
786 .type
= SWITCH_TYPE_INT
,
789 "Direct register access: set register address (0 - 1023)",
790 .set
= adm6996_set_addr
,
791 .get
= adm6996_get_addr
,
794 .type
= SWITCH_TYPE_INT
,
797 "Direct register access: read/write to register (0 - 65535)",
798 .set
= adm6996_set_data
,
799 .get
= adm6996_get_data
,
801 #endif /* def DEBUG */
804 static struct switch_attr adm6996_port
[] = {
807 static struct switch_attr adm6996_vlan
[] = {
809 .type
= SWITCH_TYPE_INT
,
811 .description
= "VLAN ID",
812 .set
= adm6996_set_vid
,
813 .get
= adm6996_get_vid
,
817 static const struct switch_dev_ops adm6996_ops
= {
819 .attr
= adm6996_globals
,
820 .n_attr
= ARRAY_SIZE(adm6996_globals
),
823 .attr
= adm6996_port
,
824 .n_attr
= ARRAY_SIZE(adm6996_port
),
827 .attr
= adm6996_vlan
,
828 .n_attr
= ARRAY_SIZE(adm6996_vlan
),
830 .get_port_pvid
= adm6996_get_pvid
,
831 .set_port_pvid
= adm6996_set_pvid
,
832 .get_vlan_ports
= adm6996_get_ports
,
833 .set_vlan_ports
= adm6996_set_ports
,
834 .apply_config
= adm6996_hw_apply
,
835 .reset_switch
= adm6996_reset_switch
,
838 static int adm6996_switch_init(struct adm6996_priv
*priv
, const char *alias
, struct net_device
*netdev
)
840 struct switch_dev
*swdev
;
844 /* Detect type of chip */
845 old
= r16(priv
, ADM_VID_CHECK
);
846 test
= old
^ (1 << 12);
847 w16(priv
, ADM_VID_CHECK
, test
);
848 test
^= r16(priv
, ADM_VID_CHECK
);
849 if (test
& (1 << 12)) {
851 * Bit 12 of this register is read-only.
852 * This is the FC model.
854 priv
->model
= ADM6996FC
;
856 /* Bit 12 is read-write. This is the M model. */
857 priv
->model
= ADM6996M
;
858 w16(priv
, ADM_VID_CHECK
, old
);
863 swdev
->name
= (adm6996_model_name
[priv
->model
]);
864 swdev
->cpu_port
= ADM_CPU_PORT
;
865 swdev
->ports
= ADM_NUM_PORTS
;
866 swdev
->vlans
= ADM_NUM_VLANS
;
867 swdev
->ops
= &adm6996_ops
;
868 swdev
->alias
= alias
;
870 pr_info ("%s: %s model PHY found.\n", alias
, swdev
->name
);
872 mutex_lock(&priv
->reg_mutex
);
873 adm6996_perform_reset (priv
);
874 mutex_unlock(&priv
->reg_mutex
);
876 if (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
) {
877 return register_switch(swdev
, netdev
);
883 static int adm6996_config_init(struct phy_device
*pdev
)
885 struct adm6996_priv
*priv
;
888 pdev
->supported
= ADVERTISED_100baseT_Full
;
889 pdev
->advertising
= ADVERTISED_100baseT_Full
;
891 if (pdev
->addr
!= 0) {
892 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
893 , pdev
->attached_dev
->name
, pdev
->addr
);
897 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
901 mutex_init(&priv
->reg_mutex
);
903 priv
->read
= adm6996_read_mii_reg
;
904 priv
->write
= adm6996_write_mii_reg
;
906 ret
= adm6996_switch_init(priv
, pdev
->attached_dev
->name
, pdev
->attached_dev
);
916 * Warning: phydev->priv is NULL if phydev->addr != 0
918 static int adm6996_read_status(struct phy_device
*phydev
)
920 phydev
->speed
= SPEED_100
;
921 phydev
->duplex
= DUPLEX_FULL
;
927 * Warning: phydev->priv is NULL if phydev->addr != 0
929 static int adm6996_config_aneg(struct phy_device
*phydev
)
934 static int adm6996_fixup(struct phy_device
*dev
)
936 struct mii_bus
*bus
= dev
->bus
;
939 /* Our custom registers are at PHY addresses 0-10. Claim those. */
943 /* look for the switch on the bus */
944 reg
= bus
->read(bus
, PHYADDR(ADM_SIG0
)) & ADM_SIG0_MASK
;
945 if (reg
!= ADM_SIG0_VAL
)
948 reg
= bus
->read(bus
, PHYADDR(ADM_SIG1
)) & ADM_SIG1_MASK
;
949 if (reg
!= ADM_SIG1_VAL
)
952 dev
->phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
;
957 static int adm6996_probe(struct phy_device
*pdev
)
962 static void adm6996_remove(struct phy_device
*pdev
)
964 struct adm6996_priv
*priv
= phy_to_adm(pdev
);
966 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
967 unregister_switch(&priv
->dev
);
971 static struct phy_driver adm6996_phy_driver
= {
972 .name
= "Infineon ADM6996",
973 .phy_id
= (ADM_SIG0_VAL
<< 16) | ADM_SIG1_VAL
,
974 .phy_id_mask
= 0xffffffff,
975 .features
= PHY_BASIC_FEATURES
,
976 .probe
= adm6996_probe
,
977 .remove
= adm6996_remove
,
978 .config_init
= &adm6996_config_init
,
979 .config_aneg
= &adm6996_config_aneg
,
980 .read_status
= &adm6996_read_status
,
981 .driver
= { .owner
= THIS_MODULE
,},
984 static int adm6996_gpio_probe(struct platform_device
*pdev
)
986 struct adm6996_gpio_platform_data
*pdata
= pdev
->dev
.platform_data
;
987 struct adm6996_priv
*priv
;
993 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct adm6996_priv
), GFP_KERNEL
);
997 mutex_init(&priv
->reg_mutex
);
999 priv
->eecs
= pdata
->eecs
;
1000 priv
->eedi
= pdata
->eedi
;
1001 priv
->eerc
= pdata
->eerc
;
1002 priv
->eesk
= pdata
->eesk
;
1004 priv
->model
= pdata
->model
;
1005 priv
->read
= adm6996_read_gpio_reg
;
1006 priv
->write
= adm6996_write_gpio_reg
;
1008 ret
= devm_gpio_request(&pdev
->dev
, priv
->eecs
, "adm_eecs");
1011 ret
= devm_gpio_request(&pdev
->dev
, priv
->eedi
, "adm_eedi");
1014 ret
= devm_gpio_request(&pdev
->dev
, priv
->eerc
, "adm_eerc");
1017 ret
= devm_gpio_request(&pdev
->dev
, priv
->eesk
, "adm_eesk");
1021 ret
= adm6996_switch_init(priv
, dev_name(&pdev
->dev
), NULL
);
1025 platform_set_drvdata(pdev
, priv
);
1030 static int adm6996_gpio_remove(struct platform_device
*pdev
)
1032 struct adm6996_priv
*priv
= platform_get_drvdata(pdev
);
1034 if (priv
&& (priv
->model
== ADM6996M
|| priv
->model
== ADM6996L
))
1035 unregister_switch(&priv
->dev
);
1040 static struct platform_driver adm6996_gpio_driver
= {
1041 .probe
= adm6996_gpio_probe
,
1042 .remove
= adm6996_gpio_remove
,
1044 .name
= "adm6996_gpio",
1048 static int __init
adm6996_init(void)
1052 phy_register_fixup_for_id(PHY_ANY_ID
, adm6996_fixup
);
1053 err
= phy_driver_register(&adm6996_phy_driver
);
1057 err
= platform_driver_register(&adm6996_gpio_driver
);
1059 phy_driver_unregister(&adm6996_phy_driver
);
1064 static void __exit
adm6996_exit(void)
1066 platform_driver_unregister(&adm6996_gpio_driver
);
1067 phy_driver_unregister(&adm6996_phy_driver
);
1070 module_init(adm6996_init
);
1071 module_exit(adm6996_exit
);