2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
39 struct switch_dev dev
;
40 struct phy_device
*phy
;
41 u32 (*read
)(struct ar8216_priv
*priv
, int reg
);
42 void (*write
)(struct ar8216_priv
*priv
, int reg
, u32 val
);
43 const struct net_device_ops
*ndo_old
;
44 struct net_device_ops ndo
;
45 struct mutex reg_mutex
;
51 /* all fields below are cleared on reset */
53 u16 vlan_id
[AR8X16_MAX_VLANS
];
54 u8 vlan_table
[AR8X16_MAX_VLANS
];
56 u16 pvid
[AR8216_NUM_PORTS
];
59 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
62 split_addr(u32 regaddr
, u16
*r1
, u16
*r2
, u16
*page
)
71 *page
= regaddr
& 0x1ff;
75 ar8216_mii_read(struct ar8216_priv
*priv
, int reg
)
77 struct phy_device
*phy
= priv
->phy
;
81 split_addr((u32
) reg
, &r1
, &r2
, &page
);
82 mdiobus_write(phy
->bus
, 0x18, 0, page
);
83 msleep(1); /* wait for the page switch to propagate */
84 lo
= mdiobus_read(phy
->bus
, 0x10 | r2
, r1
);
85 hi
= mdiobus_read(phy
->bus
, 0x10 | r2
, r1
+ 1);
87 return (hi
<< 16) | lo
;
91 ar8216_mii_write(struct ar8216_priv
*priv
, int reg
, u32 val
)
93 struct phy_device
*phy
= priv
->phy
;
97 split_addr((u32
) reg
, &r1
, &r2
, &r3
);
98 mdiobus_write(phy
->bus
, 0x18, 0, r3
);
99 msleep(1); /* wait for the page switch to propagate */
102 hi
= (u16
) (val
>> 16);
103 mdiobus_write(phy
->bus
, 0x10 | r2
, r1
+ 1, hi
);
104 mdiobus_write(phy
->bus
, 0x10 | r2
, r1
, lo
);
108 ar8216_rmw(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
112 v
= priv
->read(priv
, reg
);
115 priv
->write(priv
, reg
, v
);
121 ar8216_id_chip(struct ar8216_priv
*priv
)
127 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
131 id
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
132 for (i
= 0; i
< AR8X16_PROBE_RETRIES
; i
++) {
135 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
139 t
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
154 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
155 (int)(id
>> AR8216_CTRL_VERSION_S
),
156 (int)(id
& AR8216_CTRL_REVISION
),
157 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 2),
158 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 3));
165 ar8216_set_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
166 struct switch_val
*val
)
168 struct ar8216_priv
*priv
= to_ar8216(dev
);
169 priv
->vlan
= !!val
->value
.i
;
174 ar8216_get_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
175 struct switch_val
*val
)
177 struct ar8216_priv
*priv
= to_ar8216(dev
);
178 val
->value
.i
= priv
->vlan
;
184 ar8216_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
186 struct ar8216_priv
*priv
= to_ar8216(dev
);
188 /* make sure no invalid PVIDs get set */
190 if (vlan
>= dev
->vlans
)
193 priv
->pvid
[port
] = vlan
;
198 ar8216_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
200 struct ar8216_priv
*priv
= to_ar8216(dev
);
201 *vlan
= priv
->pvid
[port
];
206 ar8216_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
207 struct switch_val
*val
)
209 struct ar8216_priv
*priv
= to_ar8216(dev
);
210 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
215 ar8216_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
216 struct switch_val
*val
)
218 struct ar8216_priv
*priv
= to_ar8216(dev
);
219 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
223 static const char *ar8216_speed_str(unsigned speed
)
226 case AR8216_PORT_SPEED_10M
:
228 case AR8216_PORT_SPEED_100M
:
230 case AR8216_PORT_SPEED_1000M
:
237 static int ar8216_port_get_link(struct switch_dev
*dev
,
238 const struct switch_attr
*attr
,
239 struct switch_val
*val
)
241 struct ar8216_priv
*priv
= to_ar8216(dev
);
246 port
= val
->port_vlan
;
248 memset(priv
->buf
, '\0', sizeof(priv
->buf
));
249 status
= priv
->read(priv
, AR8216_REG_PORT_STATUS(port
));
251 if (status
& AR8216_PORT_STATUS_LINK_UP
) {
252 len
= snprintf(priv
->buf
, sizeof(priv
->buf
),
253 "port:%d link:up speed:%s %s-duplex %s%s%s",
255 ar8216_speed_str((status
&
256 AR8216_PORT_STATUS_SPEED
) >>
257 AR8216_PORT_STATUS_SPEED_S
),
258 (status
& AR8216_PORT_STATUS_DUPLEX
) ?
260 (status
& AR8216_PORT_STATUS_TXFLOW
) ?
262 (status
& AR8216_PORT_STATUS_RXFLOW
) ?
264 (status
& AR8216_PORT_STATUS_LINK_AUTO
) ?
267 len
= snprintf(priv
->buf
, sizeof(priv
->buf
), "port:%d link:down",
271 val
->value
.s
= priv
->buf
;
278 ar8216_mangle_tx(struct sk_buff
*skb
, struct net_device
*dev
)
280 struct ar8216_priv
*priv
= dev
->phy_ptr
;
289 if (unlikely(skb_headroom(skb
) < 2)) {
290 if (pskb_expand_head(skb
, 2, 0, GFP_ATOMIC
) < 0)
294 buf
= skb_push(skb
, 2);
299 return priv
->ndo_old
->ndo_start_xmit(skb
, dev
);
302 dev_kfree_skb_any(skb
);
307 ar8216_mangle_rx(struct sk_buff
*skb
, int napi
)
309 struct ar8216_priv
*priv
;
310 struct net_device
*dev
;
322 /* don't strip the header if vlan mode is disabled */
326 /* strip header, get vlan id */
330 /* check for vlan header presence */
331 if ((buf
[12 + 2] != 0x81) || (buf
[13 + 2] != 0x00))
336 /* no need to fix up packets coming from a tagged source */
337 if (priv
->vlan_tagged
& (1 << port
))
340 /* lookup port vid from local table, the switch passes an invalid vlan id */
341 vlan
= priv
->vlan_id
[priv
->pvid
[port
]];
344 buf
[14 + 2] |= vlan
>> 8;
345 buf
[15 + 2] = vlan
& 0xff;
348 skb
->protocol
= eth_type_trans(skb
, skb
->dev
);
351 return netif_receive_skb(skb
);
353 return netif_rx(skb
);
356 /* no vlan? eat the packet! */
357 dev_kfree_skb_any(skb
);
362 ar8216_netif_rx(struct sk_buff
*skb
)
364 return ar8216_mangle_rx(skb
, 0);
368 ar8216_netif_receive_skb(struct sk_buff
*skb
)
370 return ar8216_mangle_rx(skb
, 1);
374 static struct switch_attr ar8216_globals
[] = {
376 .type
= SWITCH_TYPE_INT
,
377 .name
= "enable_vlan",
378 .description
= "Enable VLAN mode",
379 .set
= ar8216_set_vlan
,
380 .get
= ar8216_get_vlan
,
385 static struct switch_attr ar8216_port
[] = {
387 .type
= SWITCH_TYPE_STRING
,
389 .description
= "Get port link information",
392 .get
= ar8216_port_get_link
,
396 static struct switch_attr ar8216_vlan
[] = {
398 .type
= SWITCH_TYPE_INT
,
400 .description
= "VLAN ID (0-4094)",
401 .set
= ar8216_set_vid
,
402 .get
= ar8216_get_vid
,
409 ar8216_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
411 struct ar8216_priv
*priv
= to_ar8216(dev
);
412 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
416 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
417 struct switch_port
*p
;
419 if (!(ports
& (1 << i
)))
422 p
= &val
->value
.ports
[val
->len
++];
424 if (priv
->vlan_tagged
& (1 << i
))
425 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
433 ar8216_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
435 struct ar8216_priv
*priv
= to_ar8216(dev
);
436 u8
*vt
= &priv
->vlan_table
[val
->port_vlan
];
440 for (i
= 0; i
< val
->len
; i
++) {
441 struct switch_port
*p
= &val
->value
.ports
[i
];
443 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
))
444 priv
->vlan_tagged
|= (1 << p
->id
);
446 priv
->vlan_tagged
&= ~(1 << p
->id
);
447 priv
->pvid
[p
->id
] = val
->port_vlan
;
449 /* make sure that an untagged port does not
450 * appear in other vlans */
451 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
452 if (j
== val
->port_vlan
)
454 priv
->vlan_table
[j
] &= ~(1 << p
->id
);
464 ar8216_wait_bit(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
468 while ((priv
->read(priv
, reg
) & mask
) != val
) {
469 if (timeout
-- <= 0) {
470 printk(KERN_ERR
"ar8216: timeout waiting for operation to complete\n");
478 ar8216_vtu_op(struct ar8216_priv
*priv
, u32 op
, u32 val
)
480 if (ar8216_wait_bit(priv
, AR8216_REG_VTU
, AR8216_VTU_ACTIVE
, 0))
482 if ((op
& AR8216_VTU_OP
) == AR8216_VTU_OP_LOAD
) {
483 val
&= AR8216_VTUDATA_MEMBER
;
484 val
|= AR8216_VTUDATA_VALID
;
485 priv
->write(priv
, AR8216_REG_VTU_DATA
, val
);
487 op
|= AR8216_VTU_ACTIVE
;
488 priv
->write(priv
, AR8216_REG_VTU
, op
);
492 ar8216_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
493 u32 members
, u32 pvid
)
497 if (priv
->vlan
&& port
== AR8216_PORT_CPU
&& priv
->chip
== AR8216
)
498 header
= AR8216_PORT_CTRL_HEADER
;
502 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
503 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
504 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
505 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
506 AR8216_PORT_CTRL_LEARN
| header
|
507 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
508 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
510 ar8216_rmw(priv
, AR8216_REG_PORT_VLAN(port
),
511 AR8216_PORT_VLAN_DEST_PORTS
| AR8216_PORT_VLAN_MODE
|
512 AR8216_PORT_VLAN_DEFAULT_ID
,
513 (members
<< AR8216_PORT_VLAN_DEST_PORTS_S
) |
514 (ingress
<< AR8216_PORT_VLAN_MODE_S
) |
515 (pvid
<< AR8216_PORT_VLAN_DEFAULT_ID_S
));
519 ar8236_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
520 u32 members
, u32 pvid
)
522 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
523 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
524 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
525 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
526 AR8216_PORT_CTRL_LEARN
|
527 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
528 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
530 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN(port
),
531 AR8236_PORT_VLAN_DEFAULT_ID
,
532 (pvid
<< AR8236_PORT_VLAN_DEFAULT_ID_S
));
534 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN2(port
),
535 AR8236_PORT_VLAN2_VLAN_MODE
|
536 AR8236_PORT_VLAN2_MEMBER
,
537 (ingress
<< AR8236_PORT_VLAN2_VLAN_MODE_S
) |
538 (members
<< AR8236_PORT_VLAN2_MEMBER_S
));
542 ar8216_hw_apply(struct switch_dev
*dev
)
544 struct ar8216_priv
*priv
= to_ar8216(dev
);
545 u8 portmask
[AR8216_NUM_PORTS
];
548 mutex_lock(&priv
->reg_mutex
);
549 /* flush all vlan translation unit entries */
550 ar8216_vtu_op(priv
, AR8216_VTU_OP_FLUSH
, 0);
552 memset(portmask
, 0, sizeof(portmask
));
554 /* calculate the port destination masks and load vlans
555 * into the vlan translation unit */
556 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
557 u8 vp
= priv
->vlan_table
[j
];
562 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
565 portmask
[i
] |= vp
& ~mask
;
570 (priv
->vlan_id
[j
] << AR8216_VTU_VID_S
),
571 priv
->vlan_table
[j
]);
575 * isolate all ports, but connect them to the cpu port */
576 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
577 if (i
== AR8216_PORT_CPU
)
580 portmask
[i
] = 1 << AR8216_PORT_CPU
;
581 portmask
[AR8216_PORT_CPU
] |= (1 << i
);
585 /* update the port destination mask registers and tag settings */
586 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
591 pvid
= priv
->vlan_id
[priv
->pvid
[i
]];
596 if (priv
->vlan
&& (priv
->vlan_tagged
& (1 << i
))) {
597 egress
= AR8216_OUT_ADD_VLAN
;
599 egress
= AR8216_OUT_STRIP_VLAN
;
602 ingress
= AR8216_IN_SECURE
;
604 ingress
= AR8216_IN_PORT_ONLY
;
607 if (priv
->chip
== AR8236
)
608 ar8236_setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
611 ar8216_setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
614 mutex_unlock(&priv
->reg_mutex
);
619 ar8236_hw_init(struct ar8216_priv
*priv
) {
620 static int initialized
;
627 /* Initialize the PHYs */
628 bus
= priv
->phy
->bus
;
629 for (i
= 0; i
< 5; i
++) {
630 bus
->write(bus
, i
, MII_ADVERTISE
,
631 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
|
632 ADVERTISE_PAUSE_ASYM
);
633 bus
->write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
642 ar8316_hw_init(struct ar8216_priv
*priv
) {
647 val
= priv
->read(priv
, 0x8);
649 if (priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
650 if (priv
->port4_phy
) {
651 /* value taken from Ubiquiti RouterStation Pro */
653 printk(KERN_INFO
"ar8316: Using port 4 as PHY\n");
656 printk(KERN_INFO
"ar8316: Using port 4 as switch port\n");
658 } else if (priv
->phy
->interface
== PHY_INTERFACE_MODE_GMII
) {
659 /* value taken from AVM Fritz!Box 7390 sources */
662 /* no known value for phy interface */
663 printk(KERN_ERR
"ar8316: unsupported mii mode: %d.\n",
664 priv
->phy
->interface
);
671 priv
->write(priv
, 0x8, newval
);
673 /* standard atheros magic */
674 priv
->write(priv
, 0x38, 0xc000050e);
676 /* Initialize the ports */
677 bus
= priv
->phy
->bus
;
678 for (i
= 0; i
< 5; i
++) {
679 if ((i
== 4) && priv
->port4_phy
&&
680 priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
681 /* work around for phy4 rgmii mode */
682 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x12);
683 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x480c);
685 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x0);
686 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x824e);
688 mdiobus_write(bus
, i
, MII_ATH_DBG_ADDR
, 0x5);
689 mdiobus_write(bus
, i
, MII_ATH_DBG_DATA
, 0x3d47);
693 /* initialize the port itself */
694 mdiobus_write(bus
, i
, MII_ADVERTISE
,
695 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
);
696 mdiobus_write(bus
, i
, MII_CTRL1000
, ADVERTISE_1000FULL
);
697 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
702 priv
->initialized
= true;
707 ar8216_reset_switch(struct switch_dev
*dev
)
709 struct ar8216_priv
*priv
= to_ar8216(dev
);
712 mutex_lock(&priv
->reg_mutex
);
713 memset(&priv
->vlan
, 0, sizeof(struct ar8216_priv
) -
714 offsetof(struct ar8216_priv
, vlan
));
715 for (i
= 0; i
< AR8X16_MAX_VLANS
; i
++) {
716 priv
->vlan_id
[i
] = i
;
718 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
719 /* Enable port learning and tx */
720 priv
->write(priv
, AR8216_REG_PORT_CTRL(i
),
721 AR8216_PORT_CTRL_LEARN
|
722 (4 << AR8216_PORT_CTRL_STATE_S
));
724 priv
->write(priv
, AR8216_REG_PORT_VLAN(i
), 0);
726 /* Configure all PHYs */
727 if (i
== AR8216_PORT_CPU
) {
728 priv
->write(priv
, AR8216_REG_PORT_STATUS(i
),
729 AR8216_PORT_STATUS_LINK_UP
|
730 ((priv
->chip
== AR8316
) ?
731 AR8216_PORT_SPEED_1000M
: AR8216_PORT_SPEED_100M
) |
732 AR8216_PORT_STATUS_TXMAC
|
733 AR8216_PORT_STATUS_RXMAC
|
734 ((priv
->chip
== AR8316
) ? AR8216_PORT_STATUS_RXFLOW
: 0) |
735 ((priv
->chip
== AR8316
) ? AR8216_PORT_STATUS_TXFLOW
: 0) |
736 AR8216_PORT_STATUS_DUPLEX
);
738 priv
->write(priv
, AR8216_REG_PORT_STATUS(i
),
739 AR8216_PORT_STATUS_LINK_AUTO
);
742 /* XXX: undocumented magic from atheros, required! */
743 priv
->write(priv
, 0x38, 0xc000050e);
745 if (priv
->chip
== AR8216
) {
746 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
747 AR8216_GCTRL_MTU
, 1518 + 8 + 2);
748 } else if (priv
->chip
== AR8316
||
749 priv
->chip
== AR8236
) {
750 /* enable jumbo frames */
751 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
752 AR8316_GCTRL_MTU
, 9018 + 8 + 2);
755 if (priv
->chip
== AR8316
) {
756 /* enable cpu port to receive multicast and broadcast frames */
757 priv
->write(priv
, AR8216_REG_FLOOD_MASK
, 0x003f003f);
759 mutex_unlock(&priv
->reg_mutex
);
760 return ar8216_hw_apply(dev
);
764 static const struct switch_dev_ops ar8216_ops
= {
766 .attr
= ar8216_globals
,
767 .n_attr
= ARRAY_SIZE(ar8216_globals
),
771 .n_attr
= ARRAY_SIZE(ar8216_port
),
775 .n_attr
= ARRAY_SIZE(ar8216_vlan
),
777 .get_port_pvid
= ar8216_get_pvid
,
778 .set_port_pvid
= ar8216_set_pvid
,
779 .get_vlan_ports
= ar8216_get_ports
,
780 .set_vlan_ports
= ar8216_set_ports
,
781 .apply_config
= ar8216_hw_apply
,
782 .reset_switch
= ar8216_reset_switch
,
786 ar8216_config_init(struct phy_device
*pdev
)
788 struct ar8216_priv
*priv
= pdev
->priv
;
789 struct net_device
*dev
= pdev
->attached_dev
;
790 struct switch_dev
*swdev
;
794 priv
= kzalloc(sizeof(struct ar8216_priv
), GFP_KERNEL
);
801 priv
->chip
= ar8216_id_chip(priv
);
803 if (pdev
->addr
!= 0) {
804 if (priv
->chip
== AR8316
) {
805 pdev
->supported
|= SUPPORTED_1000baseT_Full
;
806 pdev
->advertising
|= ADVERTISED_1000baseT_Full
;
808 /* check if we're attaching to the switch twice */
809 pdev
= pdev
->bus
->phy_map
[0];
815 /* switch device has not been initialized, reuse priv */
817 priv
->port4_phy
= true;
824 /* switch device has been initialized, reinit */
826 priv
->dev
.ports
= (AR8216_NUM_PORTS
- 1);
827 priv
->initialized
= false;
828 priv
->port4_phy
= true;
829 ar8316_hw_init(priv
);
837 printk(KERN_INFO
"%s: AR%d switch driver attached.\n",
838 pdev
->attached_dev
->name
, priv
->chip
);
840 pdev
->supported
= priv
->chip
== AR8316
?
841 SUPPORTED_1000baseT_Full
: SUPPORTED_100baseT_Full
;
842 pdev
->advertising
= pdev
->supported
;
844 mutex_init(&priv
->reg_mutex
);
845 priv
->read
= ar8216_mii_read
;
846 priv
->write
= ar8216_mii_write
;
851 swdev
->cpu_port
= AR8216_PORT_CPU
;
852 swdev
->ops
= &ar8216_ops
;
853 swdev
->ports
= AR8216_NUM_PORTS
;
855 if (priv
->chip
== AR8316
) {
856 swdev
->name
= "Atheros AR8316";
857 swdev
->vlans
= AR8X16_MAX_VLANS
;
859 if (priv
->port4_phy
) {
860 /* port 5 connected to the other mac, therefore unusable */
861 swdev
->ports
= (AR8216_NUM_PORTS
- 1);
863 } else if (priv
->chip
== AR8236
) {
864 swdev
->name
= "Atheros AR8236";
865 swdev
->vlans
= AR8216_NUM_VLANS
;
866 swdev
->ports
= AR8216_NUM_PORTS
;
868 swdev
->name
= "Atheros AR8216";
869 swdev
->vlans
= AR8216_NUM_VLANS
;
872 if ((ret
= register_switch(&priv
->dev
, pdev
->attached_dev
)) < 0) {
877 if (priv
->chip
== AR8316
) {
878 ret
= ar8316_hw_init(priv
);
885 if (priv
->chip
== AR8236
) {
886 ret
= ar8236_hw_init(priv
);
893 ret
= ar8216_reset_switch(&priv
->dev
);
901 /* VID fixup only needed on ar8216 */
902 if (pdev
->addr
== 0 && priv
->chip
== AR8216
) {
904 pdev
->netif_receive_skb
= ar8216_netif_receive_skb
;
905 pdev
->netif_rx
= ar8216_netif_rx
;
906 priv
->ndo_old
= dev
->netdev_ops
;
907 memcpy(&priv
->ndo
, priv
->ndo_old
, sizeof(struct net_device_ops
));
908 priv
->ndo
.ndo_start_xmit
= ar8216_mangle_tx
;
909 dev
->netdev_ops
= &priv
->ndo
;
917 ar8216_read_status(struct phy_device
*phydev
)
919 struct ar8216_priv
*priv
= phydev
->priv
;
921 if (phydev
->addr
!= 0) {
922 return genphy_read_status(phydev
);
925 phydev
->speed
= priv
->chip
== AR8316
? SPEED_1000
: SPEED_100
;
926 phydev
->duplex
= DUPLEX_FULL
;
929 /* flush the address translation unit */
930 mutex_lock(&priv
->reg_mutex
);
931 ret
= ar8216_wait_bit(priv
, AR8216_REG_ATU
, AR8216_ATU_ACTIVE
, 0);
934 priv
->write(priv
, AR8216_REG_ATU
, AR8216_ATU_OP_FLUSH
);
937 mutex_unlock(&priv
->reg_mutex
);
939 phydev
->state
= PHY_RUNNING
;
940 netif_carrier_on(phydev
->attached_dev
);
941 phydev
->adjust_link(phydev
->attached_dev
);
947 ar8216_config_aneg(struct phy_device
*phydev
)
949 if (phydev
->addr
== 0)
952 return genphy_config_aneg(phydev
);
956 ar8216_probe(struct phy_device
*pdev
)
958 struct ar8216_priv priv
;
962 chip
= ar8216_id_chip(&priv
);
970 ar8216_remove(struct phy_device
*pdev
)
972 struct ar8216_priv
*priv
= pdev
->priv
;
973 struct net_device
*dev
= pdev
->attached_dev
;
978 if (priv
->ndo_old
&& dev
)
979 dev
->netdev_ops
= priv
->ndo_old
;
981 unregister_switch(&priv
->dev
);
985 static struct phy_driver ar8216_driver
= {
986 .phy_id
= 0x004d0000,
987 .name
= "Atheros AR8216/AR8316/AR8326",
988 .phy_id_mask
= 0xffff0000,
989 .features
= PHY_BASIC_FEATURES
,
990 .probe
= ar8216_probe
,
991 .remove
= ar8216_remove
,
992 .config_init
= &ar8216_config_init
,
993 .config_aneg
= &ar8216_config_aneg
,
994 .read_status
= &ar8216_read_status
,
995 .driver
= { .owner
= THIS_MODULE
},
1001 return phy_driver_register(&ar8216_driver
);
1007 phy_driver_unregister(&ar8216_driver
);
1010 module_init(ar8216_init
);
1011 module_exit(ar8216_exit
);
1012 MODULE_LICENSE("GPL");