2 * B53 switch driver main logic
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/gpio.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/switch.h>
27 #include <linux/platform_data/b53.h>
32 /* buffer size needed for displaying all MIBs with max'd values */
33 #define B53_BUF_SIZE 1188
42 /* BCM5365 MIB counters */
43 static const struct b53_mib_desc b53_mibs_65
[] = {
44 { 8, 0x00, "TxOctets" },
45 { 4, 0x08, "TxDropPkts" },
46 { 4, 0x10, "TxBroadcastPkts" },
47 { 4, 0x14, "TxMulticastPkts" },
48 { 4, 0x18, "TxUnicastPkts" },
49 { 4, 0x1c, "TxCollisions" },
50 { 4, 0x20, "TxSingleCollision" },
51 { 4, 0x24, "TxMultipleCollision" },
52 { 4, 0x28, "TxDeferredTransmit" },
53 { 4, 0x2c, "TxLateCollision" },
54 { 4, 0x30, "TxExcessiveCollision" },
55 { 4, 0x38, "TxPausePkts" },
56 { 8, 0x44, "RxOctets" },
57 { 4, 0x4c, "RxUndersizePkts" },
58 { 4, 0x50, "RxPausePkts" },
59 { 4, 0x54, "Pkts64Octets" },
60 { 4, 0x58, "Pkts65to127Octets" },
61 { 4, 0x5c, "Pkts128to255Octets" },
62 { 4, 0x60, "Pkts256to511Octets" },
63 { 4, 0x64, "Pkts512to1023Octets" },
64 { 4, 0x68, "Pkts1024to1522Octets" },
65 { 4, 0x6c, "RxOversizePkts" },
66 { 4, 0x70, "RxJabbers" },
67 { 4, 0x74, "RxAlignmentErrors" },
68 { 4, 0x78, "RxFCSErrors" },
69 { 8, 0x7c, "RxGoodOctets" },
70 { 4, 0x84, "RxDropPkts" },
71 { 4, 0x88, "RxUnicastPkts" },
72 { 4, 0x8c, "RxMulticastPkts" },
73 { 4, 0x90, "RxBroadcastPkts" },
74 { 4, 0x94, "RxSAChanges" },
75 { 4, 0x98, "RxFragments" },
79 /* BCM63xx MIB counters */
80 static const struct b53_mib_desc b53_mibs_63xx
[] = {
81 { 8, 0x00, "TxOctets" },
82 { 4, 0x08, "TxDropPkts" },
83 { 4, 0x0c, "TxQoSPkts" },
84 { 4, 0x10, "TxBroadcastPkts" },
85 { 4, 0x14, "TxMulticastPkts" },
86 { 4, 0x18, "TxUnicastPkts" },
87 { 4, 0x1c, "TxCollisions" },
88 { 4, 0x20, "TxSingleCollision" },
89 { 4, 0x24, "TxMultipleCollision" },
90 { 4, 0x28, "TxDeferredTransmit" },
91 { 4, 0x2c, "TxLateCollision" },
92 { 4, 0x30, "TxExcessiveCollision" },
93 { 4, 0x38, "TxPausePkts" },
94 { 8, 0x3c, "TxQoSOctets" },
95 { 8, 0x44, "RxOctets" },
96 { 4, 0x4c, "RxUndersizePkts" },
97 { 4, 0x50, "RxPausePkts" },
98 { 4, 0x54, "Pkts64Octets" },
99 { 4, 0x58, "Pkts65to127Octets" },
100 { 4, 0x5c, "Pkts128to255Octets" },
101 { 4, 0x60, "Pkts256to511Octets" },
102 { 4, 0x64, "Pkts512to1023Octets" },
103 { 4, 0x68, "Pkts1024to1522Octets" },
104 { 4, 0x6c, "RxOversizePkts" },
105 { 4, 0x70, "RxJabbers" },
106 { 4, 0x74, "RxAlignmentErrors" },
107 { 4, 0x78, "RxFCSErrors" },
108 { 8, 0x7c, "RxGoodOctets" },
109 { 4, 0x84, "RxDropPkts" },
110 { 4, 0x88, "RxUnicastPkts" },
111 { 4, 0x8c, "RxMulticastPkts" },
112 { 4, 0x90, "RxBroadcastPkts" },
113 { 4, 0x94, "RxSAChanges" },
114 { 4, 0x98, "RxFragments" },
115 { 4, 0xa0, "RxSymbolErrors" },
116 { 4, 0xa4, "RxQoSPkts" },
117 { 8, 0xa8, "RxQoSOctets" },
118 { 4, 0xb0, "Pkts1523to2047Octets" },
119 { 4, 0xb4, "Pkts2048to4095Octets" },
120 { 4, 0xb8, "Pkts4096to8191Octets" },
121 { 4, 0xbc, "Pkts8192to9728Octets" },
122 { 4, 0xc0, "RxDiscarded" },
127 static const struct b53_mib_desc b53_mibs
[] = {
128 { 8, 0x00, "TxOctets" },
129 { 4, 0x08, "TxDropPkts" },
130 { 4, 0x10, "TxBroadcastPkts" },
131 { 4, 0x14, "TxMulticastPkts" },
132 { 4, 0x18, "TxUnicastPkts" },
133 { 4, 0x1c, "TxCollisions" },
134 { 4, 0x20, "TxSingleCollision" },
135 { 4, 0x24, "TxMultipleCollision" },
136 { 4, 0x28, "TxDeferredTransmit" },
137 { 4, 0x2c, "TxLateCollision" },
138 { 4, 0x30, "TxExcessiveCollision" },
139 { 4, 0x38, "TxPausePkts" },
140 { 8, 0x50, "RxOctets" },
141 { 4, 0x58, "RxUndersizePkts" },
142 { 4, 0x5c, "RxPausePkts" },
143 { 4, 0x60, "Pkts64Octets" },
144 { 4, 0x64, "Pkts65to127Octets" },
145 { 4, 0x68, "Pkts128to255Octets" },
146 { 4, 0x6c, "Pkts256to511Octets" },
147 { 4, 0x70, "Pkts512to1023Octets" },
148 { 4, 0x74, "Pkts1024to1522Octets" },
149 { 4, 0x78, "RxOversizePkts" },
150 { 4, 0x7c, "RxJabbers" },
151 { 4, 0x80, "RxAlignmentErrors" },
152 { 4, 0x84, "RxFCSErrors" },
153 { 8, 0x88, "RxGoodOctets" },
154 { 4, 0x90, "RxDropPkts" },
155 { 4, 0x94, "RxUnicastPkts" },
156 { 4, 0x98, "RxMulticastPkts" },
157 { 4, 0x9c, "RxBroadcastPkts" },
158 { 4, 0xa0, "RxSAChanges" },
159 { 4, 0xa4, "RxFragments" },
160 { 4, 0xa8, "RxJumboPkts" },
161 { 4, 0xac, "RxSymbolErrors" },
162 { 4, 0xc0, "RxDiscarded" },
166 static int b53_do_vlan_op(struct b53_device
*dev
, u8 op
)
170 b53_write8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], VTA_START_CMD
| op
);
172 for (i
= 0; i
< 10; i
++) {
175 b53_read8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], &vta
);
176 if (!(vta
& VTA_START_CMD
))
179 usleep_range(100, 200);
185 static void b53_set_vlan_entry(struct b53_device
*dev
, u16 vid
, u16 members
,
192 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_25
;
194 b53_write32(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_25
, entry
);
195 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, vid
|
196 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
197 } else if (is5365(dev
)) {
201 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_65
;
203 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_65
, entry
);
204 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_65
, vid
|
205 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
207 b53_write16(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[1], vid
);
208 b53_write32(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[2],
209 (untag
<< VTE_UNTAG_S
) | members
);
211 b53_do_vlan_op(dev
, VTA_CMD_WRITE
);
215 void b53_set_forwarding(struct b53_device
*dev
, int enable
)
219 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
222 mgmt
|= SM_SW_FWD_EN
;
224 mgmt
&= ~SM_SW_FWD_EN
;
226 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
229 static void b53_enable_vlan(struct b53_device
*dev
, int enable
)
231 u8 mgmt
, vc0
, vc1
, vc4
= 0, vc5
;
233 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
234 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, &vc0
);
235 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, &vc1
);
237 if (is5325(dev
) || is5365(dev
)) {
238 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
239 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, &vc5
);
240 } else if (is63xx(dev
)) {
241 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, &vc4
);
242 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, &vc5
);
244 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, &vc4
);
245 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, &vc5
);
248 mgmt
&= ~SM_SW_FWD_MODE
;
251 vc0
|= VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
;
252 vc1
|= VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
;
253 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
254 vc4
|= VC4_ING_VID_VIO_DROP
<< VC4_ING_VID_CHECK_S
;
255 vc5
|= VC5_DROP_VTABLE_MISS
;
258 vc0
&= ~VC0_RESERVED_1
;
260 if (is5325(dev
) || is5365(dev
))
261 vc1
|= VC1_RX_MCST_TAG_EN
;
263 if (!is5325(dev
) && !is5365(dev
)) {
264 if (dev
->allow_vid_4095
)
265 vc5
|= VC5_VID_FFF_EN
;
267 vc5
&= ~VC5_VID_FFF_EN
;
270 vc0
&= ~(VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
);
271 vc1
&= ~(VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
);
272 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
273 vc5
&= ~VC5_DROP_VTABLE_MISS
;
275 if (is5325(dev
) || is5365(dev
))
276 vc4
|= VC4_ING_VID_VIO_FWD
<< VC4_ING_VID_CHECK_S
;
278 vc4
|= VC4_ING_VID_VIO_TO_IMP
<< VC4_ING_VID_CHECK_S
;
280 if (is5325(dev
) || is5365(dev
))
281 vc1
&= ~VC1_RX_MCST_TAG_EN
;
283 if (!is5325(dev
) && !is5365(dev
))
284 vc5
&= ~VC5_VID_FFF_EN
;
287 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, vc0
);
288 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, vc1
);
290 if (is5325(dev
) || is5365(dev
)) {
291 /* enable the high 8 bit vid check on 5325 */
292 if (is5325(dev
) && enable
)
293 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
,
296 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
298 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, vc4
);
299 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, vc5
);
300 } else if (is63xx(dev
)) {
301 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3_63XX
, 0);
302 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, vc4
);
303 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, vc5
);
305 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
306 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, vc4
);
307 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, vc5
);
310 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
313 static int b53_set_jumbo(struct b53_device
*dev
, int enable
, int allow_10_100
)
316 u16 max_size
= JMS_MIN_SIZE
;
318 if (is5325(dev
) || is5365(dev
))
322 port_mask
= dev
->enabled_ports
;
323 max_size
= JMS_MAX_SIZE
;
325 port_mask
|= JPM_10_100_JUMBO_EN
;
328 b53_write32(dev
, B53_JUMBO_PAGE
, dev
->jumbo_pm_reg
, port_mask
);
329 return b53_write16(dev
, B53_JUMBO_PAGE
, dev
->jumbo_size_reg
, max_size
);
332 static int b53_flush_arl(struct b53_device
*dev
)
336 b53_write8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
337 FAST_AGE_DONE
| FAST_AGE_DYNAMIC
| FAST_AGE_STATIC
);
339 for (i
= 0; i
< 10; i
++) {
342 b53_read8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
345 if (!(fast_age_ctrl
& FAST_AGE_DONE
))
351 pr_warn("time out while flushing ARL\n");
356 static void b53_enable_ports(struct b53_device
*dev
)
360 b53_for_each_port(dev
, i
) {
365 * prevent leaking packets between wan and lan in unmanaged
366 * mode through port vlans.
368 if (dev
->enable_vlan
|| is_cpu_port(dev
, i
))
370 else if (is531x5(dev
))
371 /* BCM53115 may use a different port as cpu port */
372 pvlan_mask
= BIT(dev
->sw_dev
.cpu_port
);
374 pvlan_mask
= BIT(B53_CPU_PORT
);
376 /* BCM5325 CPU port is at 8 */
377 if ((is5325(dev
) || is5365(dev
)) && i
== B53_CPU_PORT_25
)
380 if (dev
->chip_id
== BCM5398_DEVICE_ID
&& (i
== 6 || i
== 7))
381 /* disable unused ports 6 & 7 */
382 port_ctrl
= PORT_CTRL_RX_DISABLE
| PORT_CTRL_TX_DISABLE
;
383 else if (i
== B53_CPU_PORT
)
384 port_ctrl
= PORT_CTRL_RX_BCST_EN
|
385 PORT_CTRL_RX_MCST_EN
|
386 PORT_CTRL_RX_UCST_EN
;
390 b53_write16(dev
, B53_PVLAN_PAGE
, B53_PVLAN_PORT_MASK(i
),
393 /* port state is handled by bcm63xx_enet driver */
395 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_CTRL(i
),
400 static void b53_enable_mib(struct b53_device
*dev
)
404 b53_read8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
406 gc
&= ~(GC_RESET_MIB
| GC_MIB_AC_EN
);
408 b53_write8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, gc
);
411 static int b53_apply(struct b53_device
*dev
)
415 /* clear all vlan entries */
416 if (is5325(dev
) || is5365(dev
)) {
417 for (i
= 1; i
< dev
->sw_dev
.vlans
; i
++)
418 b53_set_vlan_entry(dev
, i
, 0, 0);
420 b53_do_vlan_op(dev
, VTA_CMD_CLEAR
);
423 b53_enable_vlan(dev
, dev
->enable_vlan
);
425 /* fill VLAN table */
426 if (dev
->enable_vlan
) {
427 for (i
= 0; i
< dev
->sw_dev
.vlans
; i
++) {
428 struct b53_vlan
*vlan
= &dev
->vlans
[i
];
433 b53_set_vlan_entry(dev
, i
, vlan
->members
, vlan
->untag
);
436 b53_for_each_port(dev
, i
)
437 b53_write16(dev
, B53_VLAN_PAGE
,
438 B53_VLAN_PORT_DEF_TAG(i
),
441 b53_for_each_port(dev
, i
)
442 b53_write16(dev
, B53_VLAN_PAGE
,
443 B53_VLAN_PORT_DEF_TAG(i
), 1);
447 b53_enable_ports(dev
);
449 if (!is5325(dev
) && !is5365(dev
))
450 b53_set_jumbo(dev
, dev
->enable_jumbo
, 1);
455 void b53_switch_reset_gpio(struct b53_device
*dev
)
457 int gpio
= dev
->reset_gpio
;
463 * Reset sequence: RESET low(50ms)->high(20ms)
465 gpio_set_value(gpio
, 0);
468 gpio_set_value(gpio
, 1);
471 dev
->current_page
= 0xff;
474 static int b53_switch_reset(struct b53_device
*dev
)
478 b53_switch_reset_gpio(dev
);
480 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
482 if (!(mgmt
& SM_SW_FWD_EN
)) {
483 mgmt
&= ~SM_SW_FWD_MODE
;
484 mgmt
|= SM_SW_FWD_EN
;
486 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
487 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
489 if (!(mgmt
& SM_SW_FWD_EN
)) {
490 pr_err("Failed to enable switch!\n");
495 /* enable all ports */
496 b53_enable_ports(dev
);
498 /* configure MII port if necessary */
500 u8 mii_port_override
;
502 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
504 /* reverse mii needs to be enabled */
505 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
506 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
507 mii_port_override
| PORT_OVERRIDE_RV_MII_25
);
508 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
511 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
512 pr_err("Failed to enable reverse MII mode\n");
516 } else if (is531x5(dev
) && dev
->sw_dev
.cpu_port
== B53_CPU_PORT
) {
517 u8 mii_port_override
;
519 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
521 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
522 mii_port_override
| PORT_OVERRIDE_EN
|
528 return b53_flush_arl(dev
);
532 * Swconfig glue functions
535 static int b53_global_get_vlan_enable(struct switch_dev
*dev
,
536 const struct switch_attr
*attr
,
537 struct switch_val
*val
)
539 struct b53_device
*priv
= sw_to_b53(dev
);
541 val
->value
.i
= priv
->enable_vlan
;
546 static int b53_global_set_vlan_enable(struct switch_dev
*dev
,
547 const struct switch_attr
*attr
,
548 struct switch_val
*val
)
550 struct b53_device
*priv
= sw_to_b53(dev
);
552 priv
->enable_vlan
= val
->value
.i
;
557 static int b53_global_get_jumbo_enable(struct switch_dev
*dev
,
558 const struct switch_attr
*attr
,
559 struct switch_val
*val
)
561 struct b53_device
*priv
= sw_to_b53(dev
);
563 val
->value
.i
= priv
->enable_jumbo
;
568 static int b53_global_set_jumbo_enable(struct switch_dev
*dev
,
569 const struct switch_attr
*attr
,
570 struct switch_val
*val
)
572 struct b53_device
*priv
= sw_to_b53(dev
);
574 priv
->enable_jumbo
= val
->value
.i
;
579 static int b53_global_get_4095_enable(struct switch_dev
*dev
,
580 const struct switch_attr
*attr
,
581 struct switch_val
*val
)
583 struct b53_device
*priv
= sw_to_b53(dev
);
585 val
->value
.i
= priv
->allow_vid_4095
;
590 static int b53_global_set_4095_enable(struct switch_dev
*dev
,
591 const struct switch_attr
*attr
,
592 struct switch_val
*val
)
594 struct b53_device
*priv
= sw_to_b53(dev
);
596 priv
->allow_vid_4095
= val
->value
.i
;
601 static int b53_global_get_ports(struct switch_dev
*dev
,
602 const struct switch_attr
*attr
,
603 struct switch_val
*val
)
605 struct b53_device
*priv
= sw_to_b53(dev
);
607 val
->len
= snprintf(priv
->buf
, B53_BUF_SIZE
, "0x%04x",
608 priv
->enabled_ports
);
609 val
->value
.s
= priv
->buf
;
614 static int b53_port_get_pvid(struct switch_dev
*dev
, int port
, int *val
)
616 struct b53_device
*priv
= sw_to_b53(dev
);
618 *val
= priv
->ports
[port
].pvid
;
623 static int b53_port_set_pvid(struct switch_dev
*dev
, int port
, int val
)
625 struct b53_device
*priv
= sw_to_b53(dev
);
627 if (val
> 15 && is5325(priv
))
629 if (val
== 4095 && !priv
->allow_vid_4095
)
632 priv
->ports
[port
].pvid
= val
;
637 static int b53_vlan_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
639 struct b53_device
*priv
= sw_to_b53(dev
);
640 struct switch_port
*port
= &val
->value
.ports
[0];
641 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
649 for (i
= 0; i
< dev
->ports
; i
++) {
650 if (!(vlan
->members
& BIT(i
)))
654 if (!(vlan
->untag
& BIT(i
)))
655 port
->flags
= BIT(SWITCH_PORT_FLAG_TAGGED
);
667 static int b53_vlan_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
669 struct b53_device
*priv
= sw_to_b53(dev
);
670 struct switch_port
*port
;
671 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
674 /* only BCM5325 and BCM5365 supports VID 0 */
675 if (val
->port_vlan
== 0 && !is5325(priv
) && !is5365(priv
))
678 /* VLAN 4095 needs special handling */
679 if (val
->port_vlan
== 4095 && !priv
->allow_vid_4095
)
682 port
= &val
->value
.ports
[0];
685 for (i
= 0; i
< val
->len
; i
++, port
++) {
686 vlan
->members
|= BIT(port
->id
);
688 if (!(port
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))) {
689 vlan
->untag
|= BIT(port
->id
);
690 priv
->ports
[port
->id
].pvid
= val
->port_vlan
;
694 /* ignore disabled ports */
695 vlan
->members
&= priv
->enabled_ports
;
696 vlan
->untag
&= priv
->enabled_ports
;
701 static int b53_port_get_link(struct switch_dev
*dev
, int port
,
702 struct switch_port_link
*link
)
704 struct b53_device
*priv
= sw_to_b53(dev
);
706 if (is_cpu_port(priv
, port
)) {
709 link
->speed
= is5325(priv
) || is5365(priv
) ?
710 SWITCH_PORT_SPEED_100
: SWITCH_PORT_SPEED_1000
;
712 } else if (priv
->enabled_ports
& BIT(port
)) {
716 b53_read16(priv
, B53_STAT_PAGE
, B53_LINK_STAT
, &lnk
);
717 b53_read16(priv
, B53_STAT_PAGE
, priv
->duplex_reg
, &duplex
);
719 lnk
= (lnk
>> port
) & 1;
720 duplex
= (duplex
>> port
) & 1;
722 if (is5325(priv
) || is5365(priv
)) {
725 b53_read16(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &tmp
);
726 speed
= SPEED_PORT_FE(tmp
, port
);
728 b53_read32(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &speed
);
729 speed
= SPEED_PORT_GE(speed
, port
);
734 link
->duplex
= duplex
;
737 link
->speed
= SWITCH_PORT_SPEED_10
;
739 case SPEED_STAT_100M
:
740 link
->speed
= SWITCH_PORT_SPEED_100
;
742 case SPEED_STAT_1000M
:
743 link
->speed
= SWITCH_PORT_SPEED_1000
;
757 static int b53_global_reset_switch(struct switch_dev
*dev
)
759 struct b53_device
*priv
= sw_to_b53(dev
);
762 priv
->enable_vlan
= 0;
763 priv
->enable_jumbo
= 0;
764 priv
->allow_vid_4095
= 0;
766 memset(priv
->vlans
, 0, sizeof(priv
->vlans
) * dev
->vlans
);
767 memset(priv
->ports
, 0, sizeof(priv
->ports
) * dev
->ports
);
769 return b53_switch_reset(priv
);
772 static int b53_global_apply_config(struct switch_dev
*dev
)
774 struct b53_device
*priv
= sw_to_b53(dev
);
776 /* disable switching */
777 b53_set_forwarding(priv
, 0);
781 /* enable switching */
782 b53_set_forwarding(priv
, 1);
788 static int b53_global_reset_mib(struct switch_dev
*dev
,
789 const struct switch_attr
*attr
,
790 struct switch_val
*val
)
792 struct b53_device
*priv
= sw_to_b53(dev
);
795 b53_read8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
797 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
| GC_RESET_MIB
);
799 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
& ~GC_RESET_MIB
);
805 static int b53_port_get_mib(struct switch_dev
*sw_dev
,
806 const struct switch_attr
*attr
,
807 struct switch_val
*val
)
809 struct b53_device
*dev
= sw_to_b53(sw_dev
);
810 const struct b53_mib_desc
*mibs
;
811 int port
= val
->port_vlan
;
814 if (!(BIT(port
) & dev
->enabled_ports
))
822 } else if (is63xx(dev
)) {
823 mibs
= b53_mibs_63xx
;
830 for (; mibs
->size
> 0; mibs
++) {
833 if (mibs
->size
== 8) {
834 b53_read64(dev
, B53_MIB_PAGE(port
), mibs
->offset
, &val
);
838 b53_read32(dev
, B53_MIB_PAGE(port
), mibs
->offset
,
843 len
+= snprintf(dev
->buf
+ len
, B53_BUF_SIZE
- len
,
844 "%-20s: %llu\n", mibs
->name
, val
);
848 val
->value
.s
= dev
->buf
;
853 static struct switch_attr b53_global_ops_25
[] = {
855 .type
= SWITCH_TYPE_INT
,
856 .name
= "enable_vlan",
857 .description
= "Enable VLAN mode",
858 .set
= b53_global_set_vlan_enable
,
859 .get
= b53_global_get_vlan_enable
,
863 .type
= SWITCH_TYPE_STRING
,
865 .description
= "Available ports (as bitmask)",
866 .get
= b53_global_get_ports
,
870 static struct switch_attr b53_global_ops_65
[] = {
872 .type
= SWITCH_TYPE_INT
,
873 .name
= "enable_vlan",
874 .description
= "Enable VLAN mode",
875 .set
= b53_global_set_vlan_enable
,
876 .get
= b53_global_get_vlan_enable
,
880 .type
= SWITCH_TYPE_STRING
,
882 .description
= "Available ports (as bitmask)",
883 .get
= b53_global_get_ports
,
886 .type
= SWITCH_TYPE_INT
,
888 .description
= "Reset MIB counters",
889 .set
= b53_global_reset_mib
,
893 static struct switch_attr b53_global_ops
[] = {
895 .type
= SWITCH_TYPE_INT
,
896 .name
= "enable_vlan",
897 .description
= "Enable VLAN mode",
898 .set
= b53_global_set_vlan_enable
,
899 .get
= b53_global_get_vlan_enable
,
903 .type
= SWITCH_TYPE_STRING
,
905 .description
= "Available Ports (as bitmask)",
906 .get
= b53_global_get_ports
,
909 .type
= SWITCH_TYPE_INT
,
911 .description
= "Reset MIB counters",
912 .set
= b53_global_reset_mib
,
915 .type
= SWITCH_TYPE_INT
,
916 .name
= "enable_jumbo",
917 .description
= "Enable Jumbo Frames",
918 .set
= b53_global_set_jumbo_enable
,
919 .get
= b53_global_get_jumbo_enable
,
923 .type
= SWITCH_TYPE_INT
,
924 .name
= "allow_vid_4095",
925 .description
= "Allow VID 4095",
926 .set
= b53_global_set_4095_enable
,
927 .get
= b53_global_get_4095_enable
,
932 static struct switch_attr b53_port_ops
[] = {
934 .type
= SWITCH_TYPE_STRING
,
936 .description
= "Get port's MIB counters",
937 .get
= b53_port_get_mib
,
941 static struct switch_attr b53_no_ops
[] = {
944 static const struct switch_dev_ops b53_switch_ops_25
= {
946 .attr
= b53_global_ops_25
,
947 .n_attr
= ARRAY_SIZE(b53_global_ops_25
),
951 .n_attr
= ARRAY_SIZE(b53_no_ops
),
955 .n_attr
= ARRAY_SIZE(b53_no_ops
),
958 .get_vlan_ports
= b53_vlan_get_ports
,
959 .set_vlan_ports
= b53_vlan_set_ports
,
960 .get_port_pvid
= b53_port_get_pvid
,
961 .set_port_pvid
= b53_port_set_pvid
,
962 .apply_config
= b53_global_apply_config
,
963 .reset_switch
= b53_global_reset_switch
,
964 .get_port_link
= b53_port_get_link
,
967 static const struct switch_dev_ops b53_switch_ops_65
= {
969 .attr
= b53_global_ops_65
,
970 .n_attr
= ARRAY_SIZE(b53_global_ops_65
),
974 .n_attr
= ARRAY_SIZE(b53_port_ops
),
978 .n_attr
= ARRAY_SIZE(b53_no_ops
),
981 .get_vlan_ports
= b53_vlan_get_ports
,
982 .set_vlan_ports
= b53_vlan_set_ports
,
983 .get_port_pvid
= b53_port_get_pvid
,
984 .set_port_pvid
= b53_port_set_pvid
,
985 .apply_config
= b53_global_apply_config
,
986 .reset_switch
= b53_global_reset_switch
,
987 .get_port_link
= b53_port_get_link
,
990 static const struct switch_dev_ops b53_switch_ops
= {
992 .attr
= b53_global_ops
,
993 .n_attr
= ARRAY_SIZE(b53_global_ops
),
996 .attr
= b53_port_ops
,
997 .n_attr
= ARRAY_SIZE(b53_port_ops
),
1001 .n_attr
= ARRAY_SIZE(b53_no_ops
),
1004 .get_vlan_ports
= b53_vlan_get_ports
,
1005 .set_vlan_ports
= b53_vlan_set_ports
,
1006 .get_port_pvid
= b53_port_get_pvid
,
1007 .set_port_pvid
= b53_port_set_pvid
,
1008 .apply_config
= b53_global_apply_config
,
1009 .reset_switch
= b53_global_reset_switch
,
1010 .get_port_link
= b53_port_get_link
,
1013 struct b53_chip_data
{
1015 const char *dev_name
;
1024 const struct switch_dev_ops
*sw_ops
;
1027 #define B53_VTA_REGS \
1028 { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1029 #define B53_VTA_REGS_9798 \
1030 { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1031 #define B53_VTA_REGS_63XX \
1032 { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1034 static const struct b53_chip_data b53_switch_chips
[] = {
1036 .chip_id
= BCM5325_DEVICE_ID
,
1037 .dev_name
= "BCM5325",
1040 .enabled_ports
= 0x1f,
1041 .cpu_port
= B53_CPU_PORT_25
,
1042 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1043 .sw_ops
= &b53_switch_ops_25
,
1046 .chip_id
= BCM5365_DEVICE_ID
,
1047 .dev_name
= "BCM5365",
1050 .enabled_ports
= 0x1f,
1051 .cpu_port
= B53_CPU_PORT_25
,
1052 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1053 .sw_ops
= &b53_switch_ops_65
,
1056 .chip_id
= BCM5395_DEVICE_ID
,
1057 .dev_name
= "BCM5395",
1060 .enabled_ports
= 0x1f,
1061 .cpu_port
= B53_CPU_PORT
,
1062 .vta_regs
= B53_VTA_REGS
,
1063 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1064 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1065 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1066 .sw_ops
= &b53_switch_ops
,
1069 .chip_id
= BCM5397_DEVICE_ID
,
1070 .dev_name
= "BCM5397",
1073 .enabled_ports
= 0x1f,
1074 .cpu_port
= B53_CPU_PORT
,
1075 .vta_regs
= B53_VTA_REGS_9798
,
1076 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1077 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1078 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1079 .sw_ops
= &b53_switch_ops
,
1082 .chip_id
= BCM5398_DEVICE_ID
,
1083 .dev_name
= "BCM5398",
1086 .enabled_ports
= 0x7f,
1087 .cpu_port
= B53_CPU_PORT
,
1088 .vta_regs
= B53_VTA_REGS_9798
,
1089 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1090 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1091 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1092 .sw_ops
= &b53_switch_ops
,
1095 .chip_id
= BCM53115_DEVICE_ID
,
1096 .dev_name
= "BCM53115",
1097 .alias
= "bcm53115",
1099 .enabled_ports
= 0x1f,
1100 .vta_regs
= B53_VTA_REGS
,
1101 .cpu_port
= B53_CPU_PORT
,
1102 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1103 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1104 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1105 .sw_ops
= &b53_switch_ops
,
1108 .chip_id
= BCM53125_DEVICE_ID
,
1109 .dev_name
= "BCM53125",
1110 .alias
= "bcm53125",
1112 .enabled_ports
= 0x1f,
1113 .cpu_port
= B53_CPU_PORT
,
1114 .vta_regs
= B53_VTA_REGS
,
1115 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1116 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1117 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1118 .sw_ops
= &b53_switch_ops
,
1121 .chip_id
= BCM63XX_DEVICE_ID
,
1122 .dev_name
= "BCM63xx",
1125 .enabled_ports
= 0, /* pdata must provide them */
1126 .cpu_port
= B53_CPU_PORT
,
1127 .vta_regs
= B53_VTA_REGS_63XX
,
1128 .duplex_reg
= B53_DUPLEX_STAT_63XX
,
1129 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK_63XX
,
1130 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE_63XX
,
1131 .sw_ops
= &b53_switch_ops
,
1135 int b53_switch_init(struct b53_device
*dev
)
1137 struct switch_dev
*sw_dev
= &dev
->sw_dev
;
1141 for (i
= 0; i
< ARRAY_SIZE(b53_switch_chips
); i
++) {
1142 const struct b53_chip_data
*chip
= &b53_switch_chips
[i
];
1144 if (chip
->chip_id
== dev
->chip_id
) {
1145 sw_dev
->name
= chip
->dev_name
;
1147 sw_dev
->alias
= chip
->alias
;
1148 if (!dev
->enabled_ports
)
1149 dev
->enabled_ports
= chip
->enabled_ports
;
1150 dev
->duplex_reg
= chip
->duplex_reg
;
1151 dev
->vta_regs
[0] = chip
->vta_regs
[0];
1152 dev
->vta_regs
[1] = chip
->vta_regs
[1];
1153 dev
->vta_regs
[2] = chip
->vta_regs
[2];
1154 dev
->jumbo_pm_reg
= chip
->jumbo_pm_reg
;
1155 sw_dev
->ops
= chip
->sw_ops
;
1156 sw_dev
->cpu_port
= chip
->cpu_port
;
1157 sw_dev
->vlans
= chip
->vlans
;
1165 /* check which BCM5325x version we have */
1169 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
1171 /* check reserved bits */
1177 /* BCM5325F - do not use port 4 */
1178 dev
->enabled_ports
&= ~BIT(4);
1181 /* On the BCM47XX SoCs this is the supported internal switch.*/
1182 #ifndef CONFIG_BCM47XX
1189 } else if (dev
->chip_id
== BCM53115_DEVICE_ID
) {
1192 b53_read48(dev
, B53_STAT_PAGE
, B53_STRAP_VALUE
, &strap_value
);
1193 /* use second IMP port if GMII is enabled */
1194 if (strap_value
& SV_GMII_CTRL_115
)
1195 sw_dev
->cpu_port
= 5;
1198 /* cpu port is always last */
1199 sw_dev
->ports
= sw_dev
->cpu_port
+ 1;
1200 dev
->enabled_ports
|= BIT(sw_dev
->cpu_port
);
1202 dev
->ports
= devm_kzalloc(dev
->dev
,
1203 sizeof(struct b53_port
) * sw_dev
->ports
,
1208 dev
->vlans
= devm_kzalloc(dev
->dev
,
1209 sizeof(struct b53_vlan
) * sw_dev
->vlans
,
1214 dev
->buf
= devm_kzalloc(dev
->dev
, B53_BUF_SIZE
, GFP_KERNEL
);
1218 dev
->reset_gpio
= b53_switch_get_reset_gpio(dev
);
1219 if (dev
->reset_gpio
>= 0) {
1220 ret
= devm_gpio_request_one(dev
->dev
, dev
->reset_gpio
, GPIOF_OUT_INIT_HIGH
, "robo_reset");
1225 return b53_switch_reset(dev
);
1228 struct b53_device
*b53_switch_alloc(struct device
*base
, struct b53_io_ops
*ops
,
1231 struct b53_device
*dev
;
1233 dev
= devm_kzalloc(base
, sizeof(*dev
), GFP_KERNEL
);
1240 mutex_init(&dev
->reg_mutex
);
1244 EXPORT_SYMBOL(b53_switch_alloc
);
1246 int b53_switch_detect(struct b53_device
*dev
)
1253 ret
= b53_read8(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id8
);
1260 * BCM5325 and BCM5365 do not have this register so reads
1261 * return 0. But the read operation did succeed, so assume
1262 * this is one of them.
1264 * Next check if we can write to the 5325's VTA register; for
1265 * 5365 it is read only.
1268 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, 0xf);
1269 b53_read16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, &tmp
);
1272 dev
->chip_id
= BCM5325_DEVICE_ID
;
1274 dev
->chip_id
= BCM5365_DEVICE_ID
;
1276 case BCM5395_DEVICE_ID
:
1277 case BCM5397_DEVICE_ID
:
1278 case BCM5398_DEVICE_ID
:
1282 ret
= b53_read32(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id32
);
1287 case BCM53115_DEVICE_ID
:
1288 case BCM53125_DEVICE_ID
:
1289 dev
->chip_id
= id32
;
1292 pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1298 return b53_read8(dev
, B53_MGMT_PAGE
, B53_REV_ID
, &dev
->core_rev
);
1300 EXPORT_SYMBOL(b53_switch_detect
);
1302 int b53_switch_register(struct b53_device
*dev
)
1307 dev
->chip_id
= dev
->pdata
->chip_id
;
1308 dev
->enabled_ports
= dev
->pdata
->enabled_ports
;
1309 dev
->sw_dev
.alias
= dev
->pdata
->alias
;
1312 if (!dev
->chip_id
&& b53_switch_detect(dev
))
1315 ret
= b53_switch_init(dev
);
1319 pr_info("found switch: %s, rev %i\n", dev
->sw_dev
.name
, dev
->core_rev
);
1321 return register_switch(&dev
->sw_dev
, NULL
);
1323 EXPORT_SYMBOL(b53_switch_register
);
1325 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1326 MODULE_DESCRIPTION("B53 switch library");
1327 MODULE_LICENSE("Dual BSD/GPL");