2 * B53 switch driver main logic
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/switch.h>
26 #include <linux/platform_data/b53.h>
31 /* buffer size needed for displaying all MIBs with max'd values */
32 #define B53_BUF_SIZE 1188
41 /* BCM5365 MIB counters */
42 static const struct b53_mib_desc b53_mibs_65
[] = {
43 { 8, 0x00, "TxOctets" },
44 { 4, 0x08, "TxDropPkts" },
45 { 4, 0x10, "TxBroadcastPkts" },
46 { 4, 0x14, "TxMulticastPkts" },
47 { 4, 0x18, "TxUnicastPkts" },
48 { 4, 0x1c, "TxCollisions" },
49 { 4, 0x20, "TxSingleCollision" },
50 { 4, 0x24, "TxMultipleCollision" },
51 { 4, 0x28, "TxDeferredTransmit" },
52 { 4, 0x2c, "TxLateCollision" },
53 { 4, 0x30, "TxExcessiveCollision" },
54 { 4, 0x38, "TxPausePkts" },
55 { 8, 0x44, "RxOctets" },
56 { 4, 0x4c, "RxUndersizePkts" },
57 { 4, 0x50, "RxPausePkts" },
58 { 4, 0x54, "Pkts64Octets" },
59 { 4, 0x58, "Pkts65to127Octets" },
60 { 4, 0x5c, "Pkts128to255Octets" },
61 { 4, 0x60, "Pkts256to511Octets" },
62 { 4, 0x64, "Pkts512to1023Octets" },
63 { 4, 0x68, "Pkts1024to1522Octets" },
64 { 4, 0x6c, "RxOversizePkts" },
65 { 4, 0x70, "RxJabbers" },
66 { 4, 0x74, "RxAlignmentErrors" },
67 { 4, 0x78, "RxFCSErrors" },
68 { 8, 0x7c, "RxGoodOctets" },
69 { 4, 0x84, "RxDropPkts" },
70 { 4, 0x88, "RxUnicastPkts" },
71 { 4, 0x8c, "RxMulticastPkts" },
72 { 4, 0x90, "RxBroadcastPkts" },
73 { 4, 0x94, "RxSAChanges" },
74 { 4, 0x98, "RxFragments" },
78 /* BCM63xx MIB counters */
79 static const struct b53_mib_desc b53_mibs_63xx
[] = {
80 { 8, 0x00, "TxOctets" },
81 { 4, 0x08, "TxDropPkts" },
82 { 4, 0x0c, "TxQoSPkts" },
83 { 4, 0x10, "TxBroadcastPkts" },
84 { 4, 0x14, "TxMulticastPkts" },
85 { 4, 0x18, "TxUnicastPkts" },
86 { 4, 0x1c, "TxCollisions" },
87 { 4, 0x20, "TxSingleCollision" },
88 { 4, 0x24, "TxMultipleCollision" },
89 { 4, 0x28, "TxDeferredTransmit" },
90 { 4, 0x2c, "TxLateCollision" },
91 { 4, 0x30, "TxExcessiveCollision" },
92 { 4, 0x38, "TxPausePkts" },
93 { 8, 0x3c, "TxQoSOctets" },
94 { 8, 0x44, "RxOctets" },
95 { 4, 0x4c, "RxUndersizePkts" },
96 { 4, 0x50, "RxPausePkts" },
97 { 4, 0x54, "Pkts64Octets" },
98 { 4, 0x58, "Pkts65to127Octets" },
99 { 4, 0x5c, "Pkts128to255Octets" },
100 { 4, 0x60, "Pkts256to511Octets" },
101 { 4, 0x64, "Pkts512to1023Octets" },
102 { 4, 0x68, "Pkts1024to1522Octets" },
103 { 4, 0x6c, "RxOversizePkts" },
104 { 4, 0x70, "RxJabbers" },
105 { 4, 0x74, "RxAlignmentErrors" },
106 { 4, 0x78, "RxFCSErrors" },
107 { 8, 0x7c, "RxGoodOctets" },
108 { 4, 0x84, "RxDropPkts" },
109 { 4, 0x88, "RxUnicastPkts" },
110 { 4, 0x8c, "RxMulticastPkts" },
111 { 4, 0x90, "RxBroadcastPkts" },
112 { 4, 0x94, "RxSAChanges" },
113 { 4, 0x98, "RxFragments" },
114 { 4, 0xa0, "RxSymbolErrors" },
115 { 4, 0xa4, "RxQoSPkts" },
116 { 8, 0xa8, "RxQoSOctets" },
117 { 4, 0xb0, "Pkts1523to2047Octets" },
118 { 4, 0xb4, "Pkts2048to4095Octets" },
119 { 4, 0xb8, "Pkts4096to8191Octets" },
120 { 4, 0xbc, "Pkts8192to9728Octets" },
121 { 4, 0xc0, "RxDiscarded" },
126 static const struct b53_mib_desc b53_mibs
[] = {
127 { 8, 0x00, "TxOctets" },
128 { 4, 0x08, "TxDropPkts" },
129 { 4, 0x10, "TxBroadcastPkts" },
130 { 4, 0x14, "TxMulticastPkts" },
131 { 4, 0x18, "TxUnicastPkts" },
132 { 4, 0x1c, "TxCollisions" },
133 { 4, 0x20, "TxSingleCollision" },
134 { 4, 0x24, "TxMultipleCollision" },
135 { 4, 0x28, "TxDeferredTransmit" },
136 { 4, 0x2c, "TxLateCollision" },
137 { 4, 0x30, "TxExcessiveCollision" },
138 { 4, 0x38, "TxPausePkts" },
139 { 8, 0x50, "RxOctets" },
140 { 4, 0x58, "RxUndersizePkts" },
141 { 4, 0x5c, "RxPausePkts" },
142 { 4, 0x60, "Pkts64Octets" },
143 { 4, 0x64, "Pkts65to127Octets" },
144 { 4, 0x68, "Pkts128to255Octets" },
145 { 4, 0x6c, "Pkts256to511Octets" },
146 { 4, 0x70, "Pkts512to1023Octets" },
147 { 4, 0x74, "Pkts1024to1522Octets" },
148 { 4, 0x78, "RxOversizePkts" },
149 { 4, 0x7c, "RxJabbers" },
150 { 4, 0x80, "RxAlignmentErrors" },
151 { 4, 0x84, "RxFCSErrors" },
152 { 8, 0x88, "RxGoodOctets" },
153 { 4, 0x90, "RxDropPkts" },
154 { 4, 0x94, "RxUnicastPkts" },
155 { 4, 0x98, "RxMulticastPkts" },
156 { 4, 0x9c, "RxBroadcastPkts" },
157 { 4, 0xa0, "RxSAChanges" },
158 { 4, 0xa4, "RxFragments" },
159 { 4, 0xa8, "RxJumboPkts" },
160 { 4, 0xac, "RxSymbolErrors" },
161 { 4, 0xc0, "RxDiscarded" },
165 static int b53_do_vlan_op(struct b53_device
*dev
, u8 op
)
169 b53_write8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], VTA_START_CMD
| op
);
171 for (i
= 0; i
< 10; i
++) {
174 b53_read8(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[0], &vta
);
175 if (!(vta
& VTA_START_CMD
))
178 usleep_range(100, 200);
184 static void b53_set_vlan_entry(struct b53_device
*dev
, u16 vid
, u16 members
,
191 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_25
;
193 b53_write32(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_25
, entry
);
194 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, vid
|
195 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
196 } else if (is5365(dev
)) {
200 entry
= (untag
<< VA_UNTAG_S
) | members
| VA_VALID_65
;
202 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_WRITE_65
, entry
);
203 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_65
, vid
|
204 VTA_RW_STATE_WR
| VTA_RW_OP_EN
);
206 b53_write16(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[1], vid
);
207 b53_write32(dev
, B53_ARLIO_PAGE
, dev
->vta_regs
[2],
208 (untag
<< VTE_UNTAG_S
) | members
);
210 b53_do_vlan_op(dev
, VTA_CMD_WRITE
);
214 void b53_set_forwarding(struct b53_device
*dev
, int enable
)
218 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
221 mgmt
|= SM_SW_FWD_EN
;
223 mgmt
&= ~SM_SW_FWD_EN
;
225 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
228 static void b53_enable_vlan(struct b53_device
*dev
, int enable
)
230 u8 mgmt
, vc0
, vc1
, vc4
= 0, vc5
;
232 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
233 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, &vc0
);
234 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, &vc1
);
236 if (is5325(dev
) || is5365(dev
)) {
237 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
238 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, &vc5
);
239 } else if (is63xx(dev
)) {
240 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, &vc4
);
241 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, &vc5
);
243 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, &vc4
);
244 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, &vc5
);
249 mgmt
|= SM_SW_FWD_MODE
;
251 vc0
|= VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
;
252 vc1
|= VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
;
253 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
254 vc4
|= VC4_ING_VID_VIO_DROP
<< VC4_ING_VID_CHECK_S
;
255 vc5
|= VC5_DROP_VTABLE_MISS
;
258 vc0
&= ~VC0_RESERVED_1
;
260 if (is5325(dev
) || is5365(dev
))
261 vc1
|= VC1_RX_MCST_TAG_EN
;
263 if (!is5325(dev
) && !is5365(dev
)) {
264 if (dev
->allow_vid_4095
)
265 vc5
|= VC5_VID_FFF_EN
;
267 vc5
&= ~VC5_VID_FFF_EN
;
270 mgmt
&= ~SM_SW_FWD_MODE
;
271 vc0
&= ~(VC0_VLAN_EN
| VC0_VID_CHK_EN
| VC0_VID_HASH_VID
);
272 vc1
&= ~(VC1_RX_MCST_UNTAG_EN
| VC1_RX_MCST_FWD_EN
);
273 vc4
&= ~VC4_ING_VID_CHECK_MASK
;
274 vc5
&= ~VC5_DROP_VTABLE_MISS
;
276 if (is5325(dev
) || is5365(dev
))
277 vc4
|= VC4_ING_VID_VIO_FWD
<< VC4_ING_VID_CHECK_S
;
279 vc4
|= VC4_ING_VID_VIO_TO_IMP
<< VC4_ING_VID_CHECK_S
;
281 if (is5325(dev
) || is5365(dev
))
282 vc1
&= ~VC1_RX_MCST_TAG_EN
;
284 if (!is5325(dev
) && !is5365(dev
))
285 vc5
&= ~VC5_VID_FFF_EN
;
288 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL0
, vc0
);
289 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL1
, vc1
);
291 if (is5325(dev
) || is5365(dev
)) {
292 /* enable the high 8 bit vid check on 5325 */
293 if (is5325(dev
) && enable
)
294 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
,
297 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
299 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, vc4
);
300 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_25
, vc5
);
301 } else if (is63xx(dev
)) {
302 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3_63XX
, 0);
303 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_63XX
, vc4
);
304 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5_63XX
, vc5
);
306 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL3
, 0);
307 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4
, vc4
);
308 b53_write8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL5
, vc5
);
311 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
314 static int b53_set_jumbo(struct b53_device
*dev
, int enable
, int allow_10_100
)
317 u16 max_size
= JMS_MIN_SIZE
;
319 if (is5325(dev
) || is5365(dev
))
323 port_mask
= dev
->enabled_ports
;
324 max_size
= JMS_MAX_SIZE
;
326 port_mask
|= JPM_10_100_JUMBO_EN
;
329 b53_write32(dev
, B53_JUMBO_PAGE
, dev
->jumbo_pm_reg
, port_mask
);
330 return b53_write16(dev
, B53_JUMBO_PAGE
, dev
->jumbo_size_reg
, max_size
);
333 static int b53_flush_arl(struct b53_device
*dev
)
337 b53_write8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
338 FAST_AGE_DONE
| FAST_AGE_DYNAMIC
| FAST_AGE_STATIC
);
340 for (i
= 0; i
< 10; i
++) {
343 b53_read8(dev
, B53_CTRL_PAGE
, B53_FAST_AGE_CTRL
,
346 if (!(fast_age_ctrl
& FAST_AGE_DONE
))
352 pr_warn("time out while flushing ARL\n");
357 static void b53_enable_ports(struct b53_device
*dev
)
361 b53_for_each_port(dev
, i
) {
366 * prevent leaking packets between wan and lan in unmanaged
367 * mode through port vlans.
369 if (dev
->enable_vlan
|| is_cpu_port(dev
, i
))
371 else if (is531x5(dev
))
372 /* BCM53115 may use a different port as cpu port */
373 pvlan_mask
= BIT(dev
->sw_dev
.cpu_port
);
375 pvlan_mask
= BIT(B53_CPU_PORT
);
377 /* BCM5325 CPU port is at 8 */
378 if ((is5325(dev
) || is5365(dev
)) && i
== B53_CPU_PORT_25
)
381 if (dev
->chip_id
== BCM5398_DEVICE_ID
&& (i
== 6 || i
== 7))
382 /* disable unused ports 6 & 7 */
383 port_ctrl
= PORT_CTRL_RX_DISABLE
| PORT_CTRL_TX_DISABLE
;
384 else if (i
== B53_CPU_PORT
)
385 port_ctrl
= PORT_CTRL_RX_BCST_EN
|
386 PORT_CTRL_RX_MCST_EN
|
387 PORT_CTRL_RX_UCST_EN
;
391 b53_write16(dev
, B53_PVLAN_PAGE
, B53_PVLAN_PORT_MASK(i
),
394 /* port state is handled by bcm63xx_enet driver */
396 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_CTRL(i
),
401 static void b53_enable_mib(struct b53_device
*dev
)
405 b53_read8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
407 gc
&= ~(GC_RESET_MIB
| GC_MIB_AC_EN
);
409 b53_write8(dev
, B53_CTRL_PAGE
, B53_GLOBAL_CONFIG
, gc
);
412 static int b53_apply(struct b53_device
*dev
)
416 /* clear all vlan entries */
417 if (is5325(dev
) || is5365(dev
)) {
418 for (i
= 1; i
< dev
->sw_dev
.vlans
; i
++)
419 b53_set_vlan_entry(dev
, i
, 0, 0);
421 b53_do_vlan_op(dev
, VTA_CMD_CLEAR
);
424 b53_enable_vlan(dev
, dev
->enable_vlan
);
426 /* fill VLAN table */
427 if (dev
->enable_vlan
) {
428 for (i
= 0; i
< dev
->sw_dev
.vlans
; i
++) {
429 struct b53_vlan
*vlan
= &dev
->vlans
[i
];
434 b53_set_vlan_entry(dev
, i
, vlan
->members
, vlan
->untag
);
437 b53_for_each_port(dev
, i
)
438 b53_write16(dev
, B53_VLAN_PAGE
,
439 B53_VLAN_PORT_DEF_TAG(i
),
442 b53_for_each_port(dev
, i
)
443 b53_write16(dev
, B53_VLAN_PAGE
,
444 B53_VLAN_PORT_DEF_TAG(i
), 1);
448 b53_enable_ports(dev
);
450 if (!is5325(dev
) && !is5365(dev
))
451 b53_set_jumbo(dev
, dev
->enable_jumbo
, 1);
456 static int b53_switch_reset(struct b53_device
*dev
)
460 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
462 if (!(mgmt
& SM_SW_FWD_EN
)) {
463 mgmt
&= ~SM_SW_FWD_MODE
;
464 mgmt
|= SM_SW_FWD_EN
;
466 b53_write8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, mgmt
);
467 b53_read8(dev
, B53_CTRL_PAGE
, B53_SWITCH_MODE
, &mgmt
);
469 if (!(mgmt
& SM_SW_FWD_EN
)) {
470 pr_err("Failed to enable switch!\n");
475 /* enable all ports */
476 b53_enable_ports(dev
);
478 /* configure MII port if necessary */
480 u8 mii_port_override
;
482 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
484 /* reverse mii needs to be enabled */
485 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
486 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
487 mii_port_override
| PORT_OVERRIDE_RV_MII_25
);
488 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
491 if (!(mii_port_override
& PORT_OVERRIDE_RV_MII_25
)) {
492 pr_err("Failed to enable reverse MII mode\n");
496 } else if (is531x5(dev
) && dev
->sw_dev
.cpu_port
== B53_CPU_PORT
) {
497 u8 mii_port_override
;
499 b53_read8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
501 b53_write8(dev
, B53_CTRL_PAGE
, B53_PORT_OVERRIDE_CTRL
,
502 mii_port_override
| PORT_OVERRIDE_EN
|
508 return b53_flush_arl(dev
);
512 * Swconfig glue functions
515 static int b53_global_get_vlan_enable(struct switch_dev
*dev
,
516 const struct switch_attr
*attr
,
517 struct switch_val
*val
)
519 struct b53_device
*priv
= sw_to_b53(dev
);
521 val
->value
.i
= priv
->enable_vlan
;
526 static int b53_global_set_vlan_enable(struct switch_dev
*dev
,
527 const struct switch_attr
*attr
,
528 struct switch_val
*val
)
530 struct b53_device
*priv
= sw_to_b53(dev
);
532 priv
->enable_vlan
= val
->value
.i
;
537 static int b53_global_get_jumbo_enable(struct switch_dev
*dev
,
538 const struct switch_attr
*attr
,
539 struct switch_val
*val
)
541 struct b53_device
*priv
= sw_to_b53(dev
);
543 val
->value
.i
= priv
->enable_jumbo
;
548 static int b53_global_set_jumbo_enable(struct switch_dev
*dev
,
549 const struct switch_attr
*attr
,
550 struct switch_val
*val
)
552 struct b53_device
*priv
= sw_to_b53(dev
);
554 priv
->enable_jumbo
= val
->value
.i
;
559 static int b53_global_get_4095_enable(struct switch_dev
*dev
,
560 const struct switch_attr
*attr
,
561 struct switch_val
*val
)
563 struct b53_device
*priv
= sw_to_b53(dev
);
565 val
->value
.i
= priv
->allow_vid_4095
;
570 static int b53_global_set_4095_enable(struct switch_dev
*dev
,
571 const struct switch_attr
*attr
,
572 struct switch_val
*val
)
574 struct b53_device
*priv
= sw_to_b53(dev
);
576 priv
->allow_vid_4095
= val
->value
.i
;
581 static int b53_global_get_ports(struct switch_dev
*dev
,
582 const struct switch_attr
*attr
,
583 struct switch_val
*val
)
585 struct b53_device
*priv
= sw_to_b53(dev
);
587 val
->len
= snprintf(priv
->buf
, B53_BUF_SIZE
, "0x%04x",
588 priv
->enabled_ports
);
589 val
->value
.s
= priv
->buf
;
594 static int b53_port_get_pvid(struct switch_dev
*dev
, int port
, int *val
)
596 struct b53_device
*priv
= sw_to_b53(dev
);
598 *val
= priv
->ports
[port
].pvid
;
603 static int b53_port_set_pvid(struct switch_dev
*dev
, int port
, int val
)
605 struct b53_device
*priv
= sw_to_b53(dev
);
607 if (val
> 15 && is5325(priv
))
609 if (val
== 4095 && !priv
->allow_vid_4095
)
612 priv
->ports
[port
].pvid
= val
;
617 static int b53_vlan_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
619 struct b53_device
*priv
= sw_to_b53(dev
);
620 struct switch_port
*port
= &val
->value
.ports
[0];
621 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
629 for (i
= 0; i
< dev
->ports
; i
++) {
630 if (!(vlan
->members
& BIT(i
)))
634 if (!(vlan
->untag
& BIT(i
)))
635 port
->flags
= BIT(SWITCH_PORT_FLAG_TAGGED
);
647 static int b53_vlan_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
649 struct b53_device
*priv
= sw_to_b53(dev
);
650 struct switch_port
*port
;
651 struct b53_vlan
*vlan
= &priv
->vlans
[val
->port_vlan
];
654 /* only BCM5325 and BCM5365 supports VID 0 */
655 if (val
->port_vlan
== 0 && !is5325(priv
) && !is5365(priv
))
658 /* VLAN 4095 needs special handling */
659 if (val
->port_vlan
== 4095 && !priv
->allow_vid_4095
)
662 port
= &val
->value
.ports
[0];
665 for (i
= 0; i
< val
->len
; i
++, port
++) {
666 vlan
->members
|= BIT(port
->id
);
668 if (!(port
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))) {
669 vlan
->untag
|= BIT(port
->id
);
670 priv
->ports
[port
->id
].pvid
= val
->port_vlan
;
674 /* ignore disabled ports */
675 vlan
->members
&= priv
->enabled_ports
;
676 vlan
->untag
&= priv
->enabled_ports
;
681 static int b53_port_get_link(struct switch_dev
*dev
, int port
,
682 struct switch_port_link
*link
)
684 struct b53_device
*priv
= sw_to_b53(dev
);
686 if (is_cpu_port(priv
, port
)) {
689 link
->speed
= is5325(priv
) || is5365(priv
) ?
690 SWITCH_PORT_SPEED_100
: SWITCH_PORT_SPEED_1000
;
692 } else if (priv
->enabled_ports
& BIT(port
)) {
696 b53_read16(priv
, B53_STAT_PAGE
, B53_LINK_STAT
, &lnk
);
697 b53_read16(priv
, B53_STAT_PAGE
, priv
->duplex_reg
, &duplex
);
699 lnk
= (lnk
>> port
) & 1;
700 duplex
= (duplex
>> port
) & 1;
702 if (is5325(priv
) || is5365(priv
)) {
705 b53_read16(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &tmp
);
706 speed
= SPEED_PORT_FE(tmp
, port
);
708 b53_read32(priv
, B53_STAT_PAGE
, B53_SPEED_STAT
, &speed
);
709 speed
= SPEED_PORT_GE(speed
, port
);
714 link
->duplex
= duplex
;
717 link
->speed
= SWITCH_PORT_SPEED_10
;
719 case SPEED_STAT_100M
:
720 link
->speed
= SWITCH_PORT_SPEED_100
;
722 case SPEED_STAT_1000M
:
723 link
->speed
= SWITCH_PORT_SPEED_1000
;
737 static int b53_global_reset_switch(struct switch_dev
*dev
)
739 struct b53_device
*priv
= sw_to_b53(dev
);
742 priv
->enable_vlan
= 0;
743 priv
->enable_jumbo
= 0;
744 priv
->allow_vid_4095
= 0;
746 memset(priv
->vlans
, 0, sizeof(priv
->vlans
) * dev
->vlans
);
747 memset(priv
->ports
, 0, sizeof(priv
->ports
) * dev
->ports
);
749 return b53_switch_reset(priv
);
752 static int b53_global_apply_config(struct switch_dev
*dev
)
754 struct b53_device
*priv
= sw_to_b53(dev
);
756 /* disable switching */
757 b53_set_forwarding(priv
, 0);
761 /* enable switching */
762 b53_set_forwarding(priv
, 1);
768 static int b53_global_reset_mib(struct switch_dev
*dev
,
769 const struct switch_attr
*attr
,
770 struct switch_val
*val
)
772 struct b53_device
*priv
= sw_to_b53(dev
);
775 b53_read8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, &gc
);
777 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
| GC_RESET_MIB
);
779 b53_write8(priv
, B53_MGMT_PAGE
, B53_GLOBAL_CONFIG
, gc
& ~GC_RESET_MIB
);
785 static int b53_port_get_mib(struct switch_dev
*sw_dev
,
786 const struct switch_attr
*attr
,
787 struct switch_val
*val
)
789 struct b53_device
*dev
= sw_to_b53(sw_dev
);
790 const struct b53_mib_desc
*mibs
;
791 int port
= val
->port_vlan
;
794 if (!(BIT(port
) & dev
->enabled_ports
))
802 } else if (is63xx(dev
)) {
803 mibs
= b53_mibs_63xx
;
810 for (; mibs
->size
> 0; mibs
++) {
813 if (mibs
->size
== 8) {
814 b53_read64(dev
, B53_MIB_PAGE(port
), mibs
->offset
, &val
);
818 b53_read32(dev
, B53_MIB_PAGE(port
), mibs
->offset
,
823 len
+= snprintf(dev
->buf
+ len
, B53_BUF_SIZE
- len
,
824 "%-20s: %llu\n", mibs
->name
, val
);
828 val
->value
.s
= dev
->buf
;
833 static struct switch_attr b53_global_ops_25
[] = {
835 .type
= SWITCH_TYPE_INT
,
836 .name
= "enable_vlan",
837 .description
= "Enable VLAN mode",
838 .set
= b53_global_set_vlan_enable
,
839 .get
= b53_global_get_vlan_enable
,
843 .type
= SWITCH_TYPE_STRING
,
845 .description
= "Available ports (as bitmask)",
846 .get
= b53_global_get_ports
,
850 static struct switch_attr b53_global_ops_65
[] = {
852 .type
= SWITCH_TYPE_INT
,
853 .name
= "enable_vlan",
854 .description
= "Enable VLAN mode",
855 .set
= b53_global_set_vlan_enable
,
856 .get
= b53_global_get_vlan_enable
,
860 .type
= SWITCH_TYPE_STRING
,
862 .description
= "Available ports (as bitmask)",
863 .get
= b53_global_get_ports
,
866 .type
= SWITCH_TYPE_INT
,
868 .description
= "Reset MIB counters",
869 .set
= b53_global_reset_mib
,
873 static struct switch_attr b53_global_ops
[] = {
875 .type
= SWITCH_TYPE_INT
,
876 .name
= "enable_vlan",
877 .description
= "Enable VLAN mode",
878 .set
= b53_global_set_vlan_enable
,
879 .get
= b53_global_get_vlan_enable
,
883 .type
= SWITCH_TYPE_STRING
,
885 .description
= "Available Ports (as bitmask)",
886 .get
= b53_global_get_ports
,
889 .type
= SWITCH_TYPE_INT
,
891 .description
= "Reset MIB counters",
892 .set
= b53_global_reset_mib
,
895 .type
= SWITCH_TYPE_INT
,
896 .name
= "enable_jumbo",
897 .description
= "Enable Jumbo Frames",
898 .set
= b53_global_set_jumbo_enable
,
899 .get
= b53_global_get_jumbo_enable
,
903 .type
= SWITCH_TYPE_INT
,
904 .name
= "allow_vid_4095",
905 .description
= "Allow VID 4095",
906 .set
= b53_global_set_4095_enable
,
907 .get
= b53_global_get_4095_enable
,
912 static struct switch_attr b53_port_ops
[] = {
914 .type
= SWITCH_TYPE_STRING
,
916 .description
= "Get port's MIB counters",
917 .get
= b53_port_get_mib
,
921 static struct switch_attr b53_no_ops
[] = {
924 static const struct switch_dev_ops b53_switch_ops_25
= {
926 .attr
= b53_global_ops_25
,
927 .n_attr
= ARRAY_SIZE(b53_global_ops_25
),
931 .n_attr
= ARRAY_SIZE(b53_no_ops
),
935 .n_attr
= ARRAY_SIZE(b53_no_ops
),
938 .get_vlan_ports
= b53_vlan_get_ports
,
939 .set_vlan_ports
= b53_vlan_set_ports
,
940 .get_port_pvid
= b53_port_get_pvid
,
941 .set_port_pvid
= b53_port_set_pvid
,
942 .apply_config
= b53_global_apply_config
,
943 .reset_switch
= b53_global_reset_switch
,
944 .get_port_link
= b53_port_get_link
,
947 static const struct switch_dev_ops b53_switch_ops_65
= {
949 .attr
= b53_global_ops_25
,
950 .n_attr
= ARRAY_SIZE(b53_global_ops_65
),
954 .n_attr
= ARRAY_SIZE(b53_port_ops
),
958 .n_attr
= ARRAY_SIZE(b53_no_ops
),
961 .get_vlan_ports
= b53_vlan_get_ports
,
962 .set_vlan_ports
= b53_vlan_set_ports
,
963 .get_port_pvid
= b53_port_get_pvid
,
964 .set_port_pvid
= b53_port_set_pvid
,
965 .apply_config
= b53_global_apply_config
,
966 .reset_switch
= b53_global_reset_switch
,
967 .get_port_link
= b53_port_get_link
,
970 static const struct switch_dev_ops b53_switch_ops
= {
972 .attr
= b53_global_ops
,
973 .n_attr
= ARRAY_SIZE(b53_global_ops
),
976 .attr
= b53_port_ops
,
977 .n_attr
= ARRAY_SIZE(b53_port_ops
),
981 .n_attr
= ARRAY_SIZE(b53_no_ops
),
984 .get_vlan_ports
= b53_vlan_get_ports
,
985 .set_vlan_ports
= b53_vlan_set_ports
,
986 .get_port_pvid
= b53_port_get_pvid
,
987 .set_port_pvid
= b53_port_set_pvid
,
988 .apply_config
= b53_global_apply_config
,
989 .reset_switch
= b53_global_reset_switch
,
990 .get_port_link
= b53_port_get_link
,
993 struct b53_chip_data
{
995 const char *dev_name
;
1004 const struct switch_dev_ops
*sw_ops
;
1007 #define B53_VTA_REGS \
1008 { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1009 #define B53_VTA_REGS_9798 \
1010 { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1011 #define B53_VTA_REGS_63XX \
1012 { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1014 static const struct b53_chip_data b53_switch_chips
[] = {
1016 .chip_id
= BCM5325_DEVICE_ID
,
1017 .dev_name
= "BCM5325",
1020 .enabled_ports
= 0x1f,
1021 .cpu_port
= B53_CPU_PORT_25
,
1022 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1023 .sw_ops
= &b53_switch_ops_25
,
1026 .chip_id
= BCM5365_DEVICE_ID
,
1027 .dev_name
= "BCM5365",
1030 .enabled_ports
= 0x1f,
1031 .cpu_port
= B53_CPU_PORT_25
,
1032 .duplex_reg
= B53_DUPLEX_STAT_FE
,
1033 .sw_ops
= &b53_switch_ops_65
,
1036 .chip_id
= BCM5395_DEVICE_ID
,
1037 .dev_name
= "BCM5395",
1040 .enabled_ports
= 0x1f,
1041 .cpu_port
= B53_CPU_PORT
,
1042 .vta_regs
= B53_VTA_REGS
,
1043 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1044 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1045 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1046 .sw_ops
= &b53_switch_ops
,
1049 .chip_id
= BCM5397_DEVICE_ID
,
1050 .dev_name
= "BCM5397",
1053 .enabled_ports
= 0x1f,
1054 .cpu_port
= B53_CPU_PORT
,
1055 .vta_regs
= B53_VTA_REGS_9798
,
1056 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1057 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1058 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1059 .sw_ops
= &b53_switch_ops
,
1062 .chip_id
= BCM5398_DEVICE_ID
,
1063 .dev_name
= "BCM5398",
1066 .enabled_ports
= 0x7f,
1067 .cpu_port
= B53_CPU_PORT
,
1068 .vta_regs
= B53_VTA_REGS_9798
,
1069 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1070 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1071 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1072 .sw_ops
= &b53_switch_ops
,
1075 .chip_id
= BCM53115_DEVICE_ID
,
1076 .dev_name
= "BCM53115",
1077 .alias
= "bcm53115",
1079 .enabled_ports
= 0x1f,
1080 .vta_regs
= B53_VTA_REGS
,
1081 .cpu_port
= B53_CPU_PORT
,
1082 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1083 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1084 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1085 .sw_ops
= &b53_switch_ops
,
1088 .chip_id
= BCM53125_DEVICE_ID
,
1089 .dev_name
= "BCM53125",
1090 .alias
= "bcm53125",
1092 .enabled_ports
= 0x1f,
1093 .cpu_port
= B53_CPU_PORT
,
1094 .vta_regs
= B53_VTA_REGS
,
1095 .duplex_reg
= B53_DUPLEX_STAT_GE
,
1096 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK
,
1097 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE
,
1098 .sw_ops
= &b53_switch_ops
,
1101 .chip_id
= BCM63XX_DEVICE_ID
,
1102 .dev_name
= "BCM63xx",
1105 .enabled_ports
= 0, /* pdata must provide them */
1106 .cpu_port
= B53_CPU_PORT
,
1107 .vta_regs
= B53_VTA_REGS_63XX
,
1108 .duplex_reg
= B53_DUPLEX_STAT_63XX
,
1109 .jumbo_pm_reg
= B53_JUMBO_PORT_MASK_63XX
,
1110 .jumbo_size_reg
= B53_JUMBO_MAX_SIZE_63XX
,
1111 .sw_ops
= &b53_switch_ops
,
1115 int b53_switch_init(struct b53_device
*dev
)
1117 struct switch_dev
*sw_dev
= &dev
->sw_dev
;
1120 for (i
= 0; i
< ARRAY_SIZE(b53_switch_chips
); i
++) {
1121 const struct b53_chip_data
*chip
= &b53_switch_chips
[i
];
1123 if (chip
->chip_id
== dev
->chip_id
) {
1124 sw_dev
->name
= chip
->dev_name
;
1126 sw_dev
->alias
= chip
->alias
;
1127 if (!dev
->enabled_ports
)
1128 dev
->enabled_ports
= chip
->enabled_ports
;
1129 dev
->duplex_reg
= chip
->duplex_reg
;
1130 dev
->vta_regs
[0] = chip
->vta_regs
[0];
1131 dev
->vta_regs
[1] = chip
->vta_regs
[1];
1132 dev
->vta_regs
[2] = chip
->vta_regs
[2];
1133 dev
->jumbo_pm_reg
= chip
->jumbo_pm_reg
;
1134 sw_dev
->ops
= chip
->sw_ops
;
1135 sw_dev
->cpu_port
= chip
->cpu_port
;
1136 sw_dev
->vlans
= chip
->vlans
;
1144 /* check which BCM5325x version we have */
1148 b53_read8(dev
, B53_VLAN_PAGE
, B53_VLAN_CTRL4_25
, &vc4
);
1150 /* check reserved bits */
1156 /* BCM5325F - do not use port 4 */
1157 dev
->enabled_ports
&= ~BIT(4);
1163 } else if (dev
->chip_id
== BCM53115_DEVICE_ID
) {
1166 b53_read48(dev
, B53_STAT_PAGE
, B53_STRAP_VALUE
, &strap_value
);
1167 /* use second IMP port if GMII is enabled */
1168 if (strap_value
& SV_GMII_CTRL_115
)
1169 sw_dev
->cpu_port
= 5;
1172 /* cpu port is always last */
1173 sw_dev
->ports
= sw_dev
->cpu_port
+ 1;
1174 dev
->enabled_ports
|= BIT(sw_dev
->cpu_port
);
1176 dev
->ports
= devm_kzalloc(dev
->dev
,
1177 sizeof(struct b53_port
) * sw_dev
->ports
,
1182 dev
->vlans
= devm_kzalloc(dev
->dev
,
1183 sizeof(struct b53_vlan
) * sw_dev
->vlans
,
1188 dev
->buf
= devm_kzalloc(dev
->dev
, B53_BUF_SIZE
, GFP_KERNEL
);
1192 return b53_switch_reset(dev
);
1195 struct b53_device
*b53_switch_alloc(struct device
*base
, struct b53_io_ops
*ops
,
1198 struct b53_device
*dev
;
1200 dev
= devm_kzalloc(base
, sizeof(*dev
), GFP_KERNEL
);
1207 mutex_init(&dev
->reg_mutex
);
1211 EXPORT_SYMBOL(b53_switch_alloc
);
1213 int b53_switch_detect(struct b53_device
*dev
)
1220 ret
= b53_read8(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id8
);
1227 * BCM5325 and BCM5365 do not have this register so reads
1228 * return 0. But the read operation did succeed, so assume
1229 * this is one of them.
1231 * Next check if we can write to the 5325's VTA register; for
1232 * 5365 it is read only.
1235 b53_write16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, 0xf);
1236 b53_read16(dev
, B53_VLAN_PAGE
, B53_VLAN_TABLE_ACCESS_25
, &tmp
);
1239 dev
->chip_id
= BCM5325_DEVICE_ID
;
1241 dev
->chip_id
= BCM5365_DEVICE_ID
;
1243 case BCM5395_DEVICE_ID
:
1244 case BCM5397_DEVICE_ID
:
1245 case BCM5398_DEVICE_ID
:
1249 ret
= b53_read32(dev
, B53_MGMT_PAGE
, B53_DEVICE_ID
, &id32
);
1254 case BCM53115_DEVICE_ID
:
1255 case BCM53125_DEVICE_ID
:
1256 dev
->chip_id
= id32
;
1259 pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1265 return b53_read8(dev
, B53_MGMT_PAGE
, B53_REV_ID
, &dev
->core_rev
);
1267 EXPORT_SYMBOL(b53_switch_detect
);
1269 int b53_switch_register(struct b53_device
*dev
)
1274 dev
->chip_id
= dev
->pdata
->chip_id
;
1275 dev
->enabled_ports
= dev
->pdata
->enabled_ports
;
1276 dev
->sw_dev
.alias
= dev
->pdata
->alias
;
1279 if (!dev
->chip_id
&& b53_switch_detect(dev
))
1282 ret
= b53_switch_init(dev
);
1286 pr_info("found switch: %s, rev %i\n", dev
->sw_dev
.name
, dev
->core_rev
);
1288 return register_switch(&dev
->sw_dev
, NULL
);
1290 EXPORT_SYMBOL(b53_switch_register
);
1292 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1293 MODULE_DESCRIPTION("B53 switch library");
1294 MODULE_LICENSE("Dual BSD/GPL");