1 --- a/include/linux/soc/mediatek/mtk_wed.h
2 +++ b/include/linux/soc/mediatek/mtk_wed.h
4 #include <linux/rcupdate.h>
5 #include <linux/regmap.h>
7 +#include <linux/skbuff.h>
9 #define MTK_WED_TX_QUEUES 2
10 +#define MTK_WED_RX_QUEUES 2
12 +#define WED_WO_STA_REC 0x6
17 +enum mtk_wed_wo_cmd {
18 + MTK_WED_WO_CMD_WED_CFG,
19 + MTK_WED_WO_CMD_WED_RX_STAT,
20 + MTK_WED_WO_CMD_RRO_SER,
21 + MTK_WED_WO_CMD_DBG_INFO,
22 + MTK_WED_WO_CMD_DEV_INFO,
23 + MTK_WED_WO_CMD_BSS_INFO,
24 + MTK_WED_WO_CMD_STA_REC,
25 + MTK_WED_WO_CMD_DEV_INFO_DUMP,
26 + MTK_WED_WO_CMD_BSS_INFO_DUMP,
27 + MTK_WED_WO_CMD_STA_REC_DUMP,
28 + MTK_WED_WO_CMD_BA_INFO_DUMP,
29 + MTK_WED_WO_CMD_FBCMD_Q_DUMP,
30 + MTK_WED_WO_CMD_FW_LOG_CTRL,
31 + MTK_WED_WO_CMD_LOG_FLUSH,
32 + MTK_WED_WO_CMD_CHANGE_STATE,
33 + MTK_WED_WO_CMD_CPU_STATS_ENABLE,
34 + MTK_WED_WO_CMD_CPU_STATS_DUMP,
35 + MTK_WED_WO_CMD_EXCEPTION_INIT,
36 + MTK_WED_WO_CMD_PROF_CTRL,
37 + MTK_WED_WO_CMD_STA_BA_DUMP,
38 + MTK_WED_WO_CMD_BA_CTRL_DUMP,
39 + MTK_WED_WO_CMD_RXCNT_CTRL,
40 + MTK_WED_WO_CMD_RXCNT_INFO,
41 + MTK_WED_WO_CMD_SET_CAP,
42 + MTK_WED_WO_CMD_CCIF_RING_DUMP,
43 + MTK_WED_WO_CMD_WED_END
46 +struct mtk_rxbm_desc {
49 +} __packed __aligned(4);
51 +enum mtk_wed_bus_tye {
56 +#define MTK_WED_RING_CONFIGURED BIT(0)
58 struct mtk_wdma_desc *desc;
68 +struct mtk_wed_wo_rx_stats {
77 struct mtk_wed_device {
78 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
79 const struct mtk_wed_ops *ops;
80 @@ -28,30 +83,71 @@ struct mtk_wed_device {
81 bool init_done, running;
86 struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES];
87 + struct mtk_wed_ring rx_ring[MTK_WED_RX_QUEUES];
88 struct mtk_wed_ring txfree_ring;
89 struct mtk_wed_ring tx_wdma[MTK_WED_TX_QUEUES];
90 + struct mtk_wed_ring rx_wdma[MTK_WED_RX_QUEUES];
95 struct mtk_wdma_desc *desc;
102 + struct page_frag_cache rx_page;
103 + struct mtk_rxbm_desc *desc;
104 + dma_addr_t desc_phys;
108 + struct mtk_wed_ring ring;
109 + dma_addr_t miod_phys;
110 + dma_addr_t fdbk_phys;
113 /* filled by driver: */
115 - struct pci_dev *pci_dev;
117 + struct platform_device *platform_dev;
118 + struct pci_dev *pci_dev;
120 + enum mtk_wed_bus_tye bus_type;
121 + void __iomem *base;
136 + unsigned int rx_nbuf;
137 + unsigned int rx_npkt;
138 + unsigned int rx_size;
140 + u8 tx_tbit[MTK_WED_TX_QUEUES];
141 + u8 rx_tbit[MTK_WED_RX_QUEUES];
144 u32 (*init_buf)(void *ptr, dma_addr_t phys, int token_id);
145 int (*offload_enable)(struct mtk_wed_device *wed);
146 void (*offload_disable)(struct mtk_wed_device *wed);
147 + u32 (*init_rx_buf)(struct mtk_wed_device *wed, int size);
148 + void (*release_rx_buf)(struct mtk_wed_device *wed);
149 + void (*update_wo_rx_stats)(struct mtk_wed_device *wed,
150 + struct mtk_wed_wo_rx_stats *stats);
154 @@ -60,9 +156,15 @@ struct mtk_wed_ops {
155 int (*attach)(struct mtk_wed_device *dev);
156 int (*tx_ring_setup)(struct mtk_wed_device *dev, int ring,
158 + int (*rx_ring_setup)(struct mtk_wed_device *dev, int ring,
159 + void __iomem *regs);
160 int (*txfree_ring_setup)(struct mtk_wed_device *dev,
162 + int (*msg_update)(struct mtk_wed_device *dev, int cmd_id,
163 + void *data, int len);
164 void (*detach)(struct mtk_wed_device *dev);
165 + void (*ppe_check)(struct mtk_wed_device *dev, struct sk_buff *skb,
166 + u32 reason, u32 hash);
168 void (*stop)(struct mtk_wed_device *dev);
169 void (*start)(struct mtk_wed_device *dev, u32 irq_mask);
170 @@ -97,6 +199,16 @@ mtk_wed_device_attach(struct mtk_wed_dev
175 +mtk_wed_get_rx_capa(struct mtk_wed_device *dev)
177 +#ifdef CONFIG_NET_MEDIATEK_SOC_WED
178 + return dev->version != 1;
184 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
185 #define mtk_wed_device_active(_dev) !!(_dev)->ops
186 #define mtk_wed_device_detach(_dev) (_dev)->ops->detach(_dev)
187 @@ -113,6 +225,12 @@ mtk_wed_device_attach(struct mtk_wed_dev
188 (_dev)->ops->irq_get(_dev, _mask)
189 #define mtk_wed_device_irq_set_mask(_dev, _mask) \
190 (_dev)->ops->irq_set_mask(_dev, _mask)
191 +#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs) \
192 + (_dev)->ops->rx_ring_setup(_dev, _ring, _regs)
193 +#define mtk_wed_device_ppe_check(_dev, _skb, _reason, _hash) \
194 + (_dev)->ops->ppe_check(_dev, _skb, _reason, _hash)
195 +#define mtk_wed_device_update_msg(_dev, _id, _msg, _len) \
196 + (_dev)->ops->msg_update(_dev, _id, _msg, _len)
198 static inline bool mtk_wed_device_active(struct mtk_wed_device *dev)
200 @@ -126,6 +244,9 @@ static inline bool mtk_wed_device_active
201 #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0)
202 #define mtk_wed_device_irq_get(_dev, _mask) 0
203 #define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0)
204 +#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs) -ENODEV
205 +#define mtk_wed_device_ppe_check(_dev, _skb, _reason, _hash) do {} while (0)
206 +#define mtk_wed_device_update_msg(_dev, _id, _msg, _len) -ENODEV