1 --- a/drivers/mtd/spi-nor/spi-nor.c
2 +++ b/drivers/mtd/spi-nor/spi-nor.c
3 @@ -196,7 +196,7 @@ struct flash_info {
9 #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
10 #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
11 #define SST_WRITE BIT(2) /* use SST byte programming */
12 @@ -233,6 +233,10 @@ struct flash_info {
13 #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
14 #define USE_CLSR BIT(14) /* use CLSR command */
15 #define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
16 +#define SPI_NOR_4BIT_BP BIT(17) /*
17 + * Flash SR has 4 bit fields (BP0-3)
18 + * for block protection.
21 /* Part specific fixup hooks. */
22 const struct spi_nor_fixups *fixups;
23 @@ -1987,6 +1991,9 @@ static int spi_nor_clear_sr_bp(struct sp
25 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
27 + if (nor->flags & SNOR_F_HAS_4BIT_BP)
32 dev_err(nor->dev, "error while reading status register\n");
33 @@ -2340,7 +2347,7 @@ static const struct flash_info spi_nor_i
34 { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
35 { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
36 { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
37 - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
38 + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_4BIT_BP) },
39 { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) },
40 { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64,
41 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
42 @@ -5028,6 +5035,9 @@ int spi_nor_scan(struct spi_nor *nor, co
43 if (info->flags & USE_CLSR)
44 nor->flags |= SNOR_F_USE_CLSR;
46 + if (info->flags & SPI_NOR_4BIT_BP)
47 + nor->flags |= SNOR_F_HAS_4BIT_BP;
49 if (info->flags & SPI_NOR_NO_ERASE)
50 mtd->flags |= MTD_NO_ERASE;
52 --- a/include/linux/mtd/spi-nor.h
53 +++ b/include/linux/mtd/spi-nor.h
55 #define SR_BP0 BIT(2) /* Block protect 0 */
56 #define SR_BP1 BIT(3) /* Block protect 1 */
57 #define SR_BP2 BIT(4) /* Block protect 2 */
58 +#define SR_BP3 BIT(5) /* Block protect 3 */
59 #define SR_TB BIT(5) /* Top/Bottom protect */
60 #define SR_SRWD BIT(7) /* SR write protect */
61 /* Spansion/Cypress specific status bits */
62 @@ -243,6 +244,7 @@ enum spi_nor_option_flags {
63 SNOR_F_4B_OPCODES = BIT(6),
64 SNOR_F_HAS_4BAIT = BIT(7),
65 SNOR_F_HAS_LOCK = BIT(8),
66 + SNOR_F_HAS_4BIT_BP = BIT(12),