target/linux/generic/patches-3.6/020-ssb_update.patch

   1 --- a/drivers/ssb/driver_mipscore.c
   2 +++ b/drivers/ssb/driver_mipscore.c
   3 @@ -190,16 +190,32 @@ static void ssb_mips_flash_detect(struct
   4  {
   5         struct ssb_bus *bus = mcore->dev->bus;
   6
   7 -       mcore->flash_buswidth = 2;
   8 -       if (bus->chipco.dev) {
   9 -               mcore->flash_window = 0x1c000000;
  10 -               mcore->flash_window_size = 0x02000000;
  11 +       /* When there is no chipcommon on the bus there is 4MB flash */
  12 +       if (!bus->chipco.dev) {
  13 +               mcore->pflash.present = true;
  14 +               mcore->pflash.buswidth = 2;
  15 +               mcore->pflash.window = SSB_FLASH1;
  16 +               mcore->pflash.window_size = SSB_FLASH1_SZ;
  17 +               return;
  18 +       }
  19 +
  20 +       /* There is ChipCommon, so use it to read info about flash */
  21 +       switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
  22 +       case SSB_CHIPCO_FLASHT_STSER:
  23 +       case SSB_CHIPCO_FLASHT_ATSER:
  24 +               pr_err("Serial flash not supported\n");
  25 +               break;
  26 +       case SSB_CHIPCO_FLASHT_PARA:
  27 +               pr_debug("Found parallel flash\n");
  28 +               mcore->pflash.present = true;
  29 +               mcore->pflash.window = SSB_FLASH2;
  30 +               mcore->pflash.window_size = SSB_FLASH2_SZ;
  31                 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
  32                                & SSB_CHIPCO_CFG_DS16) == 0)
  33 -                       mcore->flash_buswidth = 1;
  34 -       } else {
  35 -               mcore->flash_window = 0x1fc00000;
  36 -               mcore->flash_window_size = 0x00400000;
  37 +                       mcore->pflash.buswidth = 1;
  38 +               else
  39 +                       mcore->pflash.buswidth = 2;
  40 +               break;
  41         }
  42  }
  43
  44 --- a/include/linux/ssb/ssb_driver_chipcommon.h
  45 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
  46 @@ -504,7 +504,9 @@
  47  #define SSB_CHIPCO_FLASHCTL_ST_SE      0x02D8          /* Sector Erase */
  48  #define SSB_CHIPCO_FLASHCTL_ST_BE      0x00C7          /* Bulk Erase */
  49  #define SSB_CHIPCO_FLASHCTL_ST_DP      0x00B9          /* Deep Power-down */
  50 -#define SSB_CHIPCO_FLASHCTL_ST_RSIG    0x03AB          /* Read Electronic Signature */
  51 +#define SSB_CHIPCO_FLASHCTL_ST_RES     0x03AB          /* Read Electronic Signature */
  52 +#define SSB_CHIPCO_FLASHCTL_ST_CSA     0x1000          /* Keep chip select asserted */
  53 +#define SSB_CHIPCO_FLASHCTL_ST_SSE     0x0220          /* Sub-sector Erase */
  54
  55  /* Status register bits for ST flashes */
  56  #define SSB_CHIPCO_FLASHSTA_ST_WIP     0x01            /* Write In Progress */
  57 --- a/include/linux/ssb/ssb_driver_mips.h
  58 +++ b/include/linux/ssb/ssb_driver_mips.h
  59 @@ -13,6 +13,12 @@ struct ssb_serial_port {
  60         unsigned int reg_shift;
  61  };
  62
  63 +struct ssb_pflash {
  64 +       bool present;
  65 +       u8 buswidth;
  66 +       u32 window;
  67 +       u32 window_size;
  68 +};
  69
  70  struct ssb_mipscore {
  71         struct ssb_device *dev;
  72 @@ -20,9 +26,7 @@ struct ssb_mipscore {
  73         int nr_serial_ports;
  74         struct ssb_serial_port serial_ports[4];
  75
  76 -       u8 flash_buswidth;
  77 -       u32 flash_window;
  78 -       u32 flash_window_size;
  79 +       struct ssb_pflash pflash;
  80  };
  81
  82  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);