target/linux/generic/patches-3.6/132-solos-dma.patch

   1 commit 152a2a8b5e1d4cbe91a7c66f1028db15164a3766
   2 Author: David Woodhouse <David.Woodhouse@intel.com>
   3 Date:   Wed Dec 19 11:01:21 2012 +0000
   4
   5     solos-pci: ensure all TX packets are aligned to 4 bytes
   6
   7     The FPGA can't handled unaligned DMA (yet). So copy into an aligned buffer,
   8     if skb->data isn't suitably aligned.
   9
  10     Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  11     Signed-off-by: David S. Miller <davem@davemloft.net>
  12
  13 commit 13af816469db3449c072afbae6c4c1bd9ccecccb
  14 Author: Nathan Williams <nathan@traverse.com.au>
  15 Date:   Wed Dec 19 11:01:20 2012 +0000
  16
  17     solos-pci: add firmware upgrade support for new models
  18
  19     Signed-off-by: Nathan Williams <nathan@traverse.com.au>
  20     Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  21     Signed-off-by: David S. Miller <davem@davemloft.net>
  22
  23 commit 7fbdadb5e951e4f0c0fc991ff5f50295568786e6
  24 Author: Nathan Williams <nathan@traverse.com.au>
  25 Date:   Wed Dec 19 11:01:19 2012 +0000
  26
  27     solos-pci: remove superfluous debug output
  28
  29     Signed-off-by: Nathan Williams <nathan@traverse.com.au>
  30     Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  31     Signed-off-by: David S. Miller <davem@davemloft.net>
  32
  33 commit f9baad02e7411d9f38d5ebe1a1cdcde4ceec100d
  34 Author: Nathan Williams <nathan@traverse.com.au>
  35 Date:   Wed Dec 19 11:01:18 2012 +0000
  36
  37     solos-pci: add GPIO support for newer versions on Geos board
  38
  39     dwmw2: Tidy up a little, simpler matching on which GPIO is being accessed,
  40            only register on newer boards, register under PCI device instead of
  41            duplicating them under each ATM device.
  42
  43     Signed-off-by: Nathan Williams <nathan@traverse.com.au>
  44     Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  45     Signed-off-by: David S. Miller <davem@davemloft.net>
  46
  47 commit cae49ede00ec3d0cda290b03fee55b72b49efc11
  48 Author: David Woodhouse <dwmw2@infradead.org>
  49 Date:   Tue Dec 11 14:57:14 2012 +0000
  50
  51     solos-pci: fix double-free of TX skb in DMA mode
  52
  53     We weren't clearing card->tx_skb[port] when processing the TX done interrupt.
  54     If there wasn't another skb ready to transmit immediately, this led to a
  55     double-free because we'd free it *again* next time we did have a packet to
  56     send.
  57
  58     Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
  59     Cc: stable@kernel.org
  60     Signed-off-by: David S. Miller <davem@davemloft.net>
  61
  62 ==
  63 There is a typo here so we do a double lock instead of an unlock.
  64
  65 Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
  66 ---
  67 Only needed in linux-next.  Introduced in f9baad02e7411d9 [14/17]
  68 solos-pci: add GPIO support for newer versions on Geos board
  69
  70
  71 --- a/drivers/atm/solos-pci.c
  72 +++ b/drivers/atm/solos-pci.c
  73 @@ -42,7 +42,8 @@
  74  #include <linux/swab.h>
  75  #include <linux/slab.h>
  76
  77 -#define VERSION "0.07"
  78 +#define VERSION "1.04"
  79 +#define DRIVER_VERSION 0x01
  80  #define PTAG "solos-pci"
  81
  82  #define CONFIG_RAM_SIZE        128
  83 @@ -56,16 +57,21 @@
  84  #define FLASH_BUSY     0x60
  85  #define FPGA_MODE      0x5C
  86  #define FLASH_MODE     0x58
  87 +#define GPIO_STATUS    0x54
  88 +#define DRIVER_VER     0x50
  89  #define TX_DMA_ADDR(port)      (0x40 + (4 * (port)))
  90  #define RX_DMA_ADDR(port)      (0x30 + (4 * (port)))
  91
  92  #define DATA_RAM_SIZE  32768
  93  #define BUF_SIZE       2048
  94  #define OLD_BUF_SIZE   4096 /* For FPGA versions <= 2*/
  95 -#define FPGA_PAGE      528 /* FPGA flash page size*/
  96 -#define SOLOS_PAGE     512 /* Solos flash page size*/
  97 -#define FPGA_BLOCK     (FPGA_PAGE * 8) /* FPGA flash block size*/
  98 -#define SOLOS_BLOCK    (SOLOS_PAGE * 8) /* Solos flash block size*/
  99 +/* Old boards use ATMEL AD45DB161D flash */
 100 +#define ATMEL_FPGA_PAGE        528 /* FPGA flash page size*/
 101 +#define ATMEL_SOLOS_PAGE       512 /* Solos flash page size*/
 102 +#define ATMEL_FPGA_BLOCK       (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
 103 +#define ATMEL_SOLOS_BLOCK      (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
 104 +/* Current boards use M25P/M25PE SPI flash */
 105 +#define SPI_FLASH_BLOCK        (256 * 64)
 106
 107  #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
 108  #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
 109 @@ -123,11 +129,14 @@ struct solos_card {
 110         struct sk_buff_head cli_queue[4];
 111         struct sk_buff *tx_skb[4];
 112         struct sk_buff *rx_skb[4];
 113 +       unsigned char *dma_bounce;
 114         wait_queue_head_t param_wq;
 115         wait_queue_head_t fw_wq;
 116         int using_dma;
 117 +       int dma_alignment;
 118         int fpga_version;
 119         int buffer_size;
 120 +       int atmel_flash;
 121  };
 122
 123
 124 @@ -452,7 +461,6 @@ static ssize_t console_show(struct devic
 125
 126         len = skb->len;
 127         memcpy(buf, skb->data, len);
 128 -       dev_dbg(&card->dev->dev, "len: %d\n", len);
 129
 130         kfree_skb(skb);
 131         return len;
 132 @@ -499,6 +507,78 @@ static ssize_t console_store(struct devi
 133         return err?:count;
 134  }
 135
 136 +struct geos_gpio_attr {
 137 +       struct device_attribute attr;
 138 +       int offset;
 139 +};
 140 +
 141 +#define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset)  \
 142 +       struct geos_gpio_attr gpio_attr_##_name = {             \
 143 +               .attr = __ATTR(_name, _mode, _show, _store),    \
 144 +               .offset = _offset }
 145 +
 146 +static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
 147 +                              const char *buf, size_t count)
 148 +{
 149 +       struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 150 +       struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
 151 +       struct solos_card *card = pci_get_drvdata(pdev);
 152 +       uint32_t data32;
 153 +
 154 +       if (count != 1 && (count != 2 || buf[1] != '\n'))
 155 +               return -EINVAL;
 156 +
 157 +       spin_lock_irq(&card->param_queue_lock);
 158 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 159 +       if (buf[0] == '1') {
 160 +               data32 |= 1 << gattr->offset;
 161 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
 162 +       } else if (buf[0] == '0') {
 163 +               data32 &= ~(1 << gattr->offset);
 164 +               iowrite32(data32, card->config_regs + GPIO_STATUS);
 165 +       } else {
 166 +               count = -EINVAL;
 167 +       }
 168 +       spin_unlock_irq(&card->param_queue_lock);
 169 +       return count;
 170 +}
 171 +
 172 +static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
 173 +                             char *buf)
 174 +{
 175 +       struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 176 +       struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
 177 +       struct solos_card *card = pci_get_drvdata(pdev);
 178 +       uint32_t data32;
 179 +
 180 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 181 +       data32 = (data32 >> gattr->offset) & 1;
 182 +
 183 +       return sprintf(buf, "%d\n", data32);
 184 +}
 185 +
 186 +static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
 187 +                            char *buf)
 188 +{
 189 +       struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 190 +       struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
 191 +       struct solos_card *card = pci_get_drvdata(pdev);
 192 +       uint32_t data32;
 193 +
 194 +       data32 = ioread32(card->config_regs + GPIO_STATUS);
 195 +       switch (gattr->offset) {
 196 +       case 0:
 197 +               /* HardwareVersion */
 198 +               data32 = data32 & 0x1F;
 199 +               break;
 200 +       case 1:
 201 +               /* HardwareVariant */
 202 +               data32 = (data32 >> 5) & 0x0F;
 203 +               break;
 204 +       }
 205 +       return sprintf(buf, "%d\n", data32);
 206 +}
 207 +
 208  static DEVICE_ATTR(console, 0644, console_show, console_store);
 209
 210
 211 @@ -507,6 +587,14 @@ static DEVICE_ATTR(console, 0644, consol
 212
 213  #include "solos-attrlist.c"
 214
 215 +static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
 216 +static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
 217 +static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
 218 +static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
 219 +static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
 220 +static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
 221 +static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
 222 +static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
 223  #undef SOLOS_ATTR_RO
 224  #undef SOLOS_ATTR_RW
 225
 226 @@ -523,6 +611,23 @@ static struct attribute_group solos_attr
 227         .name = "parameters",
 228  };
 229
 230 +static struct attribute *gpio_attrs[] = {
 231 +       &gpio_attr_GPIO1.attr.attr,
 232 +       &gpio_attr_GPIO2.attr.attr,
 233 +       &gpio_attr_GPIO3.attr.attr,
 234 +       &gpio_attr_GPIO4.attr.attr,
 235 +       &gpio_attr_GPIO5.attr.attr,
 236 +       &gpio_attr_PushButton.attr.attr,
 237 +       &gpio_attr_HardwareVersion.attr.attr,
 238 +       &gpio_attr_HardwareVariant.attr.attr,
 239 +       NULL
 240 +};
 241 +
 242 +static struct attribute_group gpio_attr_group = {
 243 +       .attrs = gpio_attrs,
 244 +       .name = "gpio",
 245 +};
 246 +
 247  static int flash_upgrade(struct solos_card *card, int chip)
 248  {
 249         const struct firmware *fw;
 250 @@ -534,16 +639,25 @@ static int flash_upgrade(struct solos_ca
 251         switch (chip) {
 252         case 0:
 253                 fw_name = "solos-FPGA.bin";
 254 -               blocksize = FPGA_BLOCK;
 255 +               if (card->atmel_flash)
 256 +                       blocksize = ATMEL_FPGA_BLOCK;
 257 +               else
 258 +                       blocksize = SPI_FLASH_BLOCK;
 259                 break;
 260         case 1:
 261                 fw_name = "solos-Firmware.bin";
 262 -               blocksize = SOLOS_BLOCK;
 263 +               if (card->atmel_flash)
 264 +                       blocksize = ATMEL_SOLOS_BLOCK;
 265 +               else
 266 +                       blocksize = SPI_FLASH_BLOCK;
 267                 break;
 268         case 2:
 269                 if (card->fpga_version > LEGACY_BUFFERS){
 270                         fw_name = "solos-db-FPGA.bin";
 271 -                       blocksize = FPGA_BLOCK;
 272 +                       if (card->atmel_flash)
 273 +                               blocksize = ATMEL_FPGA_BLOCK;
 274 +                       else
 275 +                               blocksize = SPI_FLASH_BLOCK;
 276                 } else {
 277                         dev_info(&card->dev->dev, "FPGA version doesn't support"
 278                                         " daughter board upgrades\n");
 279 @@ -553,7 +667,10 @@ static int flash_upgrade(struct solos_ca
 280         case 3:
 281                 if (card->fpga_version > LEGACY_BUFFERS){
 282                         fw_name = "solos-Firmware.bin";
 283 -                       blocksize = SOLOS_BLOCK;
 284 +                       if (card->atmel_flash)
 285 +                               blocksize = ATMEL_SOLOS_BLOCK;
 286 +                       else
 287 +                               blocksize = SPI_FLASH_BLOCK;
 288                 } else {
 289                         dev_info(&card->dev->dev, "FPGA version doesn't support"
 290                                         " daughter board upgrades\n");
 291 @@ -569,6 +686,9 @@ static int flash_upgrade(struct solos_ca
 292
 293         dev_info(&card->dev->dev, "Flash upgrade starting\n");
 294
 295 +       /* New FPGAs require driver version before permitting flash upgrades */
 296 +       iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
 297 +
 298         numblocks = fw->size / blocksize;
 299         dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
 300         dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
 301 @@ -598,9 +718,13 @@ static int flash_upgrade(struct solos_ca
 302                 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
 303                 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
 304
 305 -               /* Copy block to buffer, swapping each 16 bits */
 306 +               /* Copy block to buffer, swapping each 16 bits for Atmel flash */
 307                 for(i = 0; i < blocksize; i += 4) {
 308 -                       uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
 309 +                       uint32_t word;
 310 +                       if (card->atmel_flash)
 311 +                               word = swahb32p((uint32_t *)(fw->data + offset + i));
 312 +                       else
 313 +                               word = *(uint32_t *)(fw->data + offset + i);
 314                         if(card->fpga_version > LEGACY_BUFFERS)
 315                                 iowrite32(word, FLASH_BUF + i);
 316                         else
 317 @@ -945,10 +1069,11 @@ static uint32_t fpga_tx(struct solos_car
 318         for (port = 0; tx_pending; tx_pending >>= 1, port++) {
 319                 if (tx_pending & 1) {
 320                         struct sk_buff *oldskb = card->tx_skb[port];
 321 -                       if (oldskb)
 322 +                       if (oldskb) {
 323                                 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
 324                                                  oldskb->len, PCI_DMA_TODEVICE);
 325 -
 326 +                               card->tx_skb[port] = NULL;
 327 +                       }
 328                         spin_lock(&card->tx_queue_lock);
 329                         skb = skb_dequeue(&card->tx_queue[port]);
 330                         if (!skb)
 331 @@ -960,7 +1085,12 @@ static uint32_t fpga_tx(struct solos_car
 332                                 tx_started |= 1 << port;
 333                                 oldskb = skb; /* We're done with this skb already */
 334                         } else if (skb && card->using_dma) {
 335 -                               SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
 336 +                               unsigned char *data = skb->data;
 337 +                               if ((unsigned long)data & card->dma_alignment) {
 338 +                                       data = card->dma_bounce + (BUF_SIZE * port);
 339 +                                       memcpy(data, skb->data, skb->len);
 340 +                               }
 341 +                               SKB_CB(skb)->dma_addr = pci_map_single(card->dev, data,
 342                                                                        skb->len, PCI_DMA_TODEVICE);
 343                                 card->tx_skb[port] = skb;
 344                                 iowrite32(SKB_CB(skb)->dma_addr,
 345 @@ -1134,18 +1264,33 @@ static int fpga_probe(struct pci_dev *de
 346                 db_fpga_upgrade = db_firmware_upgrade = 0;
 347         }
 348
 349 +       /* Stopped using Atmel flash after 0.03-38 */
 350 +       if (fpga_ver < 39)
 351 +               card->atmel_flash = 1;
 352 +       else
 353 +               card->atmel_flash = 0;
 354 +
 355 +       data32 = ioread32(card->config_regs + PORTS);
 356 +       card->nr_ports = (data32 & 0x000000FF);
 357 +
 358         if (card->fpga_version >= DMA_SUPPORTED) {
 359                 pci_set_master(dev);
 360                 card->using_dma = 1;
 361 +               if (1) { /* All known FPGA versions so far */
 362 +                       card->dma_alignment = 3;
 363 +                       card->dma_bounce = kmalloc(card->nr_ports * BUF_SIZE, GFP_KERNEL);
 364 +                       if (!card->dma_bounce) {
 365 +                               dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
 366 +                               /* Fallback to MMIO doesn't work */
 367 +                               goto out_unmap_both;
 368 +                       }
 369 +               }
 370         } else {
 371                 card->using_dma = 0;
 372                 /* Set RX empty flag for all ports */
 373                 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
 374         }
 375
 376 -       data32 = ioread32(card->config_regs + PORTS);
 377 -       card->nr_ports = (data32 & 0x000000FF);
 378 -
 379         pci_set_drvdata(dev, card);
 380
 381         tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
 382 @@ -1180,6 +1325,10 @@ static int fpga_probe(struct pci_dev *de
 383         if (err)
 384                 goto out_free_irq;
 385
 386 +       if (card->fpga_version >= DMA_SUPPORTED &&
 387 +           sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
 388 +               dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
 389 +
 390         return 0;
 391
 392   out_free_irq:
 393 @@ -1188,6 +1337,7 @@ static int fpga_probe(struct pci_dev *de
 394         tasklet_kill(&card->tlet);
 395
 396   out_unmap_both:
 397 +       kfree(card->dma_bounce);
 398         pci_set_drvdata(dev, NULL);
 399         pci_iounmap(dev, card->buffers);
 400   out_unmap_config:
 401 @@ -1290,11 +1440,16 @@ static void fpga_remove(struct pci_dev *
 402         iowrite32(1, card->config_regs + FPGA_MODE);
 403         (void)ioread32(card->config_regs + FPGA_MODE);
 404
 405 +       if (card->fpga_version >= DMA_SUPPORTED)
 406 +               sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
 407 +
 408         atm_remove(card);
 409
 410         free_irq(dev->irq, card);
 411         tasklet_kill(&card->tlet);
 412
 413 +       kfree(card->dma_bounce);
 414 +
 415         /* Release device from reset */
 416         iowrite32(0, card->config_regs + FPGA_MODE);
 417         (void)ioread32(card->config_regs + FPGA_MODE);