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kernel: update bcma and ssb to version from wireless-testing/master tag master-2013...
[openwrt/staging/wigyori.git] / target / linux / generic / patches-3.9 / 020-ssb_update.patch
1 --- a/drivers/ssb/Kconfig
2 +++ b/drivers/ssb/Kconfig
3 @@ -144,7 +144,7 @@ config SSB_SFLASH
4 # Assumption: We are on embedded, if we compile the MIPS core.
5 config SSB_EMBEDDED
6 bool
7 - depends on SSB_DRIVER_MIPS
8 + depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
9 default y
10
11 config SSB_DRIVER_EXTIF
12 --- a/drivers/ssb/driver_chipcommon.c
13 +++ b/drivers/ssb/driver_chipcommon.c
14 @@ -354,7 +354,7 @@ void ssb_chipcommon_init(struct ssb_chip
15
16 if (cc->dev->id.revision >= 11)
17 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
18 - ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
19 + ssb_dbg("chipcommon status is 0x%x\n", cc->status);
20
21 if (cc->dev->id.revision >= 20) {
22 chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0);
23 --- a/drivers/ssb/driver_chipcommon_pmu.c
24 +++ b/drivers/ssb/driver_chipcommon_pmu.c
25 @@ -110,8 +110,8 @@ static void ssb_pmu0_pllinit_r0(struct s
26 return;
27 }
28
29 - ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
30 - (crystalfreq / 1000), (crystalfreq % 1000));
31 + ssb_info("Programming PLL to %u.%03u MHz\n",
32 + crystalfreq / 1000, crystalfreq % 1000);
33
34 /* First turn the PLL off. */
35 switch (bus->chip_id) {
36 @@ -138,7 +138,7 @@ static void ssb_pmu0_pllinit_r0(struct s
37 }
38 tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
39 if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
40 - ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
41 + ssb_emerg("Failed to turn the PLL off!\n");
42
43 /* Set PDIV in PLL control 0. */
44 pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
45 @@ -249,8 +249,8 @@ static void ssb_pmu1_pllinit_r0(struct s
46 return;
47 }
48
49 - ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
50 - (crystalfreq / 1000), (crystalfreq % 1000));
51 + ssb_info("Programming PLL to %u.%03u MHz\n",
52 + crystalfreq / 1000, crystalfreq % 1000);
53
54 /* First turn the PLL off. */
55 switch (bus->chip_id) {
56 @@ -275,7 +275,7 @@ static void ssb_pmu1_pllinit_r0(struct s
57 }
58 tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
59 if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
60 - ssb_printk(KERN_EMERG PFX "Failed to turn the PLL off!\n");
61 + ssb_emerg("Failed to turn the PLL off!\n");
62
63 /* Set p1div and p2div. */
64 pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
65 @@ -349,9 +349,8 @@ static void ssb_pmu_pll_init(struct ssb_
66 case 43222:
67 break;
68 default:
69 - ssb_printk(KERN_ERR PFX
70 - "ERROR: PLL init unknown for device %04X\n",
71 - bus->chip_id);
72 + ssb_err("ERROR: PLL init unknown for device %04X\n",
73 + bus->chip_id);
74 }
75 }
76
77 @@ -472,9 +471,8 @@ static void ssb_pmu_resources_init(struc
78 max_msk = 0xFFFFF;
79 break;
80 default:
81 - ssb_printk(KERN_ERR PFX
82 - "ERROR: PMU resource config unknown for device %04X\n",
83 - bus->chip_id);
84 + ssb_err("ERROR: PMU resource config unknown for device %04X\n",
85 + bus->chip_id);
86 }
87
88 if (updown_tab) {
89 @@ -526,8 +524,8 @@ void ssb_pmu_init(struct ssb_chipcommon
90 pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
91 cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);
92
93 - ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
94 - cc->pmu.rev, pmucap);
95 + ssb_dbg("Found rev %u PMU (capabilities 0x%08X)\n",
96 + cc->pmu.rev, pmucap);
97
98 if (cc->pmu.rev == 1)
99 chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
100 @@ -638,9 +636,8 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chi
101 case 0x5354:
102 ssb_pmu_get_alp_clock_clk0(cc);
103 default:
104 - ssb_printk(KERN_ERR PFX
105 - "ERROR: PMU alp clock unknown for device %04X\n",
106 - bus->chip_id);
107 + ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
108 + bus->chip_id);
109 return 0;
110 }
111 }
112 @@ -654,9 +651,8 @@ u32 ssb_pmu_get_cpu_clock(struct ssb_chi
113 /* 5354 chip uses a non programmable PLL of frequency 240MHz */
114 return 240000000;
115 default:
116 - ssb_printk(KERN_ERR PFX
117 - "ERROR: PMU cpu clock unknown for device %04X\n",
118 - bus->chip_id);
119 + ssb_err("ERROR: PMU cpu clock unknown for device %04X\n",
120 + bus->chip_id);
121 return 0;
122 }
123 }
124 @@ -669,9 +665,8 @@ u32 ssb_pmu_get_controlclock(struct ssb_
125 case 0x5354:
126 return 120000000;
127 default:
128 - ssb_printk(KERN_ERR PFX
129 - "ERROR: PMU controlclock unknown for device %04X\n",
130 - bus->chip_id);
131 + ssb_err("ERROR: PMU controlclock unknown for device %04X\n",
132 + bus->chip_id);
133 return 0;
134 }
135 }
136 @@ -692,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct
137 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
138 break;
139 case 43222:
140 - /* TODO: BCM43222 requires updating PLLs too */
141 - return;
142 + if (spuravoid == 1) {
143 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);
144 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);
145 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);
146 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
147 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);
148 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);
149 + } else {
150 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);
151 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);
152 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);
153 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
154 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);
155 + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);
156 + }
157 + pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
158 + break;
159 default:
160 ssb_printk(KERN_ERR PFX
161 "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
162 --- a/drivers/ssb/driver_chipcommon_sflash.c
163 +++ b/drivers/ssb/driver_chipcommon_sflash.c
164 @@ -9,6 +9,19 @@
165
166 #include "ssb_private.h"
167
168 +static struct resource ssb_sflash_resource = {
169 + .name = "ssb_sflash",
170 + .start = SSB_FLASH2,
171 + .end = 0,
172 + .flags = IORESOURCE_MEM | IORESOURCE_READONLY,
173 +};
174 +
175 +struct platform_device ssb_sflash_dev = {
176 + .name = "ssb_sflash",
177 + .resource = &ssb_sflash_resource,
178 + .num_resources = 1,
179 +};
180 +
181 struct ssb_sflash_tbl_e {
182 char *name;
183 u32 id;
184 @@ -16,7 +29,7 @@ struct ssb_sflash_tbl_e {
185 u16 numblocks;
186 };
187
188 -static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
189 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
190 { "M25P20", 0x11, 0x10000, 4, },
191 { "M25P40", 0x12, 0x10000, 8, },
192
193 @@ -27,7 +40,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
194 { 0 },
195 };
196
197 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
198 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
199 { "SST25WF512", 1, 0x1000, 16, },
200 { "SST25VF512", 0x48, 0x1000, 16, },
201 { "SST25WF010", 2, 0x1000, 32, },
202 @@ -45,7 +58,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
203 { 0 },
204 };
205
206 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
207 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
208 { "AT45DB011", 0xc, 256, 512, },
209 { "AT45DB021", 0x14, 256, 1024, },
210 { "AT45DB041", 0x1c, 256, 2048, },
211 @@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
212 /* Initialize serial flash access */
213 int ssb_sflash_init(struct ssb_chipcommon *cc)
214 {
215 - struct ssb_sflash_tbl_e *e;
216 + struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
217 + const struct ssb_sflash_tbl_e *e;
218 u32 id, id2;
219
220 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
221 @@ -131,9 +145,21 @@ int ssb_sflash_init(struct ssb_chipcommo
222 return -ENOTSUPP;
223 }
224
225 + sflash->window = SSB_FLASH2;
226 + sflash->blocksize = e->blocksize;
227 + sflash->numblocks = e->numblocks;
228 + sflash->size = sflash->blocksize * sflash->numblocks;
229 + sflash->present = true;
230 +
231 pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
232 e->name, e->blocksize, e->numblocks);
233
234 + /* Prepare platform device, but don't register it yet. It's too early,
235 + * malloc (required by device_private_init) is not available yet. */
236 + ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
237 + sflash->size;
238 + ssb_sflash_dev.dev.platform_data = sflash;
239 +
240 pr_err("Serial flash support is not implemented yet!\n");
241
242 return -ENOTSUPP;
243 --- a/drivers/ssb/driver_mipscore.c
244 +++ b/drivers/ssb/driver_mipscore.c
245 @@ -167,21 +167,22 @@ static void set_irq(struct ssb_device *d
246 irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]);
247 ssb_write32(mdev, SSB_IPSFLAG, irqflag);
248 }
249 - ssb_dprintk(KERN_INFO PFX
250 - "set_irq: core 0x%04x, irq %d => %d\n",
251 - dev->id.coreid, oldirq+2, irq+2);
252 + ssb_dbg("set_irq: core 0x%04x, irq %d => %d\n",
253 + dev->id.coreid, oldirq+2, irq+2);
254 }
255
256 static void print_irq(struct ssb_device *dev, unsigned int irq)
257 {
258 - int i;
259 static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
260 - ssb_dprintk(KERN_INFO PFX
261 - "core 0x%04x, irq :", dev->id.coreid);
262 - for (i = 0; i <= 6; i++) {
263 - ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" ");
264 - }
265 - ssb_dprintk("\n");
266 + ssb_dbg("core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n",
267 + dev->id.coreid,
268 + irq_name[0], irq == 0 ? "*" : " ",
269 + irq_name[1], irq == 1 ? "*" : " ",
270 + irq_name[2], irq == 2 ? "*" : " ",
271 + irq_name[3], irq == 3 ? "*" : " ",
272 + irq_name[4], irq == 4 ? "*" : " ",
273 + irq_name[5], irq == 5 ? "*" : " ",
274 + irq_name[6], irq == 6 ? "*" : " ");
275 }
276
277 static void dump_irq(struct ssb_bus *bus)
278 @@ -286,7 +287,7 @@ void ssb_mipscore_init(struct ssb_mipsco
279 if (!mcore->dev)
280 return; /* We don't have a MIPS core */
281
282 - ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n");
283 + ssb_dbg("Initializing MIPS core...\n");
284
285 bus = mcore->dev->bus;
286 hz = ssb_clockspeed(bus);
287 @@ -334,7 +335,7 @@ void ssb_mipscore_init(struct ssb_mipsco
288 break;
289 }
290 }
291 - ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n");
292 + ssb_dbg("after irq reconfiguration\n");
293 dump_irq(bus);
294
295 ssb_mips_serial_init(mcore);
296 --- a/drivers/ssb/driver_pcicore.c
297 +++ b/drivers/ssb/driver_pcicore.c
298 @@ -263,8 +263,7 @@ int ssb_pcicore_plat_dev_init(struct pci
299 return -ENODEV;
300 }
301
302 - ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
303 - pci_name(d));
304 + ssb_info("PCI: Fixing up device %s\n", pci_name(d));
305
306 /* Fix up interrupt lines */
307 d->irq = ssb_mips_irq(extpci_core->dev) + 2;
308 @@ -285,12 +284,12 @@ static void ssb_pcicore_fixup_pcibridge(
309 if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
310 return;
311
312 - ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
313 + ssb_info("PCI: Fixing up bridge %s\n", pci_name(dev));
314
315 /* Enable PCI bridge bus mastering and memory space */
316 pci_set_master(dev);
317 if (pcibios_enable_device(dev, ~0) < 0) {
318 - ssb_printk(KERN_ERR "PCI: SSB bridge enable failed\n");
319 + ssb_err("PCI: SSB bridge enable failed\n");
320 return;
321 }
322
323 @@ -299,8 +298,8 @@ static void ssb_pcicore_fixup_pcibridge(
324
325 /* Make sure our latency is high enough to handle the devices behind us */
326 lat = 168;
327 - ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
328 - pci_name(dev), lat);
329 + ssb_info("PCI: Fixing latency timer of device %s to %u\n",
330 + pci_name(dev), lat);
331 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
332 }
333 DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_pcicore_fixup_pcibridge);
334 @@ -323,7 +322,7 @@ static void ssb_pcicore_init_hostmode(st
335 return;
336 extpci_core = pc;
337
338 - ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n");
339 + ssb_dbg("PCIcore in host mode found\n");
340 /* Reset devices on the external PCI bus */
341 val = SSB_PCICORE_CTL_RST_OE;
342 val |= SSB_PCICORE_CTL_CLK_OE;
343 @@ -338,7 +337,7 @@ static void ssb_pcicore_init_hostmode(st
344 udelay(1); /* Assertion time demanded by the PCI standard */
345
346 if (pc->dev->bus->has_cardbus_slot) {
347 - ssb_dprintk(KERN_INFO PFX "CardBus slot detected\n");
348 + ssb_dbg("CardBus slot detected\n");
349 pc->cardbusmode = 1;
350 /* GPIO 1 resets the bridge */
351 ssb_gpio_out(pc->dev->bus, 1, 1);
352 --- a/drivers/ssb/embedded.c
353 +++ b/drivers/ssb/embedded.c
354 @@ -57,9 +57,8 @@ int ssb_watchdog_register(struct ssb_bus
355 bus->busnumber, &wdt,
356 sizeof(wdt));
357 if (IS_ERR(pdev)) {
358 - ssb_dprintk(KERN_INFO PFX
359 - "can not register watchdog device, err: %li\n",
360 - PTR_ERR(pdev));
361 + ssb_dbg("can not register watchdog device, err: %li\n",
362 + PTR_ERR(pdev));
363 return PTR_ERR(pdev);
364 }
365
366 --- a/drivers/ssb/main.c
367 +++ b/drivers/ssb/main.c
368 @@ -275,8 +275,8 @@ int ssb_devices_thaw(struct ssb_freeze_c
369
370 err = sdrv->probe(sdev, &sdev->id);
371 if (err) {
372 - ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
373 - dev_name(sdev->dev));
374 + ssb_err("Failed to thaw device %s\n",
375 + dev_name(sdev->dev));
376 result = err;
377 }
378 ssb_device_put(sdev);
379 @@ -447,10 +447,9 @@ void ssb_bus_unregister(struct ssb_bus *
380
381 err = ssb_gpio_unregister(bus);
382 if (err == -EBUSY)
383 - ssb_dprintk(KERN_ERR PFX "Some GPIOs are still in use.\n");
384 + ssb_dbg("Some GPIOs are still in use\n");
385 else if (err)
386 - ssb_dprintk(KERN_ERR PFX
387 - "Can not unregister GPIO driver: %i\n", err);
388 + ssb_dbg("Can not unregister GPIO driver: %i\n", err);
389
390 ssb_buses_lock();
391 ssb_devices_unregister(bus);
392 @@ -497,8 +496,7 @@ static int ssb_devices_register(struct s
393
394 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
395 if (!devwrap) {
396 - ssb_printk(KERN_ERR PFX
397 - "Could not allocate device\n");
398 + ssb_err("Could not allocate device\n");
399 err = -ENOMEM;
400 goto error;
401 }
402 @@ -537,9 +535,7 @@ static int ssb_devices_register(struct s
403 sdev->dev = dev;
404 err = device_register(dev);
405 if (err) {
406 - ssb_printk(KERN_ERR PFX
407 - "Could not register %s\n",
408 - dev_name(dev));
409 + ssb_err("Could not register %s\n", dev_name(dev));
410 /* Set dev to NULL to not unregister
411 * dev on error unwinding. */
412 sdev->dev = NULL;
413 @@ -557,6 +553,14 @@ static int ssb_devices_register(struct s
414 }
415 #endif
416
417 +#ifdef CONFIG_SSB_SFLASH
418 + if (bus->mipscore.sflash.present) {
419 + err = platform_device_register(&ssb_sflash_dev);
420 + if (err)
421 + pr_err("Error registering serial flash\n");
422 + }
423 +#endif
424 +
425 return 0;
426 error:
427 /* Unwind the already registered devices. */
428 @@ -825,10 +829,9 @@ static int ssb_bus_register(struct ssb_b
429 ssb_mipscore_init(&bus->mipscore);
430 err = ssb_gpio_init(bus);
431 if (err == -ENOTSUPP)
432 - ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
433 + ssb_dbg("GPIO driver not activated\n");
434 else if (err)
435 - ssb_dprintk(KERN_ERR PFX
436 - "Error registering GPIO driver: %i\n", err);
437 + ssb_dbg("Error registering GPIO driver: %i\n", err);
438 err = ssb_fetch_invariants(bus, get_invariants);
439 if (err) {
440 ssb_bus_may_powerdown(bus);
441 @@ -878,11 +881,11 @@ int ssb_bus_pcibus_register(struct ssb_b
442
443 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
444 if (!err) {
445 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
446 - "PCI device %s\n", dev_name(&host_pci->dev));
447 + ssb_info("Sonics Silicon Backplane found on PCI device %s\n",
448 + dev_name(&host_pci->dev));
449 } else {
450 - ssb_printk(KERN_ERR PFX "Failed to register PCI version"
451 - " of SSB with error %d\n", err);
452 + ssb_err("Failed to register PCI version of SSB with error %d\n",
453 + err);
454 }
455
456 return err;
457 @@ -903,8 +906,8 @@ int ssb_bus_pcmciabus_register(struct ss
458
459 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
460 if (!err) {
461 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
462 - "PCMCIA device %s\n", pcmcia_dev->devname);
463 + ssb_info("Sonics Silicon Backplane found on PCMCIA device %s\n",
464 + pcmcia_dev->devname);
465 }
466
467 return err;
468 @@ -925,8 +928,8 @@ int ssb_bus_sdiobus_register(struct ssb_
469
470 err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
471 if (!err) {
472 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
473 - "SDIO device %s\n", sdio_func_id(func));
474 + ssb_info("Sonics Silicon Backplane found on SDIO device %s\n",
475 + sdio_func_id(func));
476 }
477
478 return err;
479 @@ -944,8 +947,8 @@ int ssb_bus_ssbbus_register(struct ssb_b
480
481 err = ssb_bus_register(bus, get_invariants, baseaddr);
482 if (!err) {
483 - ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
484 - "address 0x%08lX\n", baseaddr);
485 + ssb_info("Sonics Silicon Backplane found at address 0x%08lX\n",
486 + baseaddr);
487 }
488
489 return err;
490 @@ -1339,7 +1342,7 @@ out:
491 #endif
492 return err;
493 error:
494 - ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
495 + ssb_err("Bus powerdown failed\n");
496 goto out;
497 }
498 EXPORT_SYMBOL(ssb_bus_may_powerdown);
499 @@ -1362,7 +1365,7 @@ int ssb_bus_powerup(struct ssb_bus *bus,
500
501 return 0;
502 error:
503 - ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
504 + ssb_err("Bus powerup failed\n");
505 return err;
506 }
507 EXPORT_SYMBOL(ssb_bus_powerup);
508 @@ -1470,15 +1473,13 @@ static int __init ssb_modinit(void)
509
510 err = b43_pci_ssb_bridge_init();
511 if (err) {
512 - ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
513 - "initialization failed\n");
514 + ssb_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
515 /* don't fail SSB init because of this */
516 err = 0;
517 }
518 err = ssb_gige_init();
519 if (err) {
520 - ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
521 - "driver initialization failed\n");
522 + ssb_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
523 /* don't fail SSB init because of this */
524 err = 0;
525 }
526 --- a/drivers/ssb/pci.c
527 +++ b/drivers/ssb/pci.c
528 @@ -56,7 +56,7 @@ int ssb_pci_switch_coreidx(struct ssb_bu
529 }
530 return 0;
531 error:
532 - ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
533 + ssb_err("Failed to switch to core %u\n", coreidx);
534 return -ENODEV;
535 }
536
537 @@ -67,10 +67,9 @@ int ssb_pci_switch_core(struct ssb_bus *
538 unsigned long flags;
539
540 #if SSB_VERBOSE_PCICORESWITCH_DEBUG
541 - ssb_printk(KERN_INFO PFX
542 - "Switching to %s core, index %d\n",
543 - ssb_core_name(dev->id.coreid),
544 - dev->core_index);
545 + ssb_info("Switching to %s core, index %d\n",
546 + ssb_core_name(dev->id.coreid),
547 + dev->core_index);
548 #endif
549
550 spin_lock_irqsave(&bus->bar_lock, flags);
551 @@ -231,6 +230,15 @@ static inline u8 ssb_crc8(u8 crc, u8 dat
552 return t[crc ^ data];
553 }
554
555 +static void sprom_get_mac(char *mac, const u16 *in)
556 +{
557 + int i;
558 + for (i = 0; i < 3; i++) {
559 + *mac++ = in[i] >> 8;
560 + *mac++ = in[i];
561 + }
562 +}
563 +
564 static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
565 {
566 int word;
567 @@ -278,7 +286,7 @@ static int sprom_do_write(struct ssb_bus
568 u32 spromctl;
569 u16 size = bus->sprom_size;
570
571 - ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
572 + ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
573 err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
574 if (err)
575 goto err_ctlreg;
576 @@ -286,17 +294,17 @@ static int sprom_do_write(struct ssb_bus
577 err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
578 if (err)
579 goto err_ctlreg;
580 - ssb_printk(KERN_NOTICE PFX "[ 0%%");
581 + ssb_notice("[ 0%%");
582 msleep(500);
583 for (i = 0; i < size; i++) {
584 if (i == size / 4)
585 - ssb_printk("25%%");
586 + ssb_cont("25%%");
587 else if (i == size / 2)
588 - ssb_printk("50%%");
589 + ssb_cont("50%%");
590 else if (i == (size * 3) / 4)
591 - ssb_printk("75%%");
592 + ssb_cont("75%%");
593 else if (i % 2)
594 - ssb_printk(".");
595 + ssb_cont(".");
596 writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
597 mmiowb();
598 msleep(20);
599 @@ -309,12 +317,12 @@ static int sprom_do_write(struct ssb_bus
600 if (err)
601 goto err_ctlreg;
602 msleep(500);
603 - ssb_printk("100%% ]\n");
604 - ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
605 + ssb_cont("100%% ]\n");
606 + ssb_notice("SPROM written\n");
607
608 return 0;
609 err_ctlreg:
610 - ssb_printk(KERN_ERR PFX "Could not access SPROM control register.\n");
611 + ssb_err("Could not access SPROM control register.\n");
612 return err;
613 }
614
615 @@ -339,10 +347,23 @@ static s8 r123_extract_antgain(u8 sprom_
616 return (s8)gain;
617 }
618
619 +static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
620 +{
621 + SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
622 + SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
623 + SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
624 + SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
625 + SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
626 + SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
627 + SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
628 + SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
629 + SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
630 + SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
631 + SSB_SPROM2_MAXP_A_LO_SHIFT);
632 +}
633 +
634 static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
635 {
636 - int i;
637 - u16 v;
638 u16 loc[3];
639
640 if (out->revision == 3) /* rev 3 moved MAC */
641 @@ -352,19 +373,10 @@ static void sprom_extract_r123(struct ss
642 loc[1] = SSB_SPROM1_ET0MAC;
643 loc[2] = SSB_SPROM1_ET1MAC;
644 }
645 - for (i = 0; i < 3; i++) {
646 - v = in[SPOFF(loc[0]) + i];
647 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
648 - }
649 + sprom_get_mac(out->il0mac, &in[SPOFF(loc[0])]);
650 if (out->revision < 3) { /* only rev 1-2 have et0, et1 */
651 - for (i = 0; i < 3; i++) {
652 - v = in[SPOFF(loc[1]) + i];
653 - *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
654 - }
655 - for (i = 0; i < 3; i++) {
656 - v = in[SPOFF(loc[2]) + i];
657 - *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
658 - }
659 + sprom_get_mac(out->et0mac, &in[SPOFF(loc[1])]);
660 + sprom_get_mac(out->et1mac, &in[SPOFF(loc[2])]);
661 }
662 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
663 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
664 @@ -372,6 +384,7 @@ static void sprom_extract_r123(struct ss
665 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
666 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
667 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
668 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
669 if (out->revision == 1)
670 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
671 SSB_SPROM1_BINF_CCODE_SHIFT);
672 @@ -398,8 +411,7 @@ static void sprom_extract_r123(struct ss
673 SSB_SPROM1_ITSSI_A_SHIFT);
674 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
675 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
676 - if (out->revision >= 2)
677 - SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
678 +
679 SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
680 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
681
682 @@ -410,6 +422,8 @@ static void sprom_extract_r123(struct ss
683 out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
684 SSB_SPROM1_AGAIN_A,
685 SSB_SPROM1_AGAIN_A_SHIFT);
686 + if (out->revision >= 2)
687 + sprom_extract_r23(out, in);
688 }
689
690 /* Revs 4 5 and 8 have partially shared layout */
691 @@ -454,23 +468,20 @@ static void sprom_extract_r458(struct ss
692
693 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
694 {
695 - int i;
696 - u16 v;
697 u16 il0mac_offset;
698
699 if (out->revision == 4)
700 il0mac_offset = SSB_SPROM4_IL0MAC;
701 else
702 il0mac_offset = SSB_SPROM5_IL0MAC;
703 - /* extract the MAC address */
704 - for (i = 0; i < 3; i++) {
705 - v = in[SPOFF(il0mac_offset) + i];
706 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
707 - }
708 +
709 + sprom_get_mac(out->il0mac, &in[SPOFF(il0mac_offset)]);
710 +
711 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
712 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
713 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
714 SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
715 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
716 if (out->revision == 4) {
717 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
718 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
719 @@ -530,7 +541,7 @@ static void sprom_extract_r45(struct ssb
720 static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
721 {
722 int i;
723 - u16 v, o;
724 + u16 o;
725 u16 pwr_info_offset[] = {
726 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
727 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
728 @@ -539,11 +550,10 @@ static void sprom_extract_r8(struct ssb_
729 ARRAY_SIZE(out->core_pwr_info));
730
731 /* extract the MAC address */
732 - for (i = 0; i < 3; i++) {
733 - v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
734 - *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
735 - }
736 + sprom_get_mac(out->il0mac, &in[SPOFF(SSB_SPROM8_IL0MAC)]);
737 +
738 SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
739 + SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
740 SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
741 SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
742 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
743 @@ -743,7 +753,7 @@ static int sprom_extract(struct ssb_bus
744 memset(out, 0, sizeof(*out));
745
746 out->revision = in[size - 1] & 0x00FF;
747 - ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
748 + ssb_dbg("SPROM revision %d detected\n", out->revision);
749 memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
750 memset(out->et1mac, 0xFF, 6);
751
752 @@ -752,7 +762,7 @@ static int sprom_extract(struct ssb_bus
753 * number stored in the SPROM.
754 * Always extract r1. */
755 out->revision = 1;
756 - ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
757 + ssb_dbg("SPROM treated as revision %d\n", out->revision);
758 }
759
760 switch (out->revision) {
761 @@ -769,9 +779,8 @@ static int sprom_extract(struct ssb_bus
762 sprom_extract_r8(out, in);
763 break;
764 default:
765 - ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
766 - " revision %d detected. Will extract"
767 - " v1\n", out->revision);
768 + ssb_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
769 + out->revision);
770 out->revision = 1;
771 sprom_extract_r123(out, in);
772 }
773 @@ -791,7 +800,7 @@ static int ssb_pci_sprom_get(struct ssb_
774 u16 *buf;
775
776 if (!ssb_is_sprom_available(bus)) {
777 - ssb_printk(KERN_ERR PFX "No SPROM available!\n");
778 + ssb_err("No SPROM available!\n");
779 return -ENODEV;
780 }
781 if (bus->chipco.dev) { /* can be unavailable! */
782 @@ -810,7 +819,7 @@ static int ssb_pci_sprom_get(struct ssb_
783 } else {
784 bus->sprom_offset = SSB_SPROM_BASE1;
785 }
786 - ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
787 + ssb_dbg("SPROM offset is 0x%x\n", bus->sprom_offset);
788
789 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
790 if (!buf)
791 @@ -835,18 +844,15 @@ static int ssb_pci_sprom_get(struct ssb_
792 * available for this device in some other storage */
793 err = ssb_fill_sprom_with_fallback(bus, sprom);
794 if (err) {
795 - ssb_printk(KERN_WARNING PFX "WARNING: Using"
796 - " fallback SPROM failed (err %d)\n",
797 - err);
798 + ssb_warn("WARNING: Using fallback SPROM failed (err %d)\n",
799 + err);
800 } else {
801 - ssb_dprintk(KERN_DEBUG PFX "Using SPROM"
802 - " revision %d provided by"
803 - " platform.\n", sprom->revision);
804 + ssb_dbg("Using SPROM revision %d provided by platform\n",
805 + sprom->revision);
806 err = 0;
807 goto out_free;
808 }
809 - ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
810 - " SPROM CRC (corrupt SPROM)\n");
811 + ssb_warn("WARNING: Invalid SPROM CRC (corrupt SPROM)\n");
812 }
813 }
814 err = sprom_extract(bus, sprom, buf, bus->sprom_size);
815 --- a/drivers/ssb/pcihost_wrapper.c
816 +++ b/drivers/ssb/pcihost_wrapper.c
817 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
818 struct ssb_bus *ssb = pci_get_drvdata(dev);
819 int err;
820
821 - pci_set_power_state(dev, 0);
822 + pci_set_power_state(dev, PCI_D0);
823 err = pci_enable_device(dev);
824 if (err)
825 return err;
826 --- a/drivers/ssb/pcmcia.c
827 +++ b/drivers/ssb/pcmcia.c
828 @@ -143,7 +143,7 @@ int ssb_pcmcia_switch_coreidx(struct ssb
829
830 return 0;
831 error:
832 - ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
833 + ssb_err("Failed to switch to core %u\n", coreidx);
834 return err;
835 }
836
837 @@ -153,10 +153,9 @@ int ssb_pcmcia_switch_core(struct ssb_bu
838 int err;
839
840 #if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
841 - ssb_printk(KERN_INFO PFX
842 - "Switching to %s core, index %d\n",
843 - ssb_core_name(dev->id.coreid),
844 - dev->core_index);
845 + ssb_info("Switching to %s core, index %d\n",
846 + ssb_core_name(dev->id.coreid),
847 + dev->core_index);
848 #endif
849
850 err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
851 @@ -192,7 +191,7 @@ int ssb_pcmcia_switch_segment(struct ssb
852
853 return 0;
854 error:
855 - ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
856 + ssb_err("Failed to switch pcmcia segment\n");
857 return err;
858 }
859
860 @@ -549,44 +548,39 @@ static int ssb_pcmcia_sprom_write_all(st
861 bool failed = 0;
862 size_t size = SSB_PCMCIA_SPROM_SIZE;
863
864 - ssb_printk(KERN_NOTICE PFX
865 - "Writing SPROM. Do NOT turn off the power! "
866 - "Please stand by...\n");
867 + ssb_notice("Writing SPROM. Do NOT turn off the power! Please stand by...\n");
868 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEEN);
869 if (err) {
870 - ssb_printk(KERN_NOTICE PFX
871 - "Could not enable SPROM write access.\n");
872 + ssb_notice("Could not enable SPROM write access\n");
873 return -EBUSY;
874 }
875 - ssb_printk(KERN_NOTICE PFX "[ 0%%");
876 + ssb_notice("[ 0%%");
877 msleep(500);
878 for (i = 0; i < size; i++) {
879 if (i == size / 4)
880 - ssb_printk("25%%");
881 + ssb_cont("25%%");
882 else if (i == size / 2)
883 - ssb_printk("50%%");
884 + ssb_cont("50%%");
885 else if (i == (size * 3) / 4)
886 - ssb_printk("75%%");
887 + ssb_cont("75%%");
888 else if (i % 2)
889 - ssb_printk(".");
890 + ssb_cont(".");
891 err = ssb_pcmcia_sprom_write(bus, i, sprom[i]);
892 if (err) {
893 - ssb_printk(KERN_NOTICE PFX
894 - "Failed to write to SPROM.\n");
895 + ssb_notice("Failed to write to SPROM\n");
896 failed = 1;
897 break;
898 }
899 }
900 err = ssb_pcmcia_sprom_command(bus, SSB_PCMCIA_SPROMCTL_WRITEDIS);
901 if (err) {
902 - ssb_printk(KERN_NOTICE PFX
903 - "Could not disable SPROM write access.\n");
904 + ssb_notice("Could not disable SPROM write access\n");
905 failed = 1;
906 }
907 msleep(500);
908 if (!failed) {
909 - ssb_printk("100%% ]\n");
910 - ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
911 + ssb_cont("100%% ]\n");
912 + ssb_notice("SPROM written\n");
913 }
914
915 return failed ? -EBUSY : 0;
916 @@ -700,7 +694,7 @@ static int ssb_pcmcia_do_get_invariants(
917 return -ENOSPC; /* continue with next entry */
918
919 error:
920 - ssb_printk(KERN_ERR PFX
921 + ssb_err(
922 "PCMCIA: Failed to fetch device invariants: %s\n",
923 error_description);
924 return -ENODEV;
925 @@ -722,7 +716,7 @@ int ssb_pcmcia_get_invariants(struct ssb
926 res = pcmcia_loop_tuple(bus->host_pcmcia, CISTPL_FUNCE,
927 ssb_pcmcia_get_mac, sprom);
928 if (res != 0) {
929 - ssb_printk(KERN_ERR PFX
930 + ssb_err(
931 "PCMCIA: Failed to fetch MAC address\n");
932 return -ENODEV;
933 }
934 @@ -733,7 +727,7 @@ int ssb_pcmcia_get_invariants(struct ssb
935 if ((res == 0) || (res == -ENOSPC))
936 return 0;
937
938 - ssb_printk(KERN_ERR PFX
939 + ssb_err(
940 "PCMCIA: Failed to fetch device invariants\n");
941 return -ENODEV;
942 }
943 @@ -843,6 +837,6 @@ int ssb_pcmcia_init(struct ssb_bus *bus)
944
945 return 0;
946 error:
947 - ssb_printk(KERN_ERR PFX "Failed to initialize PCMCIA host device\n");
948 + ssb_err("Failed to initialize PCMCIA host device\n");
949 return err;
950 }
951 --- a/drivers/ssb/scan.c
952 +++ b/drivers/ssb/scan.c
953 @@ -125,8 +125,7 @@ static u16 pcidev_to_chipid(struct pci_d
954 chipid_fallback = 0x4401;
955 break;
956 default:
957 - ssb_printk(KERN_ERR PFX
958 - "PCI-ID not in fallback list\n");
959 + ssb_err("PCI-ID not in fallback list\n");
960 }
961
962 return chipid_fallback;
963 @@ -152,8 +151,7 @@ static u8 chipid_to_nrcores(u16 chipid)
964 case 0x4704:
965 return 9;
966 default:
967 - ssb_printk(KERN_ERR PFX
968 - "CHIPID not in nrcores fallback list\n");
969 + ssb_err("CHIPID not in nrcores fallback list\n");
970 }
971
972 return 1;
973 @@ -320,15 +318,13 @@ int ssb_bus_scan(struct ssb_bus *bus,
974 bus->chip_package = 0;
975 }
976 }
977 - ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
978 - "package 0x%02X\n", bus->chip_id, bus->chip_rev,
979 - bus->chip_package);
980 + ssb_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
981 + bus->chip_id, bus->chip_rev, bus->chip_package);
982 if (!bus->nr_devices)
983 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
984 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
985 - ssb_printk(KERN_ERR PFX
986 - "More than %d ssb cores found (%d)\n",
987 - SSB_MAX_NR_CORES, bus->nr_devices);
988 + ssb_err("More than %d ssb cores found (%d)\n",
989 + SSB_MAX_NR_CORES, bus->nr_devices);
990 goto err_unmap;
991 }
992 if (bus->bustype == SSB_BUSTYPE_SSB) {
993 @@ -370,8 +366,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
994 nr_80211_cores++;
995 if (nr_80211_cores > 1) {
996 if (!we_support_multiple_80211_cores(bus)) {
997 - ssb_dprintk(KERN_INFO PFX "Ignoring additional "
998 - "802.11 core\n");
999 + ssb_dbg("Ignoring additional 802.11 core\n");
1000 continue;
1001 }
1002 }
1003 @@ -379,8 +374,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1004 case SSB_DEV_EXTIF:
1005 #ifdef CONFIG_SSB_DRIVER_EXTIF
1006 if (bus->extif.dev) {
1007 - ssb_printk(KERN_WARNING PFX
1008 - "WARNING: Multiple EXTIFs found\n");
1009 + ssb_warn("WARNING: Multiple EXTIFs found\n");
1010 break;
1011 }
1012 bus->extif.dev = dev;
1013 @@ -388,8 +382,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1014 break;
1015 case SSB_DEV_CHIPCOMMON:
1016 if (bus->chipco.dev) {
1017 - ssb_printk(KERN_WARNING PFX
1018 - "WARNING: Multiple ChipCommon found\n");
1019 + ssb_warn("WARNING: Multiple ChipCommon found\n");
1020 break;
1021 }
1022 bus->chipco.dev = dev;
1023 @@ -398,8 +391,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1024 case SSB_DEV_MIPS_3302:
1025 #ifdef CONFIG_SSB_DRIVER_MIPS
1026 if (bus->mipscore.dev) {
1027 - ssb_printk(KERN_WARNING PFX
1028 - "WARNING: Multiple MIPS cores found\n");
1029 + ssb_warn("WARNING: Multiple MIPS cores found\n");
1030 break;
1031 }
1032 bus->mipscore.dev = dev;
1033 @@ -420,8 +412,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
1034 }
1035 }
1036 if (bus->pcicore.dev) {
1037 - ssb_printk(KERN_WARNING PFX
1038 - "WARNING: Multiple PCI(E) cores found\n");
1039 + ssb_warn("WARNING: Multiple PCI(E) cores found\n");
1040 break;
1041 }
1042 bus->pcicore.dev = dev;
1043 --- a/drivers/ssb/sprom.c
1044 +++ b/drivers/ssb/sprom.c
1045 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
1046 while (cnt < sprom_size_words) {
1047 memcpy(tmp, dump, 4);
1048 dump += 4;
1049 - err = strict_strtoul(tmp, 16, &parsed);
1050 + err = kstrtoul(tmp, 16, &parsed);
1051 if (err)
1052 return err;
1053 sprom[cnt++] = swab16((u16)parsed);
1054 @@ -127,13 +127,13 @@ ssize_t ssb_attr_sprom_store(struct ssb_
1055 goto out_kfree;
1056 err = ssb_devices_freeze(bus, &freeze);
1057 if (err) {
1058 - ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze all devices\n");
1059 + ssb_err("SPROM write: Could not freeze all devices\n");
1060 goto out_unlock;
1061 }
1062 res = sprom_write(bus, sprom);
1063 err = ssb_devices_thaw(&freeze);
1064 if (err)
1065 - ssb_printk(KERN_ERR PFX "SPROM write: Could not thaw all devices\n");
1066 + ssb_err("SPROM write: Could not thaw all devices\n");
1067 out_unlock:
1068 mutex_unlock(&bus->sprom_mutex);
1069 out_kfree:
1070 --- a/drivers/ssb/ssb_private.h
1071 +++ b/drivers/ssb/ssb_private.h
1072 @@ -9,16 +9,27 @@
1073 #define PFX "ssb: "
1074
1075 #ifdef CONFIG_SSB_SILENT
1076 -# define ssb_printk(fmt, x...) do { /* nothing */ } while (0)
1077 +# define ssb_printk(fmt, ...) \
1078 + do { if (0) printk(fmt, ##__VA_ARGS__); } while (0)
1079 #else
1080 -# define ssb_printk printk
1081 +# define ssb_printk(fmt, ...) \
1082 + printk(fmt, ##__VA_ARGS__)
1083 #endif /* CONFIG_SSB_SILENT */
1084
1085 +#define ssb_emerg(fmt, ...) ssb_printk(KERN_EMERG PFX fmt, ##__VA_ARGS__)
1086 +#define ssb_err(fmt, ...) ssb_printk(KERN_ERR PFX fmt, ##__VA_ARGS__)
1087 +#define ssb_warn(fmt, ...) ssb_printk(KERN_WARNING PFX fmt, ##__VA_ARGS__)
1088 +#define ssb_notice(fmt, ...) ssb_printk(KERN_NOTICE PFX fmt, ##__VA_ARGS__)
1089 +#define ssb_info(fmt, ...) ssb_printk(KERN_INFO PFX fmt, ##__VA_ARGS__)
1090 +#define ssb_cont(fmt, ...) ssb_printk(KERN_CONT fmt, ##__VA_ARGS__)
1091 +
1092 /* dprintk: Debugging printk; vanishes for non-debug compilation */
1093 #ifdef CONFIG_SSB_DEBUG
1094 -# define ssb_dprintk(fmt, x...) ssb_printk(fmt , ##x)
1095 +# define ssb_dbg(fmt, ...) \
1096 + ssb_printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__)
1097 #else
1098 -# define ssb_dprintk(fmt, x...) do { /* nothing */ } while (0)
1099 +# define ssb_dbg(fmt, ...) \
1100 + do { if (0) printk(KERN_DEBUG PFX fmt, ##__VA_ARGS__); } while (0)
1101 #endif
1102
1103 #ifdef CONFIG_SSB_DEBUG
1104 @@ -232,6 +243,10 @@ static inline int ssb_sflash_init(struct
1105 extern struct platform_device ssb_pflash_dev;
1106 #endif
1107
1108 +#ifdef CONFIG_SSB_SFLASH
1109 +extern struct platform_device ssb_sflash_dev;
1110 +#endif
1111 +
1112 #ifdef CONFIG_SSB_DRIVER_EXTIF
1113 extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
1114 extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
1115 --- a/include/linux/ssb/ssb.h
1116 +++ b/include/linux/ssb/ssb.h
1117 @@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info {
1118
1119 struct ssb_sprom {
1120 u8 revision;
1121 - u8 il0mac[6]; /* MAC address for 802.11b/g */
1122 - u8 et0mac[6]; /* MAC address for Ethernet */
1123 - u8 et1mac[6]; /* MAC address for 802.11a */
1124 + u8 il0mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11b/g */
1125 + u8 et0mac[6] __aligned(sizeof(u16)); /* MAC address for Ethernet */
1126 + u8 et1mac[6] __aligned(sizeof(u16)); /* MAC address for 802.11a */
1127 u8 et0phyaddr; /* MII address for enet0 */
1128 u8 et1phyaddr; /* MII address for enet1 */
1129 u8 et0mdcport; /* MDIO for enet0 */
1130 @@ -340,13 +340,61 @@ enum ssb_bustype {
1131 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
1132 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
1133 /* board_type */
1134 +#define SSB_BOARD_BCM94301CB 0x0406
1135 +#define SSB_BOARD_BCM94301MP 0x0407
1136 +#define SSB_BOARD_BU4309 0x040A
1137 +#define SSB_BOARD_BCM94309CB 0x040B
1138 +#define SSB_BOARD_BCM4309MP 0x040C
1139 +#define SSB_BOARD_BU4306 0x0416
1140 #define SSB_BOARD_BCM94306MP 0x0418
1141 #define SSB_BOARD_BCM4309G 0x0421
1142 #define SSB_BOARD_BCM4306CB 0x0417
1143 -#define SSB_BOARD_BCM4309MP 0x040C
1144 +#define SSB_BOARD_BCM94306PC 0x0425 /* pcmcia 3.3v 4306 card */
1145 +#define SSB_BOARD_BCM94306CBSG 0x042B /* with SiGe PA */
1146 +#define SSB_BOARD_PCSG94306 0x042D /* with SiGe PA */
1147 +#define SSB_BOARD_BU4704SD 0x042E /* with sdram */
1148 +#define SSB_BOARD_BCM94704AGR 0x042F /* dual 11a/11g Router */
1149 +#define SSB_BOARD_BCM94308MP 0x0430 /* 11a-only minipci */
1150 +#define SSB_BOARD_BU4318 0x0447
1151 +#define SSB_BOARD_CB4318 0x0448
1152 +#define SSB_BOARD_MPG4318 0x0449
1153 #define SSB_BOARD_MP4318 0x044A
1154 -#define SSB_BOARD_BU4306 0x0416
1155 -#define SSB_BOARD_BU4309 0x040A
1156 +#define SSB_BOARD_SD4318 0x044B
1157 +#define SSB_BOARD_BCM94306P 0x044C /* with SiGe */
1158 +#define SSB_BOARD_BCM94303MP 0x044E
1159 +#define SSB_BOARD_BCM94306MPM 0x0450
1160 +#define SSB_BOARD_BCM94306MPL 0x0453
1161 +#define SSB_BOARD_PC4303 0x0454 /* pcmcia */
1162 +#define SSB_BOARD_BCM94306MPLNA 0x0457
1163 +#define SSB_BOARD_BCM94306MPH 0x045B
1164 +#define SSB_BOARD_BCM94306PCIV 0x045C
1165 +#define SSB_BOARD_BCM94318MPGH 0x0463
1166 +#define SSB_BOARD_BU4311 0x0464
1167 +#define SSB_BOARD_BCM94311MC 0x0465
1168 +#define SSB_BOARD_BCM94311MCAG 0x0466
1169 +/* 4321 boards */
1170 +#define SSB_BOARD_BU4321 0x046B
1171 +#define SSB_BOARD_BU4321E 0x047C
1172 +#define SSB_BOARD_MP4321 0x046C
1173 +#define SSB_BOARD_CB2_4321 0x046D
1174 +#define SSB_BOARD_CB2_4321_AG 0x0066
1175 +#define SSB_BOARD_MC4321 0x046E
1176 +/* 4325 boards */
1177 +#define SSB_BOARD_BCM94325DEVBU 0x0490
1178 +#define SSB_BOARD_BCM94325BGABU 0x0491
1179 +#define SSB_BOARD_BCM94325SDGWB 0x0492
1180 +#define SSB_BOARD_BCM94325SDGMDL 0x04AA
1181 +#define SSB_BOARD_BCM94325SDGMDL2 0x04C6
1182 +#define SSB_BOARD_BCM94325SDGMDL3 0x04C9
1183 +#define SSB_BOARD_BCM94325SDABGWBA 0x04E1
1184 +/* 4322 boards */
1185 +#define SSB_BOARD_BCM94322MC 0x04A4
1186 +#define SSB_BOARD_BCM94322USB 0x04A8 /* dualband */
1187 +#define SSB_BOARD_BCM94322HM 0x04B0
1188 +#define SSB_BOARD_BCM94322USB2D 0x04Bf /* single band discrete front end */
1189 +/* 4312 boards */
1190 +#define SSB_BOARD_BU4312 0x048A
1191 +#define SSB_BOARD_BCM4312MCGSG 0x04B5
1192 /* chip_package */
1193 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
1194 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
1195 --- a/include/linux/ssb/ssb_driver_mips.h
1196 +++ b/include/linux/ssb/ssb_driver_mips.h
1197 @@ -20,6 +20,18 @@ struct ssb_pflash {
1198 u32 window_size;
1199 };
1200
1201 +#ifdef CONFIG_SSB_SFLASH
1202 +struct ssb_sflash {
1203 + bool present;
1204 + u32 window;
1205 + u32 blocksize;
1206 + u16 numblocks;
1207 + u32 size;
1208 +
1209 + void *priv;
1210 +};
1211 +#endif
1212 +
1213 struct ssb_mipscore {
1214 struct ssb_device *dev;
1215
1216 @@ -27,6 +39,9 @@ struct ssb_mipscore {
1217 struct ssb_serial_port serial_ports[4];
1218
1219 struct ssb_pflash pflash;
1220 +#ifdef CONFIG_SSB_SFLASH
1221 + struct ssb_sflash sflash;
1222 +#endif
1223 };
1224
1225 extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
1226 --- a/include/linux/ssb/ssb_regs.h
1227 +++ b/include/linux/ssb/ssb_regs.h
1228 @@ -172,6 +172,7 @@
1229 #define SSB_SPROMSIZE_WORDS_R4 220
1230 #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
1231 #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
1232 +#define SSB_SPROMSIZE_WORDS_R10 230
1233 #define SSB_SPROM_BASE1 0x1000
1234 #define SSB_SPROM_BASE31 0x0800
1235 #define SSB_SPROM_REVISION 0x007E
1236 @@ -289,11 +290,11 @@
1237 #define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
1238 #define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
1239 #define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
1240 -#define SSB_SPROM4_ANTAVAIL 0x005D /* Antenna available bitfields */
1241 -#define SSB_SPROM4_ANTAVAIL_A 0x00FF /* A-PHY bitfield */
1242 -#define SSB_SPROM4_ANTAVAIL_A_SHIFT 0
1243 -#define SSB_SPROM4_ANTAVAIL_BG 0xFF00 /* B-PHY and G-PHY bitfield */
1244 -#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 8
1245 +#define SSB_SPROM4_ANTAVAIL 0x005C /* Antenna available bitfields */
1246 +#define SSB_SPROM4_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
1247 +#define SSB_SPROM4_ANTAVAIL_BG_SHIFT 0
1248 +#define SSB_SPROM4_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
1249 +#define SSB_SPROM4_ANTAVAIL_A_SHIFT 8
1250 #define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
1251 #define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
1252 #define SSB_SPROM4_AGAIN0_SHIFT 0
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