1 From a43b844cb40bf1b783055fdc81b7f991e21e7e76 Mon Sep 17 00:00:00 2001
2 From: Chuanhong Guo <gch981213@gmail.com>
3 Date: Wed, 13 Apr 2022 11:58:17 +0800
4 Subject: [PATCH] mtd: spinand: add support for ESMT F50x1G41LB
6 This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
7 It seems that ESMT likes to use random JEDEC ID from other vendors.
8 Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
9 Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
10 JEDEC ID in variable name.
13 https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
14 https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
16 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
18 drivers/mtd/nand/spi/Makefile | 2 +-
19 drivers/mtd/nand/spi/core.c | 1 +
20 drivers/mtd/nand/spi/esmt.c | 89 +++++++++++++++++++++++++++++++++++
21 include/linux/mtd/spinand.h | 1 +
22 4 files changed, 92 insertions(+), 1 deletion(-)
23 create mode 100644 drivers/mtd/nand/spi/esmt.c
25 --- a/drivers/mtd/nand/spi/Makefile
26 +++ b/drivers/mtd/nand/spi/Makefile
28 # SPDX-License-Identifier: GPL-2.0
29 -spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
30 +spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
31 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
32 --- a/drivers/mtd/nand/spi/core.c
33 +++ b/drivers/mtd/nand/spi/core.c
34 @@ -896,6 +896,7 @@ static const struct nand_ops spinand_ops
37 static const struct spinand_manufacturer *spinand_manufacturers[] = {
38 + &esmt_c8_spinand_manufacturer,
39 &gigadevice_spinand_manufacturer,
40 ¯onix_spinand_manufacturer,
41 µn_spinand_manufacturer,
43 +++ b/drivers/mtd/nand/spi/esmt.c
45 +// SPDX-License-Identifier: GPL-2.0
48 + * Chuanhong Guo <gch981213@gmail.com>
51 +#include <linux/device.h>
52 +#include <linux/kernel.h>
53 +#include <linux/mtd/spinand.h>
55 +/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
56 +#define SPINAND_MFR_ESMT_C8 0xc8
58 +static SPINAND_OP_VARIANTS(read_cache_variants,
59 + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
60 + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
61 + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
62 + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
63 + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
64 + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
66 +static SPINAND_OP_VARIANTS(write_cache_variants,
67 + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
68 + SPINAND_PROG_LOAD(true, 0, NULL, 0));
70 +static SPINAND_OP_VARIANTS(update_cache_variants,
71 + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
72 + SPINAND_PROG_LOAD(false, 0, NULL, 0));
74 +static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
75 + struct mtd_oob_region *region)
80 + region->offset = 16 * section + 8;
86 +static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
87 + struct mtd_oob_region *region)
92 + region->offset = 16 * section + 2;
98 +static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
99 + .ecc = f50l1g41lb_ooblayout_ecc,
100 + .free = f50l1g41lb_ooblayout_free,
103 +static const struct spinand_info esmt_c8_spinand_table[] = {
104 + SPINAND_INFO("F50L1G41LB",
105 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
106 + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
107 + NAND_ECCREQ(1, 512),
108 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
109 + &write_cache_variants,
110 + &update_cache_variants),
112 + SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
113 + SPINAND_INFO("F50D1G41LB",
114 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
115 + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
116 + NAND_ECCREQ(1, 512),
117 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
118 + &write_cache_variants,
119 + &update_cache_variants),
121 + SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
124 +static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
127 +const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
128 + .id = SPINAND_MFR_ESMT_C8,
130 + .chips = esmt_c8_spinand_table,
131 + .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
132 + .ops = &esmt_spinand_manuf_ops,
134 --- a/include/linux/mtd/spinand.h
135 +++ b/include/linux/mtd/spinand.h
136 @@ -260,6 +260,7 @@ struct spinand_manufacturer {
139 /* SPI NAND manufacturers */
140 +extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
141 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
142 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
143 extern const struct spinand_manufacturer micron_spinand_manufacturer;