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17 modify this File in accordance with the terms and conditions of the General
18 Public License Version 2, June 1991 (the "GPL License"), a copy of which is
19 available along with the File in the license.txt file or by writing to the Free
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27 *******************************************************************************/
28 #ifndef __mvCpuCntrs_h__
29 #define __mvCpuCntrs_h__
35 #define MV_CPU_CNTRS_NUM 4
36 #define MV_CPU_CNTRS_OPS_NUM 32
40 MV_CPU_CNTRS_INVALID
= 0,
42 MV_CPU_CNTRS_ICACHE_READ_MISS
,
43 MV_CPU_CNTRS_DCACHE_ACCESS
,
44 MV_CPU_CNTRS_DCACHE_READ_MISS
,
45 MV_CPU_CNTRS_DCACHE_READ_HIT
,
46 MV_CPU_CNTRS_DCACHE_WRITE_MISS
,
47 MV_CPU_CNTRS_DCACHE_WRITE_HIT
,
48 MV_CPU_CNTRS_DTLB_MISS
,
49 MV_CPU_CNTRS_TLB_MISS
,
50 MV_CPU_CNTRS_ITLB_MISS
,
51 MV_CPU_CNTRS_INSTRUCTIONS
,
52 MV_CPU_CNTRS_SINGLE_ISSUE
,
53 MV_CPU_CNTRS_MMU_READ_LATENCY
,
54 MV_CPU_CNTRS_MMU_READ_BEAT
,
55 MV_CPU_CNTRS_BRANCH_RETIRED
,
56 MV_CPU_CNTRS_BRANCH_TAKEN
,
57 MV_CPU_CNTRS_BRANCH_PREDICT_MISS
,
58 MV_CPU_CNTRS_BRANCH_PREDICT_COUNT
,
59 MV_CPU_CNTRS_WB_FULL_CYCLES
,
60 MV_CPU_CNTRS_WB_WRITE_LATENCY
,
61 MV_CPU_CNTRS_WB_WRITE_BEAT
,
62 MV_CPU_CNTRS_ICACHE_READ_LATENCY
,
63 MV_CPU_CNTRS_ICACHE_READ_BEAT
,
64 MV_CPU_CNTRS_DCACHE_READ_LATENCY
,
65 MV_CPU_CNTRS_DCACHE_READ_BEAT
,
66 MV_CPU_CNTRS_DCACHE_WRITE_LATENCY
,
67 MV_CPU_CNTRS_DCACHE_WRITE_BEAT
,
68 MV_CPU_CNTRS_LDM_STM_HOLD
,
70 MV_CPU_CNTRS_DATA_WRITE_ACCESS
,
71 MV_CPU_CNTRS_DATA_READ_ACCESS
,
72 MV_CPU_CNTRS_BIU_SIMULT_ACCESS
,
73 MV_CPU_CNTRS_BIU_ANY_ACCESS
,
80 MV_CPU_CNTRS_OPS operation
;
90 MV_U32 num_of_measurements
;
91 MV_U32 avg_sample_count
;
92 MV_U64 counters_before
[MV_CPU_CNTRS_NUM
];
93 MV_U64 counters_after
[MV_CPU_CNTRS_NUM
];
94 MV_U64 counters_sum
[MV_CPU_CNTRS_NUM
];
98 extern MV_CPU_CNTRS_ENTRY mvCpuCntrsTbl
[MV_CPU_CNTRS_NUM
];
101 MV_STATUS
mvCpuCntrsProgram(int counter
, MV_CPU_CNTRS_OPS op
,
102 char* name
, MV_U32 overhead
);
103 void mvCpuCntrsInit(void);
104 MV_CPU_CNTRS_EVENT
* mvCpuCntrsEventCreate(char* name
, MV_U32 print_threshold
);
105 void mvCpuCntrsEventDelete(MV_CPU_CNTRS_EVENT
* event
);
106 void mvCpuCntrsReset(void);
107 void mvCpuCntrsShow(MV_CPU_CNTRS_EVENT
* pEvent
);
108 void mvCpuCntrsEventClear(MV_CPU_CNTRS_EVENT
* pEvent
);
111 void program_counter(int counter
, int op
);
113 static INLINE MV_U64
mvCpuCntrsRead(const int counter
)
115 MV_U32 low
= 0, high
= 0;
121 MV_ASM ("mcr p15, 0, %0, c15, c12, 0" : : "r" (ll
));
122 MV_ASM ("mrc p15, 0, %0, c15, c13, 0" : "=r" (low
));
123 MV_ASM ("mrc p15, 0, %0, c15, c13, 1" : "=r" (high
));
127 MV_ASM ("mcr p15, 0, %0, c15, c12, 1" : : "r" (ll
));
128 MV_ASM ("mrc p15, 0, %0, c15, c13, 2" : "=r" (low
));
129 MV_ASM ("mrc p15, 0, %0, c15, c13, 3" : "=r" (high
));
133 MV_ASM ("mcr p15, 0, %0, c15, c12, 2" : : "r" (ll
));
134 MV_ASM ("mrc p15, 0, %0, c15, c13, 4" : "=r" (low
));
135 MV_ASM ("mrc p15, 0, %0, c15, c13, 5" : "=r" (high
));
139 MV_ASM ("mcr p15, 0, %0, c15, c12, 3" : : "r" (ll
));
140 MV_ASM ("mrc p15, 0, %0, c15, c13, 6" : "=r" (low
));
141 MV_ASM ("mrc p15, 0, %0, c15, c13, 7" : "=r" (high
));
145 mvOsPrintf("mv_cpu_cntrs_read: bad counter number (%d)\n", counter
);
147 program_counter(counter
, mvCpuCntrsTbl
[counter
].opIdx
);
148 return (((MV_U64
)high
<< 32 ) | low
);
153 static INLINE
void mvCpuCntrsReadBefore(MV_CPU_CNTRS_EVENT
* pEvent
)
158 /* order is important - we want to measure the cycle count last here! */
159 for(i
=0; i
<MV_CPU_CNTRS_NUM
; i
++)
160 pEvent
->counters_before
[i
] = mvCpuCntrsRead(i
);
162 pEvent
->counters_before
[1] = mvCpuCntrsRead(1);
163 pEvent
->counters_before
[3] = mvCpuCntrsRead(3);
164 pEvent
->counters_before
[0] = mvCpuCntrsRead(0);
165 pEvent
->counters_before
[2] = mvCpuCntrsRead(2);
169 static INLINE
void mvCpuCntrsReadAfter(MV_CPU_CNTRS_EVENT
* pEvent
)
174 /* order is important - we want to measure the cycle count first here! */
175 for(i
=0; i
<MV_CPU_CNTRS_NUM
; i
++)
176 pEvent
->counters_after
[i
] = mvCpuCntrsRead(i
);
178 pEvent
->counters_after
[2] = mvCpuCntrsRead(2);
179 pEvent
->counters_after
[0] = mvCpuCntrsRead(0);
180 pEvent
->counters_after
[3] = mvCpuCntrsRead(3);
181 pEvent
->counters_after
[1] = mvCpuCntrsRead(1);
184 for(i
=0; i
<MV_CPU_CNTRS_NUM
; i
++)
186 pEvent
->counters_sum
[i
] += (pEvent
->counters_after
[i
] - pEvent
->counters_before
[i
]);
188 pEvent
->num_of_measurements
++;
192 #ifdef CONFIG_MV_CPU_PERF_CNTRS
194 #define MV_CPU_CNTRS_READ(counter) mvCpuCntrsRead(counter)
196 #define MV_CPU_CNTRS_START(event) mvCpuCntrsReadBefore(event)
198 #define MV_CPU_CNTRS_STOP(event) mvCpuCntrsReadAfter(event)
200 #define MV_CPU_CNTRS_SHOW(event) mvCpuCntrsShow(event)
204 #define MV_CPU_CNTRS_READ(counter)
205 #define MV_CPU_CNTRS_START(event)
206 #define MV_CPU_CNTRS_STOP(event)
207 #define MV_CPU_CNTRS_SHOW(event)
209 #endif /* CONFIG_MV_CPU_PERF_CNTRS */
212 #endif /* __mvCpuCntrs_h__ */