2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 * Copyright (C) 2010 Ralph Hempel <ralph.hempel@lantiq.com>
17 * Copyright (C) 2009 Mohammad Firdaus / Infineon Technologies
21 \defgroup IFX_DEU IFX_DEU_DRIVERS
23 \brief deu driver module
27 \file ifxmips_deu_danube.h
28 \brief board specific driver header file for danube
32 \defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
34 \brief board specific deu header files
37 #ifndef IFXMIPS_DEU_DANUBE_H
38 #define IFXMIPS_DEU_DANUBE_H
40 #ifdef CONFIG_CRYPTO_DEV_DMA
41 #define DEU_DWORD_REORDERING(ptr, buffer, in_out, bytes) memory_alignment(ptr, buffer, in_out, bytes)
42 #define AES_MEMORY_COPY(outcopy, out_dma, out_arg, nbytes) aes_dma_memory_copy(outcopy, out_dma, out_arg, nbytes)
43 #define DES_MEMORY_COPY(outcopy, out_dma, out_arg, nbytes) des_dma_memory_copy(outcopy, out_dma, out_arg, nbytes)
46 #define DELAY_PERIOD 9
49 #define FREE_MEMORY(buff) memory_release(buff)
50 #define ALLOCATE_MEMORY(val, type) type ? aes_memory_allocate(val) : des_memory_allocate(val)
51 #endif /* CONFIG_CRYPTO_DEV_DMA */
53 #define INPUT_ENDIAN_SWAP(input) input_swap(input)
54 #define DEU_ENDIAN_SWAP(input) endian_swap(input)
55 #define AES_DMA_MISC_CONFIG()
57 #define WAIT_AES_DMA_READY() \
60 volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
61 volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
62 for (i = 0; i < 10; i++) \
63 udelay(DELAY_PERIOD); \
64 while (dma->controlr.BSY) {}; \
65 while (aes->controlr.BUS) {}; \
68 #define WAIT_DES_DMA_READY() \
71 volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
72 volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
73 for (i = 0; i < 10; i++) \
74 udelay(DELAY_PERIOD); \
75 while (dma->controlr.BSY) {}; \
76 while (des->controlr.BUS) {}; \
79 #define SHA_HASH_INIT \
81 volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
82 hash->controlr.SM = 1; \
83 hash->controlr.ALGO = 0; \
84 hash->controlr.INIT = 1; \
89 struct clc_controlr_t
{
101 struct des_controlr
{
135 struct aes_controlr
{
182 struct hash_controlr
{
217 struct dma_controlr
{
230 #endif /* IFXMIPS_DEU_DANUBE_H */