1 From: Richard Zhu <r65037@freescale.com>
2 Subject: [PATCH] ARM: dtsi: enable ahci sata on imx6q platforms
4 Only imx6q has the ahci sata controller, enable
7 Signed-off-by: Richard Zhu <r65037@freescale.com>
8 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
10 arch/arm/boot/dts/imx6q-sabreauto.dts | 4 ++++
11 arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++++
12 arch/arm/boot/dts/imx6q-sabresd.dts | 4 ++++
13 arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++
14 4 files changed, 21 insertions(+)
16 --- a/arch/arm/boot/dts/imx6q-sabreauto.dts
17 +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
26 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts
27 +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
37 fsl,spi-num-chipselects = <1>;
38 cs-gpios = <&gpio3 19 0>;
39 --- a/arch/arm/boot/dts/imx6q-sabresd.dts
40 +++ b/arch/arm/boot/dts/imx6q-sabresd.dts
49 --- a/arch/arm/boot/dts/imx6q.dtsi
50 +++ b/arch/arm/boot/dts/imx6q.dtsi
55 + sata: sata@02200000 {
56 + compatible = "fsl,imx6q-ahci";
57 + reg = <0x02200000 0x4000>;
58 + interrupts = <0 39 0x04>;
59 + clocks = <&clks 154>, <&clks 187>, <&clks 105>;
60 + clock-names = "sata", "sata_ref", "ahb";
61 + status = "disabled";
66 compatible = "fsl,imx6q-ipu";