1 From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001
2 From: Tim Harvey <tharvey@gateworks.com>
3 Date: Fri, 7 Feb 2014 15:24:56 +0800
4 Subject: [PATCH] ARM: dts: add Gateworks Ventana support
6 The Gateworks Ventana product family consists of several baseboard designs
7 based on the Freescale i.MX6 family of processors. Each baseboard has a
8 different set of possible features.
10 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
11 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
13 arch/arm/boot/dts/Makefile | 9 +
14 arch/arm/boot/dts/imx6dl-gw51xx.dts | 19 ++
15 arch/arm/boot/dts/imx6dl-gw52xx.dts | 19 ++
16 arch/arm/boot/dts/imx6dl-gw53xx.dts | 19 ++
17 arch/arm/boot/dts/imx6dl-gw54xx.dts | 19 ++
18 arch/arm/boot/dts/imx6q-gw51xx.dts | 19 ++
19 arch/arm/boot/dts/imx6q-gw52xx.dts | 23 ++
20 arch/arm/boot/dts/imx6q-gw53xx.dts | 23 ++
21 arch/arm/boot/dts/imx6q-gw5400-a.dts | 546 ++++++++++++++++++++++++++++++++
22 arch/arm/boot/dts/imx6q-gw54xx.dts | 23 ++
23 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++
24 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++
25 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++
26 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++
27 14 files changed, 2716 insertions(+)
28 create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
29 create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
30 create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
31 create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
32 create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
33 create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
34 create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
35 create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
36 create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
37 create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
38 create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
39 create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
40 create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
42 --- a/arch/arm/boot/dts/Makefile
43 +++ b/arch/arm/boot/dts/Makefile
44 @@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
52 imx6dl-hummingboard.dtb \
53 imx6dl-sabreauto.dtb \
55 imx6dl-wandboard.dtb \
61 + imx6q-gw5400-a.dtb \
63 imx6q-phytec-pbab01.dtb \
67 +++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
70 + * Copyright 2013 Gateworks Corporation
72 + * The code contained herein is licensed under the GNU General Public
73 + * License. You may obtain a copy of the GNU General Public License
74 + * Version 2 or later at the following locations:
76 + * http://www.opensource.org/licenses/gpl-license.html
77 + * http://www.gnu.org/copyleft/gpl.html
81 +#include "imx6dl.dtsi"
82 +#include "imx6qdl-gw51xx.dtsi"
85 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX";
86 + compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
89 +++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
92 + * Copyright 2013 Gateworks Corporation
94 + * The code contained herein is licensed under the GNU General Public
95 + * License. You may obtain a copy of the GNU General Public License
96 + * Version 2 or later at the following locations:
98 + * http://www.opensource.org/licenses/gpl-license.html
99 + * http://www.gnu.org/copyleft/gpl.html
103 +#include "imx6dl.dtsi"
104 +#include "imx6qdl-gw52xx.dtsi"
107 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX";
108 + compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
111 +++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
114 + * Copyright 2013 Gateworks Corporation
116 + * The code contained herein is licensed under the GNU General Public
117 + * License. You may obtain a copy of the GNU General Public License
118 + * Version 2 or later at the following locations:
120 + * http://www.opensource.org/licenses/gpl-license.html
121 + * http://www.gnu.org/copyleft/gpl.html
125 +#include "imx6dl.dtsi"
126 +#include "imx6qdl-gw53xx.dtsi"
129 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
130 + compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
133 +++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
136 + * Copyright 2013 Gateworks Corporation
138 + * The code contained herein is licensed under the GNU General Public
139 + * License. You may obtain a copy of the GNU General Public License
140 + * Version 2 or later at the following locations:
142 + * http://www.opensource.org/licenses/gpl-license.html
143 + * http://www.gnu.org/copyleft/gpl.html
147 +#include "imx6dl.dtsi"
148 +#include "imx6qdl-gw54xx.dtsi"
151 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
152 + compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
155 +++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
158 + * Copyright 2013 Gateworks Corporation
160 + * The code contained herein is licensed under the GNU General Public
161 + * License. You may obtain a copy of the GNU General Public License
162 + * Version 2 or later at the following locations:
164 + * http://www.opensource.org/licenses/gpl-license.html
165 + * http://www.gnu.org/copyleft/gpl.html
169 +#include "imx6q.dtsi"
170 +#include "imx6qdl-gw51xx.dtsi"
173 + model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX";
174 + compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
177 +++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
180 + * Copyright 2013 Gateworks Corporation
182 + * The code contained herein is licensed under the GNU General Public
183 + * License. You may obtain a copy of the GNU General Public License
184 + * Version 2 or later at the following locations:
186 + * http://www.opensource.org/licenses/gpl-license.html
187 + * http://www.gnu.org/copyleft/gpl.html
191 +#include "imx6q.dtsi"
192 +#include "imx6qdl-gw52xx.dtsi"
195 + model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX";
196 + compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
203 +++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
206 + * Copyright 2013 Gateworks Corporation
208 + * The code contained herein is licensed under the GNU General Public
209 + * License. You may obtain a copy of the GNU General Public License
210 + * Version 2 or later at the following locations:
212 + * http://www.opensource.org/licenses/gpl-license.html
213 + * http://www.gnu.org/copyleft/gpl.html
217 +#include "imx6q.dtsi"
218 +#include "imx6qdl-gw53xx.dtsi"
221 + model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX";
222 + compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
229 +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
232 + * Copyright 2013 Gateworks Corporation
234 + * The code contained herein is licensed under the GNU General Public
235 + * License. You may obtain a copy of the GNU General Public License
236 + * Version 2 or later at the following locations:
238 + * http://www.opensource.org/licenses/gpl-license.html
239 + * http://www.gnu.org/copyleft/gpl.html
243 +#include "imx6q.dtsi"
246 + model = "Gateworks Ventana GW5400-A";
247 + compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
249 + /* these are used by bootloader for disabling nodes */
268 + bootargs = "console=ttymxc1,115200";
272 + compatible = "gpio-leds";
276 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
277 + default-state = "on";
278 + linux,default-trigger = "heartbeat";
283 + gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
284 + default-state = "off";
289 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
290 + default-state = "off";
295 + reg = <0x10000000 0x40000000>;
299 + compatible = "pps-gpio";
300 + gpios = <&gpio1 5 0>;
305 + compatible = "simple-bus";
306 + #address-cells = <1>;
309 + reg_1p0v: regulator@0 {
310 + compatible = "regulator-fixed";
312 + regulator-name = "1P0V";
313 + regulator-min-microvolt = <1000000>;
314 + regulator-max-microvolt = <1000000>;
315 + regulator-always-on;
318 + reg_3p3v: regulator@1 {
319 + compatible = "regulator-fixed";
321 + regulator-name = "3P3V";
322 + regulator-min-microvolt = <3300000>;
323 + regulator-max-microvolt = <3300000>;
324 + regulator-always-on;
327 + reg_usb_h1_vbus: regulator@2 {
328 + compatible = "regulator-fixed";
330 + regulator-name = "usb_h1_vbus";
331 + regulator-min-microvolt = <5000000>;
332 + regulator-max-microvolt = <5000000>;
333 + regulator-always-on;
336 + reg_usb_otg_vbus: regulator@3 {
337 + compatible = "regulator-fixed";
339 + regulator-name = "usb_otg_vbus";
340 + regulator-min-microvolt = <5000000>;
341 + regulator-max-microvolt = <5000000>;
342 + gpio = <&gpio3 22 0>;
343 + enable-active-high;
348 + compatible = "fsl,imx6q-ventana-sgtl5000",
349 + "fsl,imx-audio-sgtl5000";
350 + model = "sgtl5000-audio";
351 + ssi-controller = <&ssi1>;
352 + audio-codec = <&codec>;
354 + "MIC_IN", "Mic Jack",
355 + "Mic Jack", "Mic Bias",
356 + "Headphone Jack", "HP_OUT";
357 + mux-int-port = <1>;
358 + mux-ext-port = <4>;
363 + pinctrl-names = "default";
364 + pinctrl-0 = <&pinctrl_audmux>;
369 + fsl,spi-num-chipselects = <1>;
370 + cs-gpios = <&gpio3 19 0>;
371 + pinctrl-names = "default";
372 + pinctrl-0 = <&pinctrl_ecspi1>;
376 + compatible = "sst,w25q256";
377 + spi-max-frequency = <30000000>;
383 + pinctrl-names = "default";
384 + pinctrl-0 = <&pinctrl_enet>;
385 + phy-mode = "rgmii";
386 + phy-reset-gpios = <&gpio1 30 0>;
391 + clock-frequency = <100000>;
392 + pinctrl-names = "default";
393 + pinctrl-0 = <&pinctrl_i2c1>;
396 + eeprom1: eeprom@50 {
397 + compatible = "atmel,24c02";
402 + eeprom2: eeprom@51 {
403 + compatible = "atmel,24c02";
408 + eeprom3: eeprom@52 {
409 + compatible = "atmel,24c02";
414 + eeprom4: eeprom@53 {
415 + compatible = "atmel,24c02";
421 + compatible = "nxp,pca9555";
428 + compatible = "gw,gsp";
433 + compatible = "dallas,ds1672";
439 + clock-frequency = <100000>;
440 + pinctrl-names = "default";
441 + pinctrl-0 = <&pinctrl_i2c2>;
444 + pmic: pfuze100@08 {
445 + compatible = "fsl,pfuze100";
450 + regulator-min-microvolt = <300000>;
451 + regulator-max-microvolt = <1875000>;
453 + regulator-always-on;
454 + regulator-ramp-delay = <6250>;
458 + regulator-min-microvolt = <300000>;
459 + regulator-max-microvolt = <1875000>;
461 + regulator-always-on;
462 + regulator-ramp-delay = <6250>;
466 + regulator-min-microvolt = <800000>;
467 + regulator-max-microvolt = <3950000>;
469 + regulator-always-on;
473 + regulator-min-microvolt = <400000>;
474 + regulator-max-microvolt = <1975000>;
476 + regulator-always-on;
480 + regulator-min-microvolt = <400000>;
481 + regulator-max-microvolt = <1975000>;
483 + regulator-always-on;
487 + regulator-min-microvolt = <800000>;
488 + regulator-max-microvolt = <3300000>;
492 + regulator-min-microvolt = <5000000>;
493 + regulator-max-microvolt = <5150000>;
497 + regulator-min-microvolt = <1000000>;
498 + regulator-max-microvolt = <3000000>;
500 + regulator-always-on;
503 + vref_reg: vrefddr {
505 + regulator-always-on;
509 + regulator-min-microvolt = <800000>;
510 + regulator-max-microvolt = <1550000>;
514 + regulator-min-microvolt = <800000>;
515 + regulator-max-microvolt = <1550000>;
519 + regulator-min-microvolt = <1800000>;
520 + regulator-max-microvolt = <3300000>;
524 + regulator-min-microvolt = <1800000>;
525 + regulator-max-microvolt = <3300000>;
526 + regulator-always-on;
530 + regulator-min-microvolt = <1800000>;
531 + regulator-max-microvolt = <3300000>;
532 + regulator-always-on;
536 + regulator-min-microvolt = <1800000>;
537 + regulator-max-microvolt = <3300000>;
538 + regulator-always-on;
543 + pciswitch: pex8609@3f {
544 + compatible = "plx,pex8609";
548 + pciclkgen: si52147@6b {
549 + compatible = "sil,si52147";
555 + clock-frequency = <100000>;
556 + pinctrl-names = "default";
557 + pinctrl-0 = <&pinctrl_i2c3>;
560 + accelerometer: mma8450@1c {
561 + compatible = "fsl,mma8450";
565 + codec: sgtl5000@0a {
566 + compatible = "fsl,sgtl5000";
568 + clocks = <&clks 201>;
569 + VDDA-supply = <&sw4_reg>;
570 + VDDIO-supply = <®_3p3v>;
573 + hdmiin: adv7611@4c {
574 + compatible = "adi,adv7611";
578 + touchscreen: egalax_ts@04 {
579 + compatible = "eeti,egalax_ts";
581 + interrupt-parent = <&gpio7>;
582 + interrupts = <12 2>; /* gpio7_12 active low */
583 + wakeup-gpios = <&gpio7 12 0>;
586 + videoout: adv7393@2a {
587 + compatible = "adi,adv7393";
591 + videoin: adv7180@20 {
592 + compatible = "adi,adv7180";
598 + pinctrl-names = "default";
599 + pinctrl-0 = <&pinctrl_hog>;
602 + pinctrl_hog: hoggrp {
604 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
605 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
606 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
607 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
608 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
609 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
610 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
611 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
612 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
613 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
614 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
615 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
619 + pinctrl_audmux: audmuxgrp {
621 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
622 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
623 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
624 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
628 + pinctrl_ecspi1: ecspi1grp {
630 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
631 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
632 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
636 + pinctrl_enet: enetgrp {
638 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
639 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
640 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
641 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
642 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
643 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
644 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
645 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
646 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
647 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
648 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
649 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
650 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
651 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
652 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
653 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
657 + pinctrl_i2c1: i2c1grp {
659 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
660 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
664 + pinctrl_i2c2: i2c2grp {
666 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
667 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
671 + pinctrl_i2c3: i2c3grp {
673 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
674 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
678 + pinctrl_uart1: uart1grp {
680 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
681 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
685 + pinctrl_uart2: uart2grp {
687 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
688 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
692 + pinctrl_uart5: uart5grp {
694 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
695 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
699 + pinctrl_usbotg: usbotggrp {
701 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
705 + pinctrl_usdhc3: usdhc3grp {
707 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
708 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
709 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
710 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
711 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
712 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
723 + reset-gpio = <&gpio1 29 0>;
726 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
727 + compatible = "marvell,sky2";
732 + fsl,mode = "i2s-slave";
737 + pinctrl-names = "default";
738 + pinctrl-0 = <&pinctrl_uart1>;
743 + pinctrl-names = "default";
744 + pinctrl-0 = <&pinctrl_uart2>;
749 + pinctrl-names = "default";
750 + pinctrl-0 = <&pinctrl_uart5>;
755 + vbus-supply = <®_usb_otg_vbus>;
756 + pinctrl-names = "default";
757 + pinctrl-0 = <&pinctrl_usbotg>;
758 + disable-over-current;
763 + vbus-supply = <®_usb_h1_vbus>;
768 + pinctrl-names = "default";
769 + pinctrl-0 = <&pinctrl_usdhc3>;
770 + cd-gpios = <&gpio7 0 0>;
771 + vmmc-supply = <®_3p3v>;
775 +++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
778 + * Copyright 2013 Gateworks Corporation
780 + * The code contained herein is licensed under the GNU General Public
781 + * License. You may obtain a copy of the GNU General Public License
782 + * Version 2 or later at the following locations:
784 + * http://www.opensource.org/licenses/gpl-license.html
785 + * http://www.gnu.org/copyleft/gpl.html
789 +#include "imx6q.dtsi"
790 +#include "imx6qdl-gw54xx.dtsi"
793 + model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
794 + compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
801 +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
804 + * Copyright 2013 Gateworks Corporation
806 + * The code contained herein is licensed under the GNU General Public
807 + * License. You may obtain a copy of the GNU General Public License
808 + * Version 2 or later at the following locations:
810 + * http://www.opensource.org/licenses/gpl-license.html
811 + * http://www.gnu.org/copyleft/gpl.html
815 + /* these are used by bootloader for disabling nodes */
827 + bootargs = "console=ttymxc1,115200";
831 + compatible = "gpio-leds";
835 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
836 + default-state = "on";
837 + linux,default-trigger = "heartbeat";
842 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
843 + default-state = "off";
848 + reg = <0x10000000 0x20000000>;
852 + compatible = "pps-gpio";
853 + gpios = <&gpio1 26 0>;
858 + compatible = "simple-bus";
859 + #address-cells = <1>;
862 + reg_3p3v: regulator@0 {
863 + compatible = "regulator-fixed";
865 + regulator-name = "3P3V";
866 + regulator-min-microvolt = <3300000>;
867 + regulator-max-microvolt = <3300000>;
868 + regulator-always-on;
871 + reg_5p0v: regulator@1 {
872 + compatible = "regulator-fixed";
874 + regulator-name = "5P0V";
875 + regulator-min-microvolt = <5000000>;
876 + regulator-max-microvolt = <5000000>;
877 + regulator-always-on;
880 + reg_usb_otg_vbus: regulator@2 {
881 + compatible = "regulator-fixed";
883 + regulator-name = "usb_otg_vbus";
884 + regulator-min-microvolt = <5000000>;
885 + regulator-max-microvolt = <5000000>;
886 + gpio = <&gpio3 22 0>;
887 + enable-active-high;
893 + pinctrl-names = "default";
894 + pinctrl-0 = <&pinctrl_enet>;
895 + phy-mode = "rgmii";
896 + phy-reset-gpios = <&gpio1 30 0>;
901 + pinctrl-names = "default";
902 + pinctrl-0 = <&pinctrl_gpmi_nand>;
907 + clock-frequency = <100000>;
908 + pinctrl-names = "default";
909 + pinctrl-0 = <&pinctrl_i2c1>;
912 + eeprom1: eeprom@50 {
913 + compatible = "atmel,24c02";
918 + eeprom2: eeprom@51 {
919 + compatible = "atmel,24c02";
924 + eeprom3: eeprom@52 {
925 + compatible = "atmel,24c02";
930 + eeprom4: eeprom@53 {
931 + compatible = "atmel,24c02";
937 + compatible = "nxp,pca9555";
944 + compatible = "gw,gsp";
949 + compatible = "dallas,ds1672";
955 + clock-frequency = <100000>;
956 + pinctrl-names = "default";
957 + pinctrl-0 = <&pinctrl_i2c2>;
961 + compatible = "ltc,ltc3676";
965 + sw1_reg: ltc3676__sw1 {
966 + regulator-min-microvolt = <1175000>;
967 + regulator-max-microvolt = <1175000>;
969 + regulator-always-on;
972 + sw2_reg: ltc3676__sw2 {
973 + regulator-min-microvolt = <1800000>;
974 + regulator-max-microvolt = <1800000>;
976 + regulator-always-on;
979 + sw3_reg: ltc3676__sw3 {
980 + regulator-min-microvolt = <1175000>;
981 + regulator-max-microvolt = <1175000>;
983 + regulator-always-on;
986 + sw4_reg: ltc3676__sw4 {
987 + regulator-min-microvolt = <1500000>;
988 + regulator-max-microvolt = <1500000>;
990 + regulator-always-on;
993 + ldo2_reg: ltc3676__ldo2 {
994 + regulator-min-microvolt = <2500000>;
995 + regulator-max-microvolt = <2500000>;
997 + regulator-always-on;
1000 + ldo4_reg: ltc3676__ldo4 {
1001 + regulator-min-microvolt = <3000000>;
1002 + regulator-max-microvolt = <3000000>;
1009 + clock-frequency = <100000>;
1010 + pinctrl-names = "default";
1011 + pinctrl-0 = <&pinctrl_i2c3>;
1014 + videoin: adv7180@20 {
1015 + compatible = "adi,adv7180";
1021 + pinctrl-names = "default";
1022 + pinctrl-0 = <&pinctrl_hog>;
1025 + pinctrl_hog: hoggrp {
1027 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1028 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1029 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1030 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1031 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1032 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
1033 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1034 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1038 + pinctrl_enet: enetgrp {
1040 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1041 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1042 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1043 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1044 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1045 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1046 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1047 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1048 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1049 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1050 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1051 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1052 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1053 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1054 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1055 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1059 + pinctrl_gpmi_nand: gpminandgrp {
1061 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1062 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1063 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1064 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1065 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1066 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1067 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1068 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1069 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1070 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1071 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1072 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1073 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1074 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1075 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1076 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1080 + pinctrl_i2c1: i2c1grp {
1082 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1083 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1087 + pinctrl_i2c2: i2c2grp {
1089 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1090 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1094 + pinctrl_i2c3: i2c3grp {
1096 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1097 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1101 + pinctrl_uart1: uart1grp {
1103 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1104 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1108 + pinctrl_uart2: uart2grp {
1110 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1111 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1115 + pinctrl_uart3: uart3grp {
1117 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
1118 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
1122 + pinctrl_uart5: uart5grp {
1124 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1125 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1129 + pinctrl_usbotg: usbotggrp {
1131 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1138 + reset-gpio = <&gpio1 0 0>;
1143 + pinctrl-names = "default";
1144 + pinctrl-0 = <&pinctrl_uart1>;
1149 + pinctrl-names = "default";
1150 + pinctrl-0 = <&pinctrl_uart2>;
1155 + pinctrl-names = "default";
1156 + pinctrl-0 = <&pinctrl_uart3>;
1161 + pinctrl-names = "default";
1162 + pinctrl-0 = <&pinctrl_uart5>;
1167 + vbus-supply = <®_usb_otg_vbus>;
1168 + pinctrl-names = "default";
1169 + pinctrl-0 = <&pinctrl_usbotg>;
1170 + disable-over-current;
1178 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
1181 + * Copyright 2013 Gateworks Corporation
1183 + * The code contained herein is licensed under the GNU General Public
1184 + * License. You may obtain a copy of the GNU General Public License
1185 + * Version 2 or later at the following locations:
1187 + * http://www.opensource.org/licenses/gpl-license.html
1188 + * http://www.gnu.org/copyleft/gpl.html
1192 + /* these are used by bootloader for disabling nodes */
1206 + bootargs = "console=ttymxc1,115200";
1210 + compatible = "pwm-backlight";
1211 + pwms = <&pwm4 0 5000000>;
1212 + brightness-levels = <0 4 8 16 32 64 128 255>;
1213 + default-brightness-level = <7>;
1218 + compatible = "gpio-leds";
1222 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1223 + default-state = "on";
1224 + linux,default-trigger = "heartbeat";
1229 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1230 + default-state = "off";
1235 + gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
1236 + default-state = "off";
1241 + reg = <0x10000000 0x20000000>;
1245 + compatible = "pps-gpio";
1246 + gpios = <&gpio1 26 0>;
1251 + compatible = "simple-bus";
1252 + #address-cells = <1>;
1253 + #size-cells = <0>;
1255 + reg_1p0v: regulator@0 {
1256 + compatible = "regulator-fixed";
1258 + regulator-name = "1P0V";
1259 + regulator-min-microvolt = <1000000>;
1260 + regulator-max-microvolt = <1000000>;
1261 + regulator-always-on;
1264 + /* remove this fixed regulator once ltc3676__sw2 driver available */
1265 + reg_1p8v: regulator@1 {
1266 + compatible = "regulator-fixed";
1268 + regulator-name = "1P8V";
1269 + regulator-min-microvolt = <1800000>;
1270 + regulator-max-microvolt = <1800000>;
1271 + regulator-always-on;
1274 + reg_3p3v: regulator@2 {
1275 + compatible = "regulator-fixed";
1277 + regulator-name = "3P3V";
1278 + regulator-min-microvolt = <3300000>;
1279 + regulator-max-microvolt = <3300000>;
1280 + regulator-always-on;
1283 + reg_5p0v: regulator@3 {
1284 + compatible = "regulator-fixed";
1286 + regulator-name = "5P0V";
1287 + regulator-min-microvolt = <5000000>;
1288 + regulator-max-microvolt = <5000000>;
1289 + regulator-always-on;
1292 + reg_usb_otg_vbus: regulator@4 {
1293 + compatible = "regulator-fixed";
1295 + regulator-name = "usb_otg_vbus";
1296 + regulator-min-microvolt = <5000000>;
1297 + regulator-max-microvolt = <5000000>;
1298 + gpio = <&gpio3 22 0>;
1299 + enable-active-high;
1304 + compatible = "fsl,imx6q-ventana-sgtl5000",
1305 + "fsl,imx-audio-sgtl5000";
1306 + model = "sgtl5000-audio";
1307 + ssi-controller = <&ssi1>;
1308 + audio-codec = <&codec>;
1310 + "MIC_IN", "Mic Jack",
1311 + "Mic Jack", "Mic Bias",
1312 + "Headphone Jack", "HP_OUT";
1313 + mux-int-port = <1>;
1314 + mux-ext-port = <4>;
1319 + pinctrl-names = "default";
1320 + pinctrl-0 = <&pinctrl_audmux>;
1325 + pinctrl-names = "default";
1326 + pinctrl-0 = <&pinctrl_enet>;
1327 + phy-mode = "rgmii";
1328 + phy-reset-gpios = <&gpio1 30 0>;
1333 + pinctrl-names = "default";
1334 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1339 + clock-frequency = <100000>;
1340 + pinctrl-names = "default";
1341 + pinctrl-0 = <&pinctrl_i2c1>;
1344 + eeprom1: eeprom@50 {
1345 + compatible = "atmel,24c02";
1350 + eeprom2: eeprom@51 {
1351 + compatible = "atmel,24c02";
1356 + eeprom3: eeprom@52 {
1357 + compatible = "atmel,24c02";
1362 + eeprom4: eeprom@53 {
1363 + compatible = "atmel,24c02";
1368 + gpio: pca9555@23 {
1369 + compatible = "nxp,pca9555";
1372 + #gpio-cells = <2>;
1376 + compatible = "gw,gsp";
1381 + compatible = "dallas,ds1672";
1387 + clock-frequency = <100000>;
1388 + pinctrl-names = "default";
1389 + pinctrl-0 = <&pinctrl_i2c2>;
1392 + pciswitch: pex8609@3f {
1393 + compatible = "plx,pex8609";
1397 + pmic: ltc3676@3c {
1398 + compatible = "ltc,ltc3676";
1402 + sw1_reg: ltc3676__sw1 {
1403 + regulator-min-microvolt = <1175000>;
1404 + regulator-max-microvolt = <1175000>;
1405 + regulator-boot-on;
1406 + regulator-always-on;
1409 + sw2_reg: ltc3676__sw2 {
1410 + regulator-min-microvolt = <1800000>;
1411 + regulator-max-microvolt = <1800000>;
1412 + regulator-boot-on;
1413 + regulator-always-on;
1416 + sw3_reg: ltc3676__sw3 {
1417 + regulator-min-microvolt = <1175000>;
1418 + regulator-max-microvolt = <1175000>;
1419 + regulator-boot-on;
1420 + regulator-always-on;
1423 + sw4_reg: ltc3676__sw4 {
1424 + regulator-min-microvolt = <1500000>;
1425 + regulator-max-microvolt = <1500000>;
1426 + regulator-boot-on;
1427 + regulator-always-on;
1430 + ldo2_reg: ltc3676__ldo2 {
1431 + regulator-min-microvolt = <2500000>;
1432 + regulator-max-microvolt = <2500000>;
1433 + regulator-boot-on;
1434 + regulator-always-on;
1437 + ldo3_reg: ltc3676__ldo3 {
1438 + regulator-min-microvolt = <1800000>;
1439 + regulator-max-microvolt = <1800000>;
1440 + regulator-boot-on;
1441 + regulator-always-on;
1444 + ldo4_reg: ltc3676__ldo4 {
1445 + regulator-min-microvolt = <3000000>;
1446 + regulator-max-microvolt = <3000000>;
1453 + clock-frequency = <100000>;
1454 + pinctrl-names = "default";
1455 + pinctrl-0 = <&pinctrl_i2c3>;
1458 + accelerometer: fxos8700@1e {
1459 + compatible = "fsl,fxos8700";
1463 + codec: sgtl5000@0a {
1464 + compatible = "fsl,sgtl5000";
1466 + clocks = <&clks 201>;
1467 + VDDA-supply = <®_1p8v>;
1468 + VDDIO-supply = <®_3p3v>;
1471 + touchscreen: egalax_ts@04 {
1472 + compatible = "eeti,egalax_ts";
1474 + interrupt-parent = <&gpio7>;
1475 + interrupts = <12 2>; /* gpio7_12 active low */
1476 + wakeup-gpios = <&gpio7 12 0>;
1479 + videoin: adv7180@20 {
1480 + compatible = "adi,adv7180";
1486 + pinctrl-names = "default";
1487 + pinctrl-0 = <&pinctrl_hog>;
1490 + pinctrl_hog: hoggrp {
1492 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1493 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1494 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1495 + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
1496 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1497 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
1498 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
1499 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1500 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
1501 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
1502 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
1503 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1504 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1505 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
1506 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
1507 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
1508 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
1512 + pinctrl_audmux: audmuxgrp {
1514 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
1515 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
1516 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
1517 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
1521 + pinctrl_enet: enetgrp {
1523 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1524 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1525 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1526 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1527 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1528 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1529 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1530 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1531 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1532 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1533 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1534 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1535 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1536 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1537 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1538 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1542 + pinctrl_gpmi_nand: gpminandgrp {
1544 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1545 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1546 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1547 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1548 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1549 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1550 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1551 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1552 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1553 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1554 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1555 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1556 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1557 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1558 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1559 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1563 + pinctrl_i2c1: i2c1grp {
1565 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1566 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1570 + pinctrl_i2c2: i2c2grp {
1572 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1573 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1577 + pinctrl_i2c3: i2c3grp {
1579 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1580 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1584 + pinctrl_pwm4: pwm4grp {
1586 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
1590 + pinctrl_uart1: uart1grp {
1592 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1593 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1597 + pinctrl_uart2: uart2grp {
1599 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1600 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1604 + pinctrl_uart5: uart5grp {
1606 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1607 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1611 + pinctrl_usbotg: usbotggrp {
1613 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1617 + pinctrl_usdhc3: usdhc3grp {
1619 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
1620 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
1621 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
1622 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
1623 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
1624 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
1634 + fsl,data-mapping = "spwg";
1635 + fsl,data-width = <18>;
1639 + native-mode = <&timing0>;
1640 + timing0: hsd100pxn1 {
1641 + clock-frequency = <65000000>;
1644 + hback-porch = <220>;
1645 + hfront-porch = <40>;
1646 + vback-porch = <21>;
1647 + vfront-porch = <7>;
1656 + reset-gpio = <&gpio1 29 0>;
1661 + pinctrl-names = "default";
1662 + pinctrl-0 = <&pinctrl_pwm4>;
1667 + fsl,mode = "i2s-slave";
1672 + pinctrl-names = "default";
1673 + pinctrl-0 = <&pinctrl_uart1>;
1678 + pinctrl-names = "default";
1679 + pinctrl-0 = <&pinctrl_uart2>;
1684 + pinctrl-names = "default";
1685 + pinctrl-0 = <&pinctrl_uart5>;
1690 + vbus-supply = <®_usb_otg_vbus>;
1691 + pinctrl-names = "default";
1692 + pinctrl-0 = <&pinctrl_usbotg>;
1693 + disable-over-current;
1702 + pinctrl-names = "default";
1703 + pinctrl-0 = <&pinctrl_usdhc3>;
1704 + cd-gpios = <&gpio7 0 0>;
1705 + vmmc-supply = <®_3p3v>;
1709 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
1712 + * Copyright 2013 Gateworks Corporation
1714 + * The code contained herein is licensed under the GNU General Public
1715 + * License. You may obtain a copy of the GNU General Public License
1716 + * Version 2 or later at the following locations:
1718 + * http://www.opensource.org/licenses/gpl-license.html
1719 + * http://www.gnu.org/copyleft/gpl.html
1723 + /* these are used by bootloader for disabling nodes */
1727 + ethernet1 = ð1;
1740 + bootargs = "console=ttymxc1,115200";
1744 + compatible = "pwm-backlight";
1745 + pwms = <&pwm4 0 5000000>;
1746 + brightness-levels = <0 4 8 16 32 64 128 255>;
1747 + default-brightness-level = <7>;
1752 + compatible = "gpio-leds";
1756 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1757 + default-state = "on";
1758 + linux,default-trigger = "heartbeat";
1763 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1764 + default-state = "off";
1769 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
1770 + default-state = "off";
1775 + reg = <0x10000000 0x40000000>;
1779 + compatible = "pps-gpio";
1780 + gpios = <&gpio1 26 0>;
1785 + compatible = "simple-bus";
1786 + #address-cells = <1>;
1787 + #size-cells = <0>;
1789 + reg_1p0v: regulator@0 {
1790 + compatible = "regulator-fixed";
1792 + regulator-name = "1P0V";
1793 + regulator-min-microvolt = <1000000>;
1794 + regulator-max-microvolt = <1000000>;
1795 + regulator-always-on;
1798 + /* remove when pmic 1p8 regulator available */
1799 + reg_1p8v: regulator@1 {
1800 + compatible = "regulator-fixed";
1802 + regulator-name = "1P8V";
1803 + regulator-min-microvolt = <1800000>;
1804 + regulator-max-microvolt = <1800000>;
1805 + regulator-always-on;
1808 + reg_3p3v: regulator@2 {
1809 + compatible = "regulator-fixed";
1811 + regulator-name = "3P3V";
1812 + regulator-min-microvolt = <3300000>;
1813 + regulator-max-microvolt = <3300000>;
1814 + regulator-always-on;
1817 + reg_usb_h1_vbus: regulator@3 {
1818 + compatible = "regulator-fixed";
1820 + regulator-name = "usb_h1_vbus";
1821 + regulator-min-microvolt = <5000000>;
1822 + regulator-max-microvolt = <5000000>;
1823 + regulator-always-on;
1826 + reg_usb_otg_vbus: regulator@4 {
1827 + compatible = "regulator-fixed";
1829 + regulator-name = "usb_otg_vbus";
1830 + regulator-min-microvolt = <5000000>;
1831 + regulator-max-microvolt = <5000000>;
1832 + gpio = <&gpio3 22 0>;
1833 + enable-active-high;
1838 + compatible = "fsl,imx6q-ventana-sgtl5000",
1839 + "fsl,imx-audio-sgtl5000";
1840 + model = "sgtl5000-audio";
1841 + ssi-controller = <&ssi1>;
1842 + audio-codec = <&codec>;
1844 + "MIC_IN", "Mic Jack",
1845 + "Mic Jack", "Mic Bias",
1846 + "Headphone Jack", "HP_OUT";
1847 + mux-int-port = <1>;
1848 + mux-ext-port = <4>;
1853 + pinctrl-names = "default";
1854 + pinctrl-0 = <&pinctrl_audmux>;
1859 + pinctrl-names = "default";
1860 + pinctrl-0 = <&pinctrl_flexcan1>;
1865 + pinctrl-names = "default";
1866 + pinctrl-0 = <&pinctrl_enet>;
1867 + phy-mode = "rgmii";
1868 + phy-reset-gpios = <&gpio1 30 0>;
1873 + pinctrl-names = "default";
1874 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1879 + clock-frequency = <100000>;
1880 + pinctrl-names = "default";
1881 + pinctrl-0 = <&pinctrl_i2c1>;
1884 + eeprom1: eeprom@50 {
1885 + compatible = "atmel,24c02";
1890 + eeprom2: eeprom@51 {
1891 + compatible = "atmel,24c02";
1896 + eeprom3: eeprom@52 {
1897 + compatible = "atmel,24c02";
1902 + eeprom4: eeprom@53 {
1903 + compatible = "atmel,24c02";
1908 + gpio: pca9555@23 {
1909 + compatible = "nxp,pca9555";
1912 + #gpio-cells = <2>;
1916 + compatible = "gw,gsp";
1921 + compatible = "dallas,ds1672";
1927 + clock-frequency = <100000>;
1928 + pinctrl-names = "default";
1929 + pinctrl-0 = <&pinctrl_i2c2>;
1932 + pciclkgen: si53156@6b {
1933 + compatible = "sil,si53156";
1937 + pciswitch: pex8606@3f {
1938 + compatible = "plx,pex8606";
1942 + pmic: ltc3676@3c {
1943 + compatible = "ltc,ltc3676";
1948 + sw1_reg: ltc3676__sw1 {
1949 + regulator-min-microvolt = <1175000>;
1950 + regulator-max-microvolt = <1175000>;
1951 + regulator-boot-on;
1952 + regulator-always-on;
1956 + sw2_reg: ltc3676__sw2 {
1957 + regulator-min-microvolt = <1800000>;
1958 + regulator-max-microvolt = <1800000>;
1959 + regulator-boot-on;
1960 + regulator-always-on;
1964 + sw3_reg: ltc3676__sw3 {
1965 + regulator-min-microvolt = <1175000>;
1966 + regulator-max-microvolt = <1175000>;
1967 + regulator-boot-on;
1968 + regulator-always-on;
1972 + sw4_reg: ltc3676__sw4 {
1973 + regulator-min-microvolt = <1500000>;
1974 + regulator-max-microvolt = <1500000>;
1975 + regulator-boot-on;
1976 + regulator-always-on;
1980 + ldo2_reg: ltc3676__ldo2 {
1981 + regulator-min-microvolt = <2500000>;
1982 + regulator-max-microvolt = <2500000>;
1983 + regulator-boot-on;
1984 + regulator-always-on;
1988 + ldo3_reg: ltc3676__ldo3 {
1989 + regulator-min-microvolt = <1800000>;
1990 + regulator-max-microvolt = <1800000>;
1991 + regulator-boot-on;
1992 + regulator-always-on;
1996 + ldo4_reg: ltc3676__ldo4 {
1997 + regulator-min-microvolt = <3000000>;
1998 + regulator-max-microvolt = <3000000>;
2005 + clock-frequency = <100000>;
2006 + pinctrl-names = "default";
2007 + pinctrl-0 = <&pinctrl_i2c3>;
2010 + accelerometer: fxos8700@1e {
2011 + compatible = "fsl,fxos8700";
2015 + codec: sgtl5000@0a {
2016 + compatible = "fsl,sgtl5000";
2018 + clocks = <&clks 201>;
2019 + VDDA-supply = <®_1p8v>;
2020 + VDDIO-supply = <®_3p3v>;
2023 + hdmiin: adv7611@4c {
2024 + compatible = "adi,adv7611";
2028 + touchscreen: egalax_ts@04 {
2029 + compatible = "eeti,egalax_ts";
2031 + interrupt-parent = <&gpio1>;
2032 + interrupts = <11 2>; /* gpio1_11 active low */
2033 + wakeup-gpios = <&gpio1 11 0>;
2036 + videoout: adv7393@2a {
2037 + compatible = "adi,adv7393";
2041 + videoin: adv7180@20 {
2042 + compatible = "adi,adv7180";
2048 + pinctrl-names = "default";
2049 + pinctrl-0 = <&pinctrl_hog>;
2052 + pinctrl_hog: hoggrp {
2054 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
2055 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
2056 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2057 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
2058 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2059 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2060 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2061 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2062 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2063 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
2064 + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
2065 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
2066 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
2067 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2068 + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
2069 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2070 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2071 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
2072 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
2076 + pinctrl_audmux: audmuxgrp {
2078 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2079 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2080 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2081 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2085 + pinctrl_enet: enetgrp {
2087 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2088 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2089 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2090 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2091 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2092 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2093 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2094 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2095 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2096 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2097 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2098 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2099 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2100 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2101 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2102 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2106 + pinctrl_flexcan1: flexcan1grp {
2108 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2109 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2113 + pinctrl_gpmi_nand: gpminandgrp {
2115 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2116 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2117 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2118 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2119 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2120 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2121 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2122 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2123 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2124 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2125 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2126 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2127 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2128 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2129 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2130 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2134 + pinctrl_i2c1: i2c1grp {
2136 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2137 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2141 + pinctrl_i2c2: i2c2grp {
2143 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2144 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2148 + pinctrl_i2c3: i2c3grp {
2150 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2151 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2155 + pinctrl_pwm4: pwm4grp {
2157 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
2161 + pinctrl_uart1: uart1grp {
2163 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2164 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2168 + pinctrl_uart2: uart2grp {
2170 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2171 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2175 + pinctrl_uart5: uart5grp {
2177 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2178 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2182 + pinctrl_usbotg: usbotggrp {
2184 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2188 + pinctrl_usdhc3: usdhc3grp {
2190 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2191 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2192 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2193 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2194 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2195 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2205 + fsl,data-mapping = "spwg";
2206 + fsl,data-width = <18>;
2210 + native-mode = <&timing0>;
2211 + timing0: hsd100pxn1 {
2212 + clock-frequency = <65000000>;
2215 + hback-porch = <220>;
2216 + hfront-porch = <40>;
2217 + vback-porch = <21>;
2218 + vfront-porch = <7>;
2227 + reset-gpio = <&gpio1 29 0>;
2230 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2231 + compatible = "marvell,sky2";
2236 + pinctrl-names = "default";
2237 + pinctrl-0 = <&pinctrl_pwm4>;
2242 + fsl,mode = "i2s-slave";
2247 + pinctrl-names = "default";
2248 + pinctrl-0 = <&pinctrl_uart1>;
2253 + pinctrl-names = "default";
2254 + pinctrl-0 = <&pinctrl_uart2>;
2259 + pinctrl-names = "default";
2260 + pinctrl-0 = <&pinctrl_uart5>;
2265 + vbus-supply = <®_usb_otg_vbus>;
2266 + pinctrl-names = "default";
2267 + pinctrl-0 = <&pinctrl_usbotg>;
2268 + disable-over-current;
2273 + vbus-supply = <®_usb_h1_vbus>;
2278 + pinctrl-names = "default";
2279 + pinctrl-0 = <&pinctrl_usdhc3>;
2280 + cd-gpios = <&gpio7 0 0>;
2281 + vmmc-supply = <®_3p3v>;
2285 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
2288 + * Copyright 2013 Gateworks Corporation
2290 + * The code contained herein is licensed under the GNU General Public
2291 + * License. You may obtain a copy of the GNU General Public License
2292 + * Version 2 or later at the following locations:
2294 + * http://www.opensource.org/licenses/gpl-license.html
2295 + * http://www.gnu.org/copyleft/gpl.html
2299 + /* these are used by bootloader for disabling nodes */
2303 + ethernet1 = ð1;
2316 + bootargs = "console=ttymxc1,115200";
2320 + compatible = "pwm-backlight";
2321 + pwms = <&pwm4 0 5000000>;
2322 + brightness-levels = <0 4 8 16 32 64 128 255>;
2323 + default-brightness-level = <7>;
2328 + compatible = "gpio-leds";
2332 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
2333 + default-state = "on";
2334 + linux,default-trigger = "heartbeat";
2339 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
2340 + default-state = "off";
2345 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
2346 + default-state = "off";
2351 + reg = <0x10000000 0x40000000>;
2355 + compatible = "pps-gpio";
2356 + gpios = <&gpio1 26 0>;
2361 + compatible = "simple-bus";
2362 + #address-cells = <1>;
2363 + #size-cells = <0>;
2365 + reg_1p0v: regulator@0 {
2366 + compatible = "regulator-fixed";
2368 + regulator-name = "1P0V";
2369 + regulator-min-microvolt = <1000000>;
2370 + regulator-max-microvolt = <1000000>;
2371 + regulator-always-on;
2374 + reg_3p3v: regulator@1 {
2375 + compatible = "regulator-fixed";
2377 + regulator-name = "3P3V";
2378 + regulator-min-microvolt = <3300000>;
2379 + regulator-max-microvolt = <3300000>;
2380 + regulator-always-on;
2383 + reg_usb_h1_vbus: regulator@2 {
2384 + compatible = "regulator-fixed";
2386 + regulator-name = "usb_h1_vbus";
2387 + regulator-min-microvolt = <5000000>;
2388 + regulator-max-microvolt = <5000000>;
2389 + regulator-always-on;
2392 + reg_usb_otg_vbus: regulator@3 {
2393 + compatible = "regulator-fixed";
2395 + regulator-name = "usb_otg_vbus";
2396 + regulator-min-microvolt = <5000000>;
2397 + regulator-max-microvolt = <5000000>;
2398 + gpio = <&gpio3 22 0>;
2399 + enable-active-high;
2404 + compatible = "fsl,imx6q-ventana-sgtl5000",
2405 + "fsl,imx-audio-sgtl5000";
2406 + model = "sgtl5000-audio";
2407 + ssi-controller = <&ssi1>;
2408 + audio-codec = <&codec>;
2410 + "MIC_IN", "Mic Jack",
2411 + "Mic Jack", "Mic Bias",
2412 + "Headphone Jack", "HP_OUT";
2413 + mux-int-port = <1>;
2414 + mux-ext-port = <4>;
2419 + pinctrl-names = "default";
2420 + pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
2425 + pinctrl-names = "default";
2426 + pinctrl-0 = <&pinctrl_flexcan1>;
2431 + pinctrl-names = "default";
2432 + pinctrl-0 = <&pinctrl_enet>;
2433 + phy-mode = "rgmii";
2434 + phy-reset-gpios = <&gpio1 30 0>;
2439 + pinctrl-names = "default";
2440 + pinctrl-0 = <&pinctrl_gpmi_nand>;
2445 + clock-frequency = <100000>;
2446 + pinctrl-names = "default";
2447 + pinctrl-0 = <&pinctrl_i2c1>;
2450 + eeprom1: eeprom@50 {
2451 + compatible = "atmel,24c02";
2456 + eeprom2: eeprom@51 {
2457 + compatible = "atmel,24c02";
2462 + eeprom3: eeprom@52 {
2463 + compatible = "atmel,24c02";
2468 + eeprom4: eeprom@53 {
2469 + compatible = "atmel,24c02";
2474 + gpio: pca9555@23 {
2475 + compatible = "nxp,pca9555";
2478 + #gpio-cells = <2>;
2482 + compatible = "gw,gsp";
2487 + compatible = "dallas,ds1672";
2493 + clock-frequency = <100000>;
2494 + pinctrl-names = "default";
2495 + pinctrl-0 = <&pinctrl_i2c2>;
2498 + pmic: pfuze100@08 {
2499 + compatible = "fsl,pfuze100";
2504 + regulator-min-microvolt = <300000>;
2505 + regulator-max-microvolt = <1875000>;
2506 + regulator-boot-on;
2507 + regulator-always-on;
2508 + regulator-ramp-delay = <6250>;
2512 + regulator-min-microvolt = <300000>;
2513 + regulator-max-microvolt = <1875000>;
2514 + regulator-boot-on;
2515 + regulator-always-on;
2516 + regulator-ramp-delay = <6250>;
2520 + regulator-min-microvolt = <800000>;
2521 + regulator-max-microvolt = <3950000>;
2522 + regulator-boot-on;
2523 + regulator-always-on;
2527 + regulator-min-microvolt = <400000>;
2528 + regulator-max-microvolt = <1975000>;
2529 + regulator-boot-on;
2530 + regulator-always-on;
2534 + regulator-min-microvolt = <400000>;
2535 + regulator-max-microvolt = <1975000>;
2536 + regulator-boot-on;
2537 + regulator-always-on;
2541 + regulator-min-microvolt = <800000>;
2542 + regulator-max-microvolt = <3300000>;
2545 + swbst_reg: swbst {
2546 + regulator-min-microvolt = <5000000>;
2547 + regulator-max-microvolt = <5150000>;
2551 + regulator-min-microvolt = <1000000>;
2552 + regulator-max-microvolt = <3000000>;
2553 + regulator-boot-on;
2554 + regulator-always-on;
2557 + vref_reg: vrefddr {
2558 + regulator-boot-on;
2559 + regulator-always-on;
2562 + vgen1_reg: vgen1 {
2563 + regulator-min-microvolt = <800000>;
2564 + regulator-max-microvolt = <1550000>;
2567 + vgen2_reg: vgen2 {
2568 + regulator-min-microvolt = <800000>;
2569 + regulator-max-microvolt = <1550000>;
2572 + vgen3_reg: vgen3 {
2573 + regulator-min-microvolt = <1800000>;
2574 + regulator-max-microvolt = <3300000>;
2577 + vgen4_reg: vgen4 {
2578 + regulator-min-microvolt = <1800000>;
2579 + regulator-max-microvolt = <3300000>;
2580 + regulator-always-on;
2583 + vgen5_reg: vgen5 {
2584 + regulator-min-microvolt = <1800000>;
2585 + regulator-max-microvolt = <3300000>;
2586 + regulator-always-on;
2589 + vgen6_reg: vgen6 {
2590 + regulator-min-microvolt = <1800000>;
2591 + regulator-max-microvolt = <3300000>;
2592 + regulator-always-on;
2597 + pciswitch: pex8609@3f {
2598 + compatible = "plx,pex8609";
2602 + pciclkgen: si52147@6b {
2603 + compatible = "sil,si52147";
2609 + clock-frequency = <100000>;
2610 + pinctrl-names = "default";
2611 + pinctrl-0 = <&pinctrl_i2c3>;
2614 + accelerometer: fxos8700@1e {
2615 + compatible = "fsl,fxos8700";
2619 + codec: sgtl5000@0a {
2620 + compatible = "fsl,sgtl5000";
2622 + clocks = <&clks 201>;
2623 + VDDA-supply = <&sw4_reg>;
2624 + VDDIO-supply = <®_3p3v>;
2627 + hdmiin: adv7611@4c {
2628 + compatible = "adi,adv7611";
2632 + touchscreen: egalax_ts@04 {
2633 + compatible = "eeti,egalax_ts";
2635 + interrupt-parent = <&gpio7>;
2636 + interrupts = <12 2>; /* gpio7_12 active low */
2637 + wakeup-gpios = <&gpio7 12 0>;
2640 + videoout: adv7393@2a {
2641 + compatible = "adi,adv7393";
2645 + videoin: adv7180@20 {
2646 + compatible = "adi,adv7180";
2652 + pinctrl-names = "default";
2653 + pinctrl-0 = <&pinctrl_hog>;
2656 + pinctrl_hog: hoggrp {
2658 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2659 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
2660 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2661 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2662 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2663 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2664 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2665 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
2666 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2667 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2668 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2669 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
2670 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
2674 + pinctrl_audmux: audmuxgrp {
2676 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2677 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2678 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2679 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2683 + pinctrl_enet: enetgrp {
2685 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2686 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2687 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2688 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2689 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2690 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2691 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2692 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2693 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2694 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2695 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2696 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2697 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2698 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2699 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2700 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2704 + pinctrl_flexcan1: flexcan1grp {
2706 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2707 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2711 + pinctrl_gpmi_nand: gpminandgrp {
2713 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2714 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2715 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2716 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2717 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2718 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2719 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2720 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2721 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2722 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2723 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2724 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2725 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2726 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2727 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2728 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2732 + pinctrl_i2c1: i2c1grp {
2734 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2735 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2739 + pinctrl_i2c2: i2c2grp {
2741 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2742 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2746 + pinctrl_i2c3: i2c3grp {
2748 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2749 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2753 + pinctrl_pwm4: pwm4grp {
2755 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
2759 + pinctrl_uart1: uart1grp {
2761 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2762 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2766 + pinctrl_uart2: uart2grp {
2768 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2769 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2773 + pinctrl_uart5: uart5grp {
2775 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2776 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2780 + pinctrl_usbotg: usbotggrp {
2782 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2786 + pinctrl_usdhc3: usdhc3grp {
2788 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2789 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2790 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2791 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2792 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2793 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2803 + fsl,data-mapping = "spwg";
2804 + fsl,data-width = <18>;
2808 + native-mode = <&timing0>;
2809 + timing0: hsd100pxn1 {
2810 + clock-frequency = <65000000>;
2813 + hback-porch = <220>;
2814 + hfront-porch = <40>;
2815 + vback-porch = <21>;
2816 + vfront-porch = <7>;
2825 + reset-gpio = <&gpio1 29 0>;
2828 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2829 + compatible = "marvell,sky2";
2834 + pinctrl-names = "default";
2835 + pinctrl-0 = <&pinctrl_pwm4>;
2840 + fsl,mode = "i2s-slave";
2845 + fsl,mode = "i2s-slave";
2850 + pinctrl-names = "default";
2851 + pinctrl-0 = <&pinctrl_uart1>;
2856 + pinctrl-names = "default";
2857 + pinctrl-0 = <&pinctrl_uart2>;
2862 + pinctrl-names = "default";
2863 + pinctrl-0 = <&pinctrl_uart5>;
2868 + vbus-supply = <®_usb_otg_vbus>;
2869 + pinctrl-names = "default";
2870 + pinctrl-0 = <&pinctrl_usbotg>;
2871 + disable-over-current;
2876 + vbus-supply = <®_usb_h1_vbus>;
2881 + pinctrl-names = "default";
2882 + pinctrl-0 = <&pinctrl_usdhc3>;
2883 + cd-gpios = <&gpio7 0 0>;
2884 + vmmc-supply = <®_3p3v>;