target/linux/imx6/patches-4.19/001-ARM-dts-imx-Add-GW5907-board-support.patch

   1 From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001
   2 From: Robert Jones <rjones@gateworks.com>
   3 Date: Wed, 8 Jan 2020 07:44:21 -0800
   4 Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support
   5
   6 The Gateworks GW5907 is an IMX6 SoC based single board computer with:
   7  - IMX6Q or IMX6DL
   8  - 32bit DDR3 DRAM
   9  - FEC GbE Phy
  10  - bi-color front-panel LED
  11  - 256MB NAND boot device
  12  - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
  13  - Digital IO expander (pca9555)
  14  - Joystick 12bit adc (ads1015)
  15
  16 Signed-off-by: Robert Jones <rjones@gateworks.com>
  17 Reviewed-by: Tim Harvey <tharvey@gateworks.com>
  18 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
  19 ---
  20  arch/arm/boot/dts/Makefile            |   2 +
  21  arch/arm/boot/dts/imx6dl-gw5907.dts   |  14 ++
  22  arch/arm/boot/dts/imx6q-gw5907.dts    |  14 ++
  23  arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++
  24  4 files changed, 429 insertions(+)
  25  create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts
  26  create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts
  27  create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi
  28
  29 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  30 index 1e9e1af..9ee80e2 100644
  31 --- a/arch/arm/boot/dts/Makefile
  32 +++ b/arch/arm/boot/dts/Makefile
  33 @@ -422,6 +422,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
  34         imx6dl-gw560x.dtb \
  35         imx6dl-gw5903.dtb \
  36         imx6dl-gw5904.dtb \
  37 +       imx6dl-gw5907.dtb \
  38         imx6dl-hummingboard.dtb \
  39         imx6dl-hummingboard-emmc-som-v15.dtb \
  40         imx6dl-hummingboard-som-v15.dtb \
  41 @@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
  42         imx6q-gw560x.dtb \
  43         imx6q-gw5903.dtb \
  44         imx6q-gw5904.dtb \
  45 +       imx6q-gw5907.dtb \
  46         imx6q-h100.dtb \
  47         imx6q-hummingboard.dtb \
  48         imx6q-hummingboard-emmc-som-v15.dtb \
  49 diff --git a/arch/arm/boot/dts/imx6dl-gw5907.dts b/arch/arm/boot/dts/imx6dl-gw5907.dts
  50 new file mode 100644
  51 index 00000000..3fa2822
  52 --- /dev/null
  53 +++ b/arch/arm/boot/dts/imx6dl-gw5907.dts
  54 @@ -0,0 +1,14 @@
  55 +// SPDX-License-Identifier: GPL-2.0
  56 +/*
  57 + * Copyright 2019 Gateworks Corporation
  58 + */
  59 +
  60 +/dts-v1/;
  61 +
  62 +#include "imx6dl.dtsi"
  63 +#include "imx6qdl-gw5907.dtsi"
  64 +
  65 +/ {
  66 +       model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907";
  67 +       compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl";
  68 +};
  69 diff --git a/arch/arm/boot/dts/imx6q-gw5907.dts b/arch/arm/boot/dts/imx6q-gw5907.dts
  70 new file mode 100644
  71 index 00000000..b25526e
  72 --- /dev/null
  73 +++ b/arch/arm/boot/dts/imx6q-gw5907.dts
  74 @@ -0,0 +1,14 @@
  75 +// SPDX-License-Identifier: GPL-2.0
  76 +/*
  77 + * Copyright 2019 Gateworks Corporation
  78 + */
  79 +
  80 +/dts-v1/;
  81 +
  82 +#include "imx6q.dtsi"
  83 +#include "imx6qdl-gw5907.dtsi"
  84 +
  85 +/ {
  86 +       model = "Gateworks Ventana i.MX6 Dual/Quad GW5907";
  87 +       compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q";
  88 +};
  89 diff --git a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
  90 new file mode 100644
  91 index 00000000..0bdebdd
  92 --- /dev/null
  93 +++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
  94 @@ -0,0 +1,399 @@
  95 +// SPDX-License-Identifier: GPL-2.0
  96 +/*
  97 + * Copyright 2019 Gateworks Corporation
  98 + */
  99 +
 100 +#include <dt-bindings/gpio/gpio.h>
 101 +
 102 +/ {
 103 +       /* these are used by bootloader for disabling nodes */
 104 +       aliases {
 105 +               led0 = &led0;
 106 +               led1 = &led1;
 107 +               nand = &gpmi;
 108 +               usb0 = &usbh1;
 109 +               usb1 = &usbotg;
 110 +       };
 111 +
 112 +       chosen {
 113 +               stdout-path = &uart2;
 114 +       };
 115 +
 116 +       leds {
 117 +               compatible = "gpio-leds";
 118 +               pinctrl-names = "default";
 119 +               pinctrl-0 = <&pinctrl_gpio_leds>;
 120 +
 121 +               led0: user1 {
 122 +                       label = "user1";
 123 +                       gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
 124 +                       default-state = "on";
 125 +                       linux,default-trigger = "heartbeat";
 126 +               };
 127 +
 128 +               led1: user2 {
 129 +                       label = "user2";
 130 +                       gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
 131 +                       default-state = "off";
 132 +               };
 133 +       };
 134 +
 135 +       memory@10000000 {
 136 +               device_type = "memory";
 137 +               reg = <0x10000000 0x20000000>;
 138 +       };
 139 +
 140 +       pps {
 141 +               compatible = "pps-gpio";
 142 +               pinctrl-names = "default";
 143 +               pinctrl-0 = <&pinctrl_pps>;
 144 +               gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
 145 +               status = "okay";
 146 +       };
 147 +
 148 +       reg_3p3v: regulator-3p3v {
 149 +               compatible = "regulator-fixed";
 150 +               regulator-name = "3P3V";
 151 +               regulator-min-microvolt = <3300000>;
 152 +               regulator-max-microvolt = <3300000>;
 153 +               regulator-always-on;
 154 +       };
 155 +
 156 +       reg_5p0v: regulator-5p0v {
 157 +               compatible = "regulator-fixed";
 158 +               regulator-name = "5P0V";
 159 +               regulator-min-microvolt = <5000000>;
 160 +               regulator-max-microvolt = <5000000>;
 161 +               regulator-always-on;
 162 +       };
 163 +
 164 +       reg_usb_otg_vbus: regulator-usb-otg-vbus {
 165 +               compatible = "regulator-fixed";
 166 +               regulator-name = "usb_otg_vbus";
 167 +               regulator-min-microvolt = <5000000>;
 168 +               regulator-max-microvolt = <5000000>;
 169 +               gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 170 +               enable-active-high;
 171 +       };
 172 +};
 173 +
 174 +&fec {
 175 +       pinctrl-names = "default";
 176 +       pinctrl-0 = <&pinctrl_enet>;
 177 +       phy-mode = "rgmii-id";
 178 +       phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
 179 +       status = "okay";
 180 +};
 181 +
 182 +&gpmi {
 183 +       pinctrl-names = "default";
 184 +       pinctrl-0 = <&pinctrl_gpmi_nand>;
 185 +       status = "okay";
 186 +};
 187 +
 188 +&hdmi {
 189 +       ddc-i2c-bus = <&i2c3>;
 190 +       status = "okay";
 191 +};
 192 +
 193 +&i2c1 {
 194 +       clock-frequency = <100000>;
 195 +       pinctrl-names = "default";
 196 +       pinctrl-0 = <&pinctrl_i2c1>;
 197 +       status = "okay";
 198 +
 199 +       gpio@23 {
 200 +               compatible = "nxp,pca9555";
 201 +               reg = <0x23>;
 202 +               gpio-controller;
 203 +               #gpio-cells = <2>;
 204 +       };
 205 +
 206 +       eeprom@50 {
 207 +               compatible = "atmel,24c02";
 208 +               reg = <0x50>;
 209 +               pagesize = <16>;
 210 +       };
 211 +
 212 +       eeprom@51 {
 213 +               compatible = "atmel,24c02";
 214 +               reg = <0x51>;
 215 +               pagesize = <16>;
 216 +       };
 217 +
 218 +       eeprom@52 {
 219 +               compatible = "atmel,24c02";
 220 +               reg = <0x52>;
 221 +               pagesize = <16>;
 222 +       };
 223 +
 224 +       eeprom@53 {
 225 +               compatible = "atmel,24c02";
 226 +               reg = <0x53>;
 227 +               pagesize = <16>;
 228 +       };
 229 +
 230 +       rtc@68 {
 231 +               compatible = "dallas,ds1672";
 232 +               reg = <0x68>;
 233 +       };
 234 +};
 235 +
 236 +&i2c2 {
 237 +       clock-frequency = <100000>;
 238 +       pinctrl-names = "default";
 239 +       pinctrl-0 = <&pinctrl_i2c2>;
 240 +       status = "okay";
 241 +};
 242 +
 243 +&i2c3 {
 244 +       clock-frequency = <100000>;
 245 +       pinctrl-names = "default";
 246 +       pinctrl-0 = <&pinctrl_i2c3>;
 247 +       status = "okay";
 248 +
 249 +       gpio@20 {
 250 +               compatible = "nxp,pca9555";
 251 +               reg = <0x20>;
 252 +               gpio-controller;
 253 +               #gpio-cells = <2>;
 254 +       };
 255 +
 256 +       adc@48 {
 257 +               compatible = "ti,ads1015";
 258 +               reg = <0x48>;
 259 +               #address-cells = <1>;
 260 +               #size-cells = <0>;
 261 +
 262 +               channel@4 {
 263 +                       reg = <4>;
 264 +                       ti,gain = <0>;
 265 +                       ti,datarate = <5>;
 266 +               };
 267 +
 268 +               channel@5 {
 269 +                       reg = <5>;
 270 +                       ti,gain = <0>;
 271 +                       ti,datarate = <5>;
 272 +               };
 273 +
 274 +               channel@6 {
 275 +                       reg = <6>;
 276 +                       ti,gain = <0>;
 277 +                       ti,datarate = <5>;
 278 +               };
 279 +       };
 280 +};
 281 +
 282 +&pcie {
 283 +       pinctrl-names = "default";
 284 +       pinctrl-0 = <&pinctrl_pcie>;
 285 +       reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
 286 +       status = "okay";
 287 +};
 288 +
 289 +&pwm2 {
 290 +       pinctrl-names = "default";
 291 +       pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 292 +       status = "disabled";
 293 +};
 294 +
 295 +&pwm3 {
 296 +       pinctrl-names = "default";
 297 +       pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 298 +       status = "disabled";
 299 +};
 300 +
 301 +&pwm4 {
 302 +       pinctrl-names = "default";
 303 +       pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
 304 +       status = "disabled";
 305 +};
 306 +
 307 +&uart1 {
 308 +       pinctrl-names = "default";
 309 +       pinctrl-0 = <&pinctrl_uart1>;
 310 +       status = "okay";
 311 +};
 312 +
 313 +&uart2 {
 314 +       pinctrl-names = "default";
 315 +       pinctrl-0 = <&pinctrl_uart2>;
 316 +       status = "okay";
 317 +};
 318 +
 319 +&uart3 {
 320 +       pinctrl-names = "default";
 321 +       pinctrl-0 = <&pinctrl_uart3>;
 322 +       status = "okay";
 323 +};
 324 +
 325 +&uart5 {
 326 +       pinctrl-names = "default";
 327 +       pinctrl-0 = <&pinctrl_uart5>;
 328 +       status = "okay";
 329 +};
 330 +
 331 +&usbotg {
 332 +       vbus-supply = <&reg_usb_otg_vbus>;
 333 +       pinctrl-names = "default";
 334 +       pinctrl-0 = <&pinctrl_usbotg>;
 335 +       disable-over-current;
 336 +       status = "okay";
 337 +};
 338 +
 339 +&usbh1 {
 340 +       status = "okay";
 341 +};
 342 +
 343 +&wdog1 {
 344 +       pinctrl-names = "default";
 345 +       pinctrl-0 = <&pinctrl_wdog>;
 346 +       fsl,ext-reset-output;
 347 +};
 348 +
 349 +&iomuxc {
 350 +       pinctrl_enet: enetgrp {
 351 +               fsl,pins = <
 352 +                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 353 +                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 354 +                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 355 +                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 356 +                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 357 +                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 358 +                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 359 +                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 360 +                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 361 +                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 362 +                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 363 +                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 364 +                       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 365 +                       MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 366 +                       MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 367 +                       MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 368 +                       MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
 369 +               >;
 370 +       };
 371 +
 372 +       pinctrl_gpio_leds: gpioledsgrp {
 373 +               fsl,pins = <
 374 +                       MX6QDL_PAD_KEY_COL0__GPIO4_IO06         0x1b0b0
 375 +                       MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x1b0b0
 376 +               >;
 377 +       };
 378 +
 379 +       pinctrl_gpmi_nand: gpminandgrp {
 380 +               fsl,pins = <
 381 +                       MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 382 +                       MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 383 +                       MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 384 +                       MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 385 +                       MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 386 +                       MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 387 +                       MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 388 +                       MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 389 +                       MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 390 +                       MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 391 +                       MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 392 +                       MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 393 +                       MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 394 +                       MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 395 +                       MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 396 +               >;
 397 +       };
 398 +
 399 +       pinctrl_i2c1: i2c1grp {
 400 +               fsl,pins = <
 401 +                       MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 402 +                       MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 403 +                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x0001b0b0
 404 +               >;
 405 +       };
 406 +
 407 +       pinctrl_i2c2: i2c2grp {
 408 +               fsl,pins = <
 409 +                       MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 410 +                       MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 411 +               >;
 412 +       };
 413 +
 414 +       pinctrl_i2c3: i2c3grp {
 415 +               fsl,pins = <
 416 +                       MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 417 +                       MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 418 +                       MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 419 +                       MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 420 +               >;
 421 +       };
 422 +
 423 +       pinctrl_pcie: pciegrp {
 424 +               fsl,pins = <
 425 +                       MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0
 426 +               >;
 427 +       };
 428 +
 429 +       pinctrl_pps: ppsgrp {
 430 +               fsl,pins = <
 431 +                       MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 432 +               >;
 433 +       };
 434 +
 435 +       pinctrl_pwm2: pwm2grp {
 436 +               fsl,pins = <
 437 +                       MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 438 +               >;
 439 +       };
 440 +
 441 +       pinctrl_pwm3: pwm3grp {
 442 +               fsl,pins = <
 443 +                       MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 444 +               >;
 445 +       };
 446 +
 447 +       pinctrl_pwm4: pwm4grp {
 448 +               fsl,pins = <
 449 +                       MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 450 +               >;
 451 +       };
 452 +
 453 +       pinctrl_uart1: uart1grp {
 454 +               fsl,pins = <
 455 +                       MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 456 +                       MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 457 +               >;
 458 +       };
 459 +
 460 +       pinctrl_uart2: uart2grp {
 461 +               fsl,pins = <
 462 +                       MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 463 +                       MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 464 +               >;
 465 +       };
 466 +
 467 +       pinctrl_uart3: uart3grp {
 468 +               fsl,pins = <
 469 +                       MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 470 +                       MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 471 +               >;
 472 +       };
 473 +
 474 +       pinctrl_uart5: uart5grp {
 475 +               fsl,pins = <
 476 +                       MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 477 +                       MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 478 +               >;
 479 +       };
 480 +
 481 +       pinctrl_usbotg: usbotggrp {
 482 +               fsl,pins = <
 483 +                       MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 484 +                       MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0
 485 +               >;
 486 +       };
 487 +
 488 +       pinctrl_wdog: wdoggrp {
 489 +               fsl,pins = <
 490 +                       MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 491 +               >;
 492 +       };
 493 +};
 494 --
 495 2.7.4
 496