1 From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001
2 From: Robert Jones <rjones@gateworks.com>
3 Date: Wed, 8 Jan 2020 07:44:21 -0800
4 Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support
6 The Gateworks GW5907 is an IMX6 SoC based single board computer with:
10 - bi-color front-panel LED
11 - 256MB NAND boot device
12 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
13 - Digital IO expander (pca9555)
14 - Joystick 12bit adc (ads1015)
16 Signed-off-by: Robert Jones <rjones@gateworks.com>
17 Reviewed-by: Tim Harvey <tharvey@gateworks.com>
18 Signed-off-by: Shawn Guo <shawnguo@kernel.org>
20 arch/arm/boot/dts/Makefile | 2 +
21 arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++
22 arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++
23 arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++
24 4 files changed, 429 insertions(+)
25 create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts
26 create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts
27 create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi
29 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
30 index 1e9e1af..9ee80e2 100644
31 --- a/arch/arm/boot/dts/Makefile
32 +++ b/arch/arm/boot/dts/Makefile
33 @@ -422,6 +422,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
38 imx6dl-hummingboard.dtb \
39 imx6dl-hummingboard-emmc-som-v15.dtb \
40 imx6dl-hummingboard-som-v15.dtb \
41 @@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
47 imx6q-hummingboard.dtb \
48 imx6q-hummingboard-emmc-som-v15.dtb \
49 diff --git a/arch/arm/boot/dts/imx6dl-gw5907.dts b/arch/arm/boot/dts/imx6dl-gw5907.dts
51 index 00000000..3fa2822
53 +++ b/arch/arm/boot/dts/imx6dl-gw5907.dts
55 +// SPDX-License-Identifier: GPL-2.0
57 + * Copyright 2019 Gateworks Corporation
62 +#include "imx6dl.dtsi"
63 +#include "imx6qdl-gw5907.dtsi"
66 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907";
67 + compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl";
69 diff --git a/arch/arm/boot/dts/imx6q-gw5907.dts b/arch/arm/boot/dts/imx6q-gw5907.dts
71 index 00000000..b25526e
73 +++ b/arch/arm/boot/dts/imx6q-gw5907.dts
75 +// SPDX-License-Identifier: GPL-2.0
77 + * Copyright 2019 Gateworks Corporation
82 +#include "imx6q.dtsi"
83 +#include "imx6qdl-gw5907.dtsi"
86 + model = "Gateworks Ventana i.MX6 Dual/Quad GW5907";
87 + compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q";
89 diff --git a/arch/arm/boot/dts/imx6qdl-gw5907.dtsi b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
91 index 00000000..0bdebdd
93 +++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi
95 +// SPDX-License-Identifier: GPL-2.0
97 + * Copyright 2019 Gateworks Corporation
100 +#include <dt-bindings/gpio/gpio.h>
103 + /* these are used by bootloader for disabling nodes */
113 + stdout-path = &uart2;
117 + compatible = "gpio-leds";
118 + pinctrl-names = "default";
119 + pinctrl-0 = <&pinctrl_gpio_leds>;
123 + gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
124 + default-state = "on";
125 + linux,default-trigger = "heartbeat";
130 + gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
131 + default-state = "off";
136 + device_type = "memory";
137 + reg = <0x10000000 0x20000000>;
141 + compatible = "pps-gpio";
142 + pinctrl-names = "default";
143 + pinctrl-0 = <&pinctrl_pps>;
144 + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
148 + reg_3p3v: regulator-3p3v {
149 + compatible = "regulator-fixed";
150 + regulator-name = "3P3V";
151 + regulator-min-microvolt = <3300000>;
152 + regulator-max-microvolt = <3300000>;
153 + regulator-always-on;
156 + reg_5p0v: regulator-5p0v {
157 + compatible = "regulator-fixed";
158 + regulator-name = "5P0V";
159 + regulator-min-microvolt = <5000000>;
160 + regulator-max-microvolt = <5000000>;
161 + regulator-always-on;
164 + reg_usb_otg_vbus: regulator-usb-otg-vbus {
165 + compatible = "regulator-fixed";
166 + regulator-name = "usb_otg_vbus";
167 + regulator-min-microvolt = <5000000>;
168 + regulator-max-microvolt = <5000000>;
169 + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
170 + enable-active-high;
175 + pinctrl-names = "default";
176 + pinctrl-0 = <&pinctrl_enet>;
177 + phy-mode = "rgmii-id";
178 + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
183 + pinctrl-names = "default";
184 + pinctrl-0 = <&pinctrl_gpmi_nand>;
189 + ddc-i2c-bus = <&i2c3>;
194 + clock-frequency = <100000>;
195 + pinctrl-names = "default";
196 + pinctrl-0 = <&pinctrl_i2c1>;
200 + compatible = "nxp,pca9555";
207 + compatible = "atmel,24c02";
213 + compatible = "atmel,24c02";
219 + compatible = "atmel,24c02";
225 + compatible = "atmel,24c02";
231 + compatible = "dallas,ds1672";
237 + clock-frequency = <100000>;
238 + pinctrl-names = "default";
239 + pinctrl-0 = <&pinctrl_i2c2>;
244 + clock-frequency = <100000>;
245 + pinctrl-names = "default";
246 + pinctrl-0 = <&pinctrl_i2c3>;
250 + compatible = "nxp,pca9555";
257 + compatible = "ti,ads1015";
259 + #address-cells = <1>;
283 + pinctrl-names = "default";
284 + pinctrl-0 = <&pinctrl_pcie>;
285 + reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
290 + pinctrl-names = "default";
291 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
292 + status = "disabled";
296 + pinctrl-names = "default";
297 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
298 + status = "disabled";
302 + pinctrl-names = "default";
303 + pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
304 + status = "disabled";
308 + pinctrl-names = "default";
309 + pinctrl-0 = <&pinctrl_uart1>;
314 + pinctrl-names = "default";
315 + pinctrl-0 = <&pinctrl_uart2>;
320 + pinctrl-names = "default";
321 + pinctrl-0 = <&pinctrl_uart3>;
326 + pinctrl-names = "default";
327 + pinctrl-0 = <&pinctrl_uart5>;
332 + vbus-supply = <®_usb_otg_vbus>;
333 + pinctrl-names = "default";
334 + pinctrl-0 = <&pinctrl_usbotg>;
335 + disable-over-current;
344 + pinctrl-names = "default";
345 + pinctrl-0 = <&pinctrl_wdog>;
346 + fsl,ext-reset-output;
350 + pinctrl_enet: enetgrp {
352 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
353 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
354 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
355 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
356 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
357 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
358 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
359 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
360 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
361 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
362 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
363 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
364 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
365 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
366 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
367 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
368 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
372 + pinctrl_gpio_leds: gpioledsgrp {
374 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
375 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
379 + pinctrl_gpmi_nand: gpminandgrp {
381 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
382 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
383 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
384 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
385 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
386 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
387 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
388 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
389 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
390 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
391 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
392 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
393 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
394 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
395 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
399 + pinctrl_i2c1: i2c1grp {
401 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
402 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
403 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
407 + pinctrl_i2c2: i2c2grp {
409 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
410 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
414 + pinctrl_i2c3: i2c3grp {
416 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
417 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
418 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
419 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
423 + pinctrl_pcie: pciegrp {
425 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
429 + pinctrl_pps: ppsgrp {
431 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
435 + pinctrl_pwm2: pwm2grp {
437 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
441 + pinctrl_pwm3: pwm3grp {
443 + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
447 + pinctrl_pwm4: pwm4grp {
449 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
453 + pinctrl_uart1: uart1grp {
455 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
456 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
460 + pinctrl_uart2: uart2grp {
462 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
463 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
467 + pinctrl_uart3: uart3grp {
469 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
470 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
474 + pinctrl_uart5: uart5grp {
476 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
477 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
481 + pinctrl_usbotg: usbotggrp {
483 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
484 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
488 + pinctrl_wdog: wdoggrp {
490 + MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0