1 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
2 +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
8 + pinctrl-names = "default";
9 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
10 + status = "disabled";
14 + pinctrl-names = "default";
15 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
16 + status = "disabled";
20 + pinctrl-names = "default";
21 + pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
22 + status = "disabled";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_uart1>;
32 + pinctrl_pwm2: pwm2grp {
34 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
38 + pinctrl_pwm3: pwm3grp {
40 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
44 + pinctrl_pwm4: pwm4grp {
46 + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
50 pinctrl_uart1: uart1grp {
52 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
53 --- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
54 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
60 + pinctrl-names = "default";
61 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
62 + status = "disabled";
66 + pinctrl-names = "default";
67 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
68 + status = "disabled";
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_pwm4>;
78 + pinctrl_pwm2: pwm2grp {
80 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
84 + pinctrl_pwm3: pwm3grp {
86 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
90 pinctrl_pwm4: pwm4grp {
92 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
93 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
94 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
100 + pinctrl-names = "default";
101 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
102 + status = "disabled";
106 + pinctrl-names = "default";
107 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
108 + status = "disabled";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_pwm4>;
118 + pinctrl_pwm2: pwm2grp {
120 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
124 + pinctrl_pwm3: pwm3grp {
126 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
130 pinctrl_pwm4: pwm4grp {
132 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
133 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
134 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
140 + pinctrl-names = "default";
141 + pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
142 + status = "disabled";
146 + pinctrl-names = "default";
147 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
148 + status = "disabled";
152 + pinctrl-names = "default";
153 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
154 + status = "disabled";
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_pwm4>;
164 + pinctrl_pwm1: pwm1grp {
166 + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
170 + pinctrl_pwm2: pwm2grp {
172 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
176 + pinctrl_pwm3: pwm3grp {
178 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
182 pinctrl_pwm4: pwm4grp {
184 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
185 --- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
186 +++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
192 + pinctrl-names = "default";
193 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
194 + status = "disabled";
198 + pinctrl-names = "default";
199 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
200 + status = "disabled";
210 + pinctrl_pwm2: pwm2grp {
212 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
216 + pinctrl_pwm3: pwm3grp {
218 + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
222 pinctrl_uart2: uart2grp {
224 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
225 --- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
226 +++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
232 + pinctrl-names = "default";
233 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
234 + status = "disabled";
238 + pinctrl-names = "default";
239 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
240 + status = "disabled";
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_uart2>;
250 + pinctrl_pwm2: pwm2grp {
252 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
256 + pinctrl_pwm3: pwm3grp {
258 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
262 pinctrl_uart2: uart2grp {
264 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1