target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "ALFA Network AP120C-AC";
  10         compatible = "alfa-network,ap120c-ac";
  11
  12         aliases {
  13                 led-boot = &status;
  14                 led-failsafe = &status;
  15                 led-running = &status;
  16                 led-upgrade = &status;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 reset {
  23                         label = "reset";
  24                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_RESTART>;
  26                 };
  27         };
  28
  29         leds {
  30                 compatible = "gpio-leds";
  31
  32                 status: status {
  33                         label = "blue:status";
  34                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  35                         default-state = "keep";
  36                 };
  37
  38                 wan {
  39                         label = "amber:wan";
  40                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  41                 };
  42
  43                 wlan2g {
  44                         label = "green:wlan2g";
  45                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  46                         linux,default-trigger = "phy0tpt";
  47                 };
  48
  49                 wlan5g {
  50                         label = "red:wlan5g";
  51                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  52                         linux,default-trigger = "phy1tpt";
  53                 };
  54         };
  55
  56         soc {
  57                 rng@22000 {
  58                         status = "okay";
  59                 };
  60
  61                 mdio@90000 {
  62                         status = "okay";
  63
  64                         pinctrl-0 = <&mdio_pins>;
  65                         pinctrl-names = "default";
  66                 };
  67
  68                 counter@4a1000 {
  69                         compatible = "qcom,qca-gcnt";
  70                         reg = <0x4a1000 0x4>;
  71                 };
  72
  73                 tcsr@1949000 {
  74                         compatible = "qcom,tcsr";
  75                         reg = <0x1949000 0x100>;
  76                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  77                 };
  78
  79                 tcsr@194b000 {
  80                         compatible = "qcom,tcsr";
  81                         reg = <0x194b000 0x100>;
  82                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  83                 };
  84
  85                 ess_tcsr@1953000 {
  86                         compatible = "qcom,tcsr";
  87                         reg = <0x1953000 0x1000>;
  88                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  89                 };
  90
  91                 tcsr@1957000 {
  92                         compatible = "qcom,tcsr";
  93                         reg = <0x1957000 0x100>;
  94                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  95                 };
  96
  97                 usb2@60f8800 {
  98                         status = "okay";
  99                 };
 100
 101                 usb3@8af8800 {
 102                         status = "okay";
 103
 104                         dwc3@8a00000 {
 105                                 phys = <&usb3_hs_phy>;
 106                                 phy-names = "usb2-phy";
 107                         };
 108                 };
 109
 110                 crypto@8e3a000 {
 111                         status = "okay";
 112                 };
 113
 114                 watchdog@b017000 {
 115                         status = "okay";
 116                 };
 117         };
 118 };
 119
 120 &blsp_dma {
 121         status = "okay";
 122 };
 123
 124 &blsp1_i2c3 {
 125         status = "okay";
 126
 127         pinctrl-0 = <&i2c0_pins>;
 128         pinctrl-names = "default";
 129
 130         tpm@29 {
 131                 compatible = "atmel,at97sc3204t";
 132                 reg = <0x29>;
 133         };
 134 };
 135
 136 &blsp1_spi1 {
 137         status = "okay";
 138
 139         pinctrl-0 = <&spi0_pins>;
 140         pinctrl-names = "default";
 141         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 142                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 143
 144         flash@0 {
 145                 compatible = "jedec,spi-nor";
 146                 reg = <0>;
 147                 spi-max-frequency = <24000000>;
 148
 149                 partitions {
 150                         compatible = "fixed-partitions";
 151                         #address-cells = <1>;
 152                         #size-cells = <1>;
 153
 154                         partition@0 {
 155                                 label = "SBL1";
 156                                 reg = <0x00000000 0x00040000>;
 157                                 read-only;
 158                         };
 159
 160                         partition@40000 {
 161                                 label = "MIBIB";
 162                                 reg = <0x00040000 0x00020000>;
 163                                 read-only;
 164                         };
 165
 166                         partition@60000 {
 167                                 label = "QSEE";
 168                                 reg = <0x00060000 0x00060000>;
 169                                 read-only;
 170                         };
 171
 172                         partition@c0000 {
 173                                 label = "CDT";
 174                                 reg = <0x000c0000 0x00010000>;
 175                                 read-only;
 176                         };
 177
 178                         partition@d0000 {
 179                                 label = "DDRPARAMS";
 180                                 reg = <0x000d0000 0x00010000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@e0000 {
 185                                 label = "APPSBLENV";
 186                                 reg = <0x000e0000 0x00010000>;
 187                         };
 188
 189                         partition@f0000 {
 190                                 label = "APPSBL";
 191                                 reg = <0x000f0000 0x00080000>;
 192                                 read-only;
 193                         };
 194
 195                         partition@170000 {
 196                                 label = "ART";
 197                                 reg = <0x00170000 0x00010000>;
 198                                 read-only;
 199                                 compatible = "nvmem-cells";
 200                                 #address-cells = <1>;
 201                                 #size-cells = <1>;
 202
 203                                 precal_art_1000: precal@1000 {
 204                                         reg = <0x1000 0x2f20>;
 205                                 };
 206
 207                                 precal_art_5000: precal@5000 {
 208                                         reg = <0x5000 0x2f20>;
 209                                 };
 210                         };
 211
 212                         partition@180000 {
 213                                 label = "priv_data1";
 214                                 reg = <0x00180000 0x00010000>;
 215                                 read-only;
 216                         };
 217
 218                         partition@190000 {
 219                                 label = "priv_data2";
 220                                 reg = <0x00190000 0x00010000>;
 221                                 read-only;
 222                         };
 223                 };
 224         };
 225
 226         nand@1 {
 227                 compatible = "spi-nand";
 228                 reg = <1>;
 229                 spi-max-frequency = <24000000>;
 230
 231                 partitions {
 232                         compatible = "fixed-partitions";
 233                         #address-cells = <1>;
 234                         #size-cells = <1>;
 235
 236                         partition@0 {
 237                                 label = "rootfs1";
 238                                 reg = <0x00000000 0x04000000>;
 239                         };
 240
 241                         partition@4000000 {
 242                                 label = "rootfs2";
 243                                 reg = <0x04000000 0x04000000>;
 244                         };
 245                 };
 246         };
 247 };
 248
 249 &blsp1_uart1 {
 250         status = "okay";
 251
 252         pinctrl-0 = <&serial0_pins>;
 253         pinctrl-names = "default";
 254 };
 255
 256 &cryptobam {
 257         status = "okay";
 258 };
 259
 260 &ethphy4 {
 261         gpio-controller;
 262         #gpio-cells = <2>;
 263 };
 264
 265 &tlmm {
 266         i2c0_pins: i2c0_pinmux {
 267                 mux_i2c {
 268                         function = "blsp_i2c0";
 269                         pins = "gpio58", "gpio59";
 270                         drive-strength = <16>;
 271                         bias-disable;
 272                 };
 273         };
 274
 275         mdio_pins: mdio_pinmux {
 276                 mux_mdio {
 277                         pins = "gpio53";
 278                         function = "mdio";
 279                         bias-pull-up;
 280                 };
 281
 282                 mux_mdc {
 283                         pins = "gpio52";
 284                         function = "mdc";
 285                         bias-pull-up;
 286                 };
 287         };
 288
 289         serial0_pins: serial0_pinmux {
 290                 mux_uart {
 291                         pins = "gpio60", "gpio61";
 292                         function = "blsp_uart0";
 293                         bias-disable;
 294                 };
 295         };
 296
 297         spi0_pins: spi0_pinmux {
 298                 mux_spi {
 299                         function = "blsp_spi0";
 300                         pins = "gpio55", "gpio56", "gpio57";
 301                         drive-strength = <12>;
 302                         bias-disable;
 303                 };
 304
 305                 mux_cs {
 306                         function = "gpio";
 307                         pins = "gpio54", "gpio4";
 308                         drive-strength = <2>;
 309                         bias-disable;
 310                         output-high;
 311                 };
 312         };
 313 };
 314
 315 &usb2_hs_phy {
 316         status = "okay";
 317 };
 318
 319 &usb3_hs_phy {
 320         status = "okay";
 321 };
 322
 323 &wifi0 {
 324         status = "okay";
 325         nvmem-cell-names = "pre-calibration";
 326         nvmem-cells = <&precal_art_1000>;
 327 };
 328
 329 &wifi1 {
 330         status = "okay";
 331         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 332         nvmem-cell-names = "pre-calibration";
 333         nvmem-cells = <&precal_art_5000>;
 334 };