target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "EnGenius ENS620EXT";
  10         compatible = "engenius,ens620ext";
  11
  12         memory {
  13                 device_type = "memory";
  14                 reg = <0x80000000 0x10000000>;
  15         };
  16
  17         aliases {
  18                 led-boot = &power;
  19                 led-failsafe = &power;
  20                 led-running = &power;
  21                 led-upgrade = &power;
  22         };
  23
  24         soc {
  25                 rng@22000 {
  26                         status = "okay";
  27                 };
  28
  29                 tcsr@1949000 {
  30                         compatible = "qcom,tcsr";
  31                         reg = <0x1949000 0x100>;
  32                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  33                 };
  34
  35                 ess_tcsr@1953000 {
  36                         compatible = "qcom,tcsr";
  37                         reg = <0x1953000 0x1000>;
  38                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  39                 };
  40
  41                 tcsr@1957000 {
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x1957000 0x100>;
  44                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  45                 };
  46
  47                 crypto@8e3a000 {
  48                         status = "okay";
  49                 };
  50
  51                 watchdog@b017000 {
  52                         status = "okay";
  53                 };
  54
  55                 /*
  56                  * Disable the broken restart as a workaround for the buggy
  57                  * 3.0.0/3.0.1 U-boots that ship with the device.
  58                  * Note: The watchdog is now used to restart this device.
  59                  */
  60                 restart@4ab000 {
  61                         status = "disabled";
  62                 };
  63         };
  64
  65         buttons {
  66                 compatible = "gpio-keys";
  67
  68                 wps {
  69                         label = "wps";
  70                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  71                         linux,code = <KEY_WPS_BUTTON>;
  72                 };
  73         };
  74
  75         leds {
  76                 compatible = "gpio-leds";
  77
  78                 power: power {
  79                         label = "amber:power";
  80                         gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
  81                 };
  82
  83                 lan1 {
  84                         label = "green:lan1";
  85                         gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
  86                 };
  87
  88                 lan2 {
  89                         label = "green:lan2";
  90                         gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
  91                 };
  92
  93                 wlan2g {
  94                         label = "green:wlan2g";
  95                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 wlan5g {
  99                         label = "green:wlan5g";
 100                         gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
 101                 };
 102         };
 103 };
 104
 105 &cryptobam {
 106         status = "okay";
 107 };
 108
 109 &blsp_dma {
 110         status = "okay";
 111 };
 112
 113 &tlmm {
 114         serial_pins: serial_pinmux {
 115                 mux {
 116                         pins = "gpio60", "gpio61";
 117                         function = "blsp_uart0";
 118                         bias-disable;
 119                 };
 120         };
 121
 122         spi_0_pins: spi_0_pinmux {
 123                 mux {
 124                         function = "blsp_spi0";
 125                         pins = "gpio55", "gpio56", "gpio57";
 126                         drive-strength = <12>;
 127                         bias-disable;
 128                 };
 129
 130                 mux_cs {
 131                         function = "gpio";
 132                         pins = "gpio54";
 133                         drive-strength = <2>;
 134                         bias-disable;
 135                         output-high;
 136                 };
 137         };
 138 };
 139
 140 &blsp1_spi1 { /* BLSP1 QUP1 */
 141         pinctrl-0 = <&spi_0_pins>;
 142         pinctrl-names = "default";
 143         status = "okay";
 144         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 145
 146         flash@0 {
 147                 #address-cells = <1>;
 148                 #size-cells = <0>;
 149                 compatible = "jedec,spi-nor";
 150                 reg = <0>;
 151                 spi-max-frequency = <50000000>;
 152                 m25p,fast-read;
 153
 154                 partitions {
 155                         compatible = "fixed-partitions";
 156                         #address-cells = <1>;
 157                         #size-cells = <1>;
 158
 159                         partition@0 {
 160                                 label = "SBL1";
 161                                 reg = <0x00000000 0x00040000>;
 162                                 read-only;
 163                         };
 164                         partition@40000 {
 165                                 label = "MIBIB";
 166                                 reg = <0x00040000 0x00020000>;
 167                                 read-only;
 168                         };
 169                         partition@60000 {
 170                                 label = "QSEE";
 171                                 reg = <0x00060000 0x00060000>;
 172                                 read-only;
 173                         };
 174                         partition@c0000 {
 175                                 label = "CDT";
 176                                 reg = <0x000c0000 0x00010000>;
 177                                 read-only;
 178                         };
 179                         partition@d0000 {
 180                                 label = "DDRPARAMS";
 181                                 reg = <0x000d0000 0x00010000>;
 182                                 read-only;
 183                         };
 184                         partition@e0000 {
 185                                 label = "APPSBLENV"; /* uboot env*/
 186                                 reg = <0x000e0000 0x00010000>;
 187                                 read-only;
 188                         };
 189                         partition@f0000 {
 190                                 label = "APPSBL"; /* uboot */
 191                                 reg = <0x000f0000 0x00090000>;
 192                                 read-only;
 193                         };
 194                         partition@180000 {
 195                                 label = "ART";
 196                                 reg = <0x00180000 0x00010000>;
 197                                 read-only;
 198                         };
 199                         partition@190000 {
 200                                 compatible = "denx,fit";
 201                                 label = "firmware";
 202                                 reg = <0x00190000 0x14d0000>;
 203                         };
 204                         partition@1660000 {
 205                                 label = "failsafe";
 206                                 reg = <0x01660000 0x008F0000>;
 207                                 read-only;
 208                         };
 209                         partition@1f50000 {
 210                                 label = "u-boot-env";
 211                                 reg = <0x01f50000 0x00010000>;
 212                                 read-only;
 213                         };
 214                         partition@1f60000 {
 215                                 label = "userconfig";
 216                                 reg = <0x01f60000 0x000a0000>;
 217                                 read-only;
 218                         };
 219                 };
 220         };
 221 };
 222
 223 &blsp1_uart1 {
 224         pinctrl-0 = <&serial_pins>;
 225         pinctrl-names = "default";
 226         status = "okay";
 227 };
 228
 229 &usb3_ss_phy {
 230         status = "okay";
 231 };
 232
 233 &usb3_hs_phy {
 234         status = "okay";
 235 };
 236
 237 &usb2_hs_phy {
 238         status = "okay";
 239 };
 240
 241 &wifi0 {
 242         status = "okay";
 243         qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
 244 };
 245
 246 &wifi1 {
 247         status = "okay";
 248         qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT";
 249 };