ipq40xx: drop ESSEDMA + AR40xx DTS nodes
[openwrt/staging/dedeckeh.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-jalapeno.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 soc {
11 rng@22000 {
12 status = "okay";
13 };
14
15 mdio@90000 {
16 status = "okay";
17
18 pinctrl-0 = <&mdio_pins>;
19 pinctrl-names = "default";
20 };
21
22 counter@4a1000 {
23 compatible = "qcom,qca-gcnt";
24 reg = <0x4a1000 0x4>;
25 };
26
27 tcsr@1949000 {
28 compatible = "qcom,tcsr";
29 reg = <0x1949000 0x100>;
30 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
31 };
32
33 tcsr@194b000 {
34 status = "okay";
35
36 compatible = "qcom,tcsr";
37 reg = <0x194b000 0x100>;
38 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
39 };
40
41 ess_tcsr@1953000 {
42 compatible = "qcom,tcsr";
43 reg = <0x1953000 0x1000>;
44 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
45 };
46
47 tcsr@1957000 {
48 compatible = "qcom,tcsr";
49 reg = <0x1957000 0x100>;
50 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
51 };
52
53 usb2: usb2@60f8800 {
54 status = "okay";
55 };
56
57 usb3: usb3@8af8800 {
58 status = "okay";
59 };
60
61 crypto@8e3a000 {
62 status = "okay";
63 };
64
65 watchdog@b017000 {
66 status = "okay";
67 };
68 };
69 };
70
71 &tlmm {
72 mdio_pins: mdio_pinmux {
73 pinmux_1 {
74 pins = "gpio53";
75 function = "mdio";
76 };
77
78 pinmux_2 {
79 pins = "gpio52";
80 function = "mdc";
81 };
82
83 pinconf {
84 pins = "gpio52", "gpio53";
85 bias-pull-up;
86 };
87 };
88
89 serial_pins: serial_pinmux {
90 mux {
91 pins = "gpio60", "gpio61";
92 function = "blsp_uart0";
93 bias-disable;
94 };
95 };
96
97 spi_0_pins: spi_0_pinmux {
98 pin {
99 function = "blsp_spi0";
100 pins = "gpio55", "gpio56", "gpio57";
101 drive-strength = <2>;
102 bias-disable;
103 };
104
105 pin_cs {
106 function = "gpio";
107 pins = "gpio54", "gpio59";
108 drive-strength = <2>;
109 bias-disable;
110 output-high;
111 };
112 };
113 };
114
115 &blsp_dma {
116 status = "okay";
117 };
118
119 &blsp1_spi1 {
120 status = "okay";
121
122 pinctrl-0 = <&spi_0_pins>;
123 pinctrl-names = "default";
124 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
125
126 flash@0 {
127 status = "okay";
128
129 compatible = "jedec,spi-nor";
130 reg = <0>;
131 spi-max-frequency = <24000000>;
132
133 partitions {
134 compatible = "fixed-partitions";
135 #address-cells = <1>;
136 #size-cells = <1>;
137
138 partition@0 {
139 label = "SBL1";
140 reg = <0x00000000 0x00040000>;
141 read-only;
142 };
143
144 partition@40000 {
145 label = "MIBIB";
146 reg = <0x00040000 0x00020000>;
147 read-only;
148 };
149
150 partition@60000 {
151 label = "QSEE";
152 reg = <0x00060000 0x00060000>;
153 read-only;
154 };
155
156 partition@c0000 {
157 label = "CDT";
158 reg = <0x000c0000 0x00010000>;
159 read-only;
160 };
161
162 partition@d0000 {
163 label = "DDRPARAMS";
164 reg = <0x000d0000 0x00010000>;
165 read-only;
166 };
167
168 partition@e0000 {
169 label = "APPSBLENV"; /* uboot env*/
170 reg = <0x000e0000 0x00010000>;
171 read-only;
172 };
173
174 partition@f0000 {
175 label = "APPSBL"; /* uboot */
176 reg = <0x000f0000 0x00080000>;
177 read-only;
178 };
179
180 partition@170000 {
181 label = "ART";
182 reg = <0x00170000 0x00010000>;
183 read-only;
184 compatible = "nvmem-cells";
185 #address-cells = <1>;
186 #size-cells = <1>;
187
188 precal_art_1000: precal@1000 {
189 reg = <0x1000 0x2f20>;
190 };
191
192 precal_art_5000: precal@5000 {
193 reg = <0x5000 0x2f20>;
194 };
195 };
196 };
197 };
198
199 spi-nand@1 {
200 status = "okay";
201
202 compatible = "spi-nand";
203 reg = <1>;
204 spi-max-frequency = <24000000>;
205
206 partitions {
207 compatible = "fixed-partitions";
208 #address-cells = <1>;
209 #size-cells = <1>;
210
211 partition@0 {
212 label = "ubi";
213 reg = <0x00000000 0x08000000>;
214 };
215 };
216 };
217 };
218
219 &blsp1_uart1 {
220 status = "okay";
221
222 pinctrl-0 = <&serial_pins>;
223 pinctrl-names = "default";
224 };
225
226 &cryptobam {
227 status = "okay";
228 };
229
230 &wifi0 {
231 status = "okay";
232 nvmem-cell-names = "pre-calibration";
233 nvmem-cells = <&precal_art_1000>;
234 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
235 };
236
237 &wifi1 {
238 status = "okay";
239 nvmem-cell-names = "pre-calibration";
240 nvmem-cells = <&precal_art_5000>;
241 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
242 };
243
244 &usb3_ss_phy {
245 status = "okay";
246 };
247
248 &usb3_hs_phy {
249 status = "okay";
250 };
251
252 &usb2_hs_phy {
253 status = "okay";
254 };