target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019-ap.dk01.1.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         aliases {
  10                 label-mac-device = &gmac0;
  11         };
  12
  13         memory {
  14                 device_type = "memory";
  15                 reg = <0x80000000 0x10000000>;
  16         };
  17
  18         soc {
  19                 pinctrl@1000000 {
  20                         mdio_pins: mdio_pinmux {
  21                                 mux_1 {
  22                                         pins = "gpio53";
  23                                         function = "mdio";
  24                                         bias-pull-up;
  25                                 };
  26                                 mux_2 {
  27                                         pins = "gpio52";
  28                                         function = "mdc";
  29                                         bias-pull-up;
  30                                 };
  31                         };
  32
  33                         i2c_0_pins: i2c_0_pinmux {
  34                                 mux {
  35                                         pins = "gpio58", "gpio59";
  36                                         function = "blsp_i2c0";
  37                                         bias-disable;
  38                                 };
  39                         };
  40                 };
  41
  42                 keys {
  43                         compatible = "gpio-keys";
  44
  45                         reset {
  46                                 label = "reset";
  47                                 gpios = <&tlmm 4 1>;
  48                                 linux,code = <KEY_RESTART>;
  49                         };
  50                 };
  51
  52                 gpio_export {
  53                         compatible = "gpio-export";
  54                         #size-cells = <0>;
  55
  56                         gpio_out {
  57                                 gpio-export,name = "gpio_out";
  58                                 gpio-export,output = <0>;
  59                                 gpio-export,direction_may_change = <0>;
  60                                 gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
  61                         };
  62
  63                         gpio_in {
  64                                 gpio-export,name = "gpio_in";
  65                                 gpio-export,input = <0>;
  66                                 gpio-export,direction_may_change = <0>;
  67                                 gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
  68                         };
  69                 };
  70         };
  71 };
  72
  73 &blsp1_i2c3 {
  74         status = "okay";
  75         pinctrl-0 = <&i2c_0_pins>;
  76         pinctrl-names = "default";
  77         clock-frequency = <400000>;
  78
  79         stm32_io: stm32@74 {
  80                 compatible = "tlt,stm32v1";
  81                 #gpio-cells = <2>;
  82                 #interrupt-cells = <2>;
  83                 gpio-controller;
  84                 interrupt-controller;
  85                 interrupt-parent = <&tlmm>;
  86                 interrupts = <5 2>;
  87                 reg = <0x74>;
  88         };
  89 };
  90
  91 &blsp1_spi1 {
  92         cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
  93         num-cs = <2>;
  94
  95         xt25f128b@0 {
  96                 /*
  97                  * Factory U-boot looks in 0:BOOTCONFIG partition for active
  98                  * partitions settings and mangles the partition config so
  99                  * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and  0:APPSBL/0:APPSBL_1 pairs
 100                  * can be swaped. It isn't a problem but we never can be sure where
 101                  * OFW put factory images. "n25q128a11" is required for proper nor
 102                  * recognition in u-boot.
 103                  */
 104                 compatible = "jedec,spi-nor", "n25q128a11";
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 reg = <0>;
 108                 spi-max-frequency = <24000000>;
 109
 110                 partitions {
 111                         compatible = "fixed-partitions";
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114
 115                         partition@0 {
 116                                 label = "0:SBL1";
 117                                 reg = <0x0 0x40000>;
 118                                 read-only;
 119                         };
 120
 121                         partition@40000 {
 122                                 label = "0:MIBIB";
 123                                 reg = <0x40000 0x20000>;
 124                                 read-only;
 125                         };
 126
 127                         partition@60000 {
 128                                 label = "0:BOOTCONFIG";
 129                                 reg = <0x60000 0x20000>;
 130                                 read-only;
 131                         };
 132
 133                         partition@80000 {
 134                                 label = "0:BOOTCONFIG1";
 135                                 reg = <0x80000 0x20000>;
 136                                 read-only;
 137                         };
 138
 139                         partition@a0000 {
 140                                 label = "0:QSEE";
 141                                 reg = <0xa0000 0x60000>;
 142                                 read-only;
 143                         };
 144
 145                         partition@100000 {
 146                                 label = "0:QSEE_1";
 147                                 reg = <0x100000 0x60000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@160000 {
 152                                 label = "0:CDT";
 153                                 reg = <0x160000 0x10000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@170000 {
 158                                 label = "0:CDT_1";
 159                                 reg = <0x170000 0x10000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@180000 {
 164                                 label = "0:DDRPARAMS";
 165                                 reg = <0x180000 0x10000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@190000 {
 170                                 label = "0:APPSBLENV";
 171                                 reg = <0x190000 0x10000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@1a0000 {
 176                                 label = "0:APPSBL";
 177                                 reg = <0x1a0000 0xa0000>;
 178                                 read-only;
 179                         };
 180
 181                         partition@240000 {
 182                                 label = "0:APPSBL_1";
 183                                 reg = <0x240000 0xa0000>;
 184                                 read-only;
 185                         };
 186
 187                         partition@2e0000 {
 188                                 label = "0:ART";
 189                                 reg = <0x2e0000 0x10000>;
 190                                 read-only;
 191                         };
 192
 193                         config: partition@2f0000 {
 194                                 label = "0:CONFIG";
 195                                 reg = <0x2f0000 0x10000>;
 196                                 read-only;
 197                         };
 198
 199                         partition@300000 {
 200                                 label = "0:CONFIG_RW";
 201                                 reg = <0x300000 0x10000>;
 202                                 read-only;
 203                         };
 204
 205                         partition@310000 {
 206                                 label = "0:EVENTSLOG";
 207                                 reg = <0x310000 0x90000>;
 208                                 read-only;
 209                         };
 210                 };
 211         };
 212
 213         xt26g02a@1 {
 214                 /*
 215                  * Factory U-boot looks in 0:BOOTCONFIG partition for active
 216                  * partitions settings and mangles the partition config so
 217                  * rootfs/rootfs_1 pairs can be swaped.
 218                  * It isn't a problem but we never can be sure where OFW put
 219                  * factory images. "spinand,mt29f" value is required for proper
 220                  * nand recognition in u-boot.
 221                  */
 222                 compatible = "spi-nand", "spinand,mt29f";
 223                 #address-cells = <1>;
 224                 #size-cells = <1>;
 225                 reg = <1>;
 226                 spi-max-frequency = <24000000>;
 227
 228                 partitions {
 229                         compatible = "fixed-partitions";
 230                         #address-cells = <1>;
 231                         #size-cells = <1>;
 232
 233                         partition@0 {
 234                                 label = "rootfs_1";
 235                                 reg = <0x00000000 0x08000000>;
 236                         };
 237
 238                         partition@8000000 {
 239                                 label = "rootfs";
 240                                 reg = <0x08000000 0x08000000>;
 241                         };
 242                 };
 243         };
 244 };
 245
 246 &mdio {
 247         status = "okay";
 248         pinctrl-0 = <&mdio_pins>;
 249         pinctrl-names = "default";
 250         phy-reset-gpio = <&tlmm 62 0>;
 251 };