1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
9 model = "MobiPromo CM520-79F";
10 compatible = "mobipromo,cm520-79f";
14 led-failsafe = &led_sys;
15 led-running = &led_sys;
16 led-upgrade = &led_sys;
26 pinctrl-0 = <&mdio_pins>;
27 pinctrl-names = "default";
28 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
29 reset-delay-us = <1000>;
33 compatible = "qcom,tcsr";
34 reg = <0x1949000 0x100>;
35 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
39 compatible = "qcom,tcsr";
40 reg = <0x194b000 0x100>;
41 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
45 compatible = "qcom,tcsr";
46 reg = <0x1953000 0x1000>;
47 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
51 compatible = "qcom,tcsr";
52 reg = <0x1957000 0x100>;
53 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
65 #trigger-source-cells = <0>;
79 #trigger-source-cells = <0>;
84 #trigger-source-cells = <0>;
99 compatible = "spi-gpio";
100 #address-cells = <1>;
103 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
104 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
105 num-chipselects = <0>;
107 led_gpio: led_gpio@0 {
108 compatible = "fairchild,74hc595";
112 registers-number = <1>;
113 spi-max-frequency = <1000000>;
118 compatible = "gpio-leds";
122 gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
123 linux,default-trigger = "usbport";
124 trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
129 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
134 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
139 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
144 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
148 label = "blue:wlan2g";
149 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
150 linux,default-trigger = "phy0tpt";
154 label = "blue:wlan5g";
155 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
156 linux,default-trigger = "phy1tpt";
161 compatible = "gpio-keys";
165 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
166 linux,code = <KEY_RESTART>;
188 pinctrl-0 = <&nand_pins>;
189 pinctrl-names = "default";
194 compatible = "fixed-partitions";
195 #address-cells = <1>;
200 reg = <0x0 0x100000>;
206 reg = <0x100000 0x100000>;
211 label = "BOOTCONFIG";
212 reg = <0x200000 0x100000>;
217 reg = <0x300000 0x100000>;
223 reg = <0x400000 0x100000>;
229 reg = <0x500000 0x80000>;
235 reg = <0x580000 0x80000>;
240 label = "BOOTCONFIG1";
241 reg = <0x600000 0x80000>;
246 reg = <0x680000 0x80000>;
251 reg = <0x700000 0x200000>;
257 reg = <0x900000 0x200000>;
261 art: partition@b00000 {
263 reg = <0xb00000 0x80000>;
265 compatible = "nvmem-cells";
266 #address-cells = <1>;
269 precal_art_1000: precal@1000 {
270 reg = <0x1000 0x2f20>;
273 macaddr_art_1006: macaddr@1006 {
277 precal_art_5000: precal@5000 {
278 reg = <0x5000 0x2f20>;
281 macaddr_art_5006: macaddr@5006 {
288 reg = <0xb80000 0x7480000>;
299 mdio_pins: mdio_pinmux {
313 nand_pins: nand_pins {
315 pins = "gpio52", "gpio53", "gpio58",
322 pins = "gpio54", "gpio55", "gpio56",
323 "gpio57", "gpio60", "gpio61",
324 "gpio62", "gpio63", "gpio64",
325 "gpio65", "gpio66", "gpio67",
347 nvmem-cell-names = "pre-calibration";
348 nvmem-cells = <&precal_art_1000>;
349 qcom,ath10k-calibration-variant = "CM520-79F";
354 nvmem-cell-names = "pre-calibration";
355 nvmem-cells = <&precal_art_5000>;
356 qcom,ath10k-calibration-variant = "CM520-79F";