1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
10 model = "MobiPromo CM520-79F";
11 compatible = "mobipromo,cm520-79f";
15 led-failsafe = &led_sys;
16 led-running = &led_sys;
17 led-upgrade = &led_sys;
27 pinctrl-0 = <&mdio_pins>;
28 pinctrl-names = "default";
29 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
30 reset-delay-us = <1000>;
34 compatible = "qcom,tcsr";
35 reg = <0x1949000 0x100>;
36 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
40 compatible = "qcom,tcsr";
41 reg = <0x194b000 0x100>;
42 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
46 compatible = "qcom,tcsr";
47 reg = <0x1953000 0x1000>;
48 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
52 compatible = "qcom,tcsr";
53 reg = <0x1957000 0x100>;
54 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
66 #trigger-source-cells = <0>;
80 #trigger-source-cells = <0>;
85 #trigger-source-cells = <0>;
100 compatible = "spi-gpio";
101 #address-cells = <1>;
104 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
105 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
106 num-chipselects = <0>;
108 led_gpio: led_gpio@0 {
109 compatible = "fairchild,74hc595";
113 registers-number = <1>;
114 spi-max-frequency = <1000000>;
119 compatible = "gpio-leds";
122 function = LED_FUNCTION_USB;
123 color = <LED_COLOR_ID_BLUE>;
124 gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
125 linux,default-trigger = "usbport";
126 trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
131 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
135 function = LED_FUNCTION_WAN;
136 color = <LED_COLOR_ID_BLUE>;
137 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
142 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
147 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
151 label = "blue:wlan2g";
152 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
153 linux,default-trigger = "phy0tpt";
157 label = "blue:wlan5g";
158 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
159 linux,default-trigger = "phy1tpt";
164 compatible = "gpio-keys";
168 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
169 linux,code = <KEY_RESTART>;
191 pinctrl-0 = <&nand_pins>;
192 pinctrl-names = "default";
197 compatible = "fixed-partitions";
198 #address-cells = <1>;
203 reg = <0x0 0x100000>;
209 reg = <0x100000 0x100000>;
214 label = "BOOTCONFIG";
215 reg = <0x200000 0x100000>;
220 reg = <0x300000 0x100000>;
226 reg = <0x400000 0x100000>;
232 reg = <0x500000 0x80000>;
238 reg = <0x580000 0x80000>;
243 label = "BOOTCONFIG1";
244 reg = <0x600000 0x80000>;
249 reg = <0x680000 0x80000>;
254 reg = <0x700000 0x200000>;
260 reg = <0x900000 0x200000>;
264 art: partition@b00000 {
266 reg = <0xb00000 0x80000>;
270 compatible = "fixed-layout";
271 #address-cells = <1>;
274 precal_art_1000: precal@1000 {
275 reg = <0x1000 0x2f20>;
278 macaddr_art_1006: macaddr@1006 {
282 precal_art_5000: precal@5000 {
283 reg = <0x5000 0x2f20>;
286 macaddr_art_5006: macaddr@5006 {
294 reg = <0xb80000 0x7480000>;
305 mdio_pins: mdio_pinmux {
319 nand_pins: nand_pins {
321 pins = "gpio52", "gpio53", "gpio58",
328 pins = "gpio54", "gpio55", "gpio56",
329 "gpio57", "gpio60", "gpio61",
330 "gpio62", "gpio63", "gpio64",
331 "gpio65", "gpio66", "gpio67",
354 nvmem-cells = <&macaddr_art_1006>;
355 nvmem-cell-names = "mac-address";
377 nvmem-cells = <&macaddr_art_5006>;
378 nvmem-cell-names = "mac-address";
383 nvmem-cell-names = "pre-calibration";
384 nvmem-cells = <&precal_art_1000>;
385 qcom,ath10k-calibration-variant = "CM520-79F";
390 nvmem-cell-names = "pre-calibration";
391 nvmem-cells = <&precal_art_5000>;
392 qcom,ath10k-calibration-variant = "CM520-79F";