target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "GL.iNet GL-B2200";
  10         compatible = "glinet,gl-b2200", "qcom,ipq4019";
  11
  12         memory {
  13                 device_type = "memory";
  14                 reg = <0x80000000 0x10000000>;
  15         };
  16
  17         chosen {
  18                 bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
  19         };
  20
  21         soc {
  22                 rng@22000 {
  23                         status = "okay";
  24                 };
  25
  26                 mdio@90000 {
  27                         status = "okay";
  28                 };
  29
  30                 tcsr@1949000 {
  31                         compatible = "qcom,tcsr";
  32                         reg = <0x1949000 0x100>;
  33                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  34                 };
  35
  36                 tcsr@194b000 {
  37                         /* select hostmode */
  38                         compatible = "qcom,tcsr";
  39                         reg = <0x194b000 0x100>;
  40                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  41                         status = "okay";
  42                 };
  43
  44                 ess_tcsr@1953000 {
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x1953000 0x1000>;
  47                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  48                 };
  49
  50                 tcsr@1957000 {
  51                         compatible = "qcom,tcsr";
  52                         reg = <0x1957000 0x100>;
  53                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  54                 };
  55
  56                 crypto@8e3a000 {
  57                         status = "okay";
  58                 };
  59         };
  60
  61         keys {
  62                 compatible = "gpio-keys";
  63
  64                 wps {
  65                         label = "wps";
  66                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  67                         linux,code = <KEY_WPS_BUTTON>;
  68                         linux,input-type = <1>;
  69                 };
  70
  71                 reset {
  72                         label = "reset";
  73                         gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
  74                         linux,code = <KEY_RESTART>;
  75                         linux,input-type = <1>;
  76                 };
  77         };
  78
  79         leds {
  80                 compatible = "gpio-leds";
  81
  82                 power_blue {
  83                         label = "blue:power";
  84                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  85                         default-state = "on";
  86                 };
  87                 internet_blue {
  88                         label = "blue:internet";
  89                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
  90                 };
  91                 power_white {
  92                         label = "white:power";
  93                         gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
  94                 };
  95                 internet_white {
  96                         label = "white:internet";
  97                         gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
  98                 };
  99         };
 100 };
 101
 102 &vqmmc {
 103         status = "okay";
 104 };
 105
 106 &sdhci {
 107         status = "okay";
 108         pinctrl-0 = <&sd_pins>;
 109         pinctrl-names = "default";
 110         cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
 111         vqmmc-supply = <&vqmmc>;
 112 };
 113
 114 &blsp_dma {
 115         status = "okay";
 116 };
 117
 118 &cryptobam {
 119         status = "okay";
 120 };
 121
 122 &blsp1_spi1 {
 123         pinctrl-0 = <&spi_0_pins>;
 124         pinctrl-names = "default";
 125         status = "okay";
 126         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 127
 128         flash@0 {
 129                 compatible = "jedec,spi-nor";
 130                 reg = <0>;
 131                 spi-max-frequency = <24000000>;
 132
 133                 partitions {
 134                         compatible = "fixed-partitions";
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137
 138                         partition@0 {
 139                                 label = "SBL1";
 140                                 reg = <0x0 0x40000>;
 141                                 read-only;
 142                         };
 143
 144                         partition@40000 {
 145                                 label = "MIBIB";
 146                                 reg = <0x40000 0x20000>;
 147                                 read-only;
 148                         };
 149
 150                         partition@60000 {
 151                                 label = "QSEE";
 152                                 reg = <0x60000 0x60000>;
 153                                 read-only;
 154                         };
 155
 156                         partition@c0000 {
 157                                 label = "CDT";
 158                                 reg = <0xc0000 0x10000>;
 159                                 read-only;
 160                         };
 161
 162                         partition@d0000 {
 163                                 label = "DDRPARAMS";
 164                                 reg = <0xd0000 0x10000>;
 165                                 read-only;
 166                         };
 167
 168                         partition@e0000 {
 169                                 label = "APPSBLENV";
 170                                 reg = <0xe0000 0x10000>;
 171                                 read-only;
 172                         };
 173
 174                         partition@f0000 {
 175                                 label = "APPSBL";
 176                                 reg = <0xf0000 0x80000>;
 177                                 read-only;
 178                         };
 179
 180                         partition@170000 {
 181                                 label = "ART";
 182                                 reg = <0x170000 0x10000>;
 183                                 read-only;
 184                                 compatible = "nvmem-cells";
 185                                 #address-cells = <1>;
 186                                 #size-cells = <1>;
 187
 188                                 precal_art_1000: precal@1000 {
 189                                         reg = <0x1000 0x2f20>;
 190                                 };
 191
 192                                 precal_art_5000: precal@5000 {
 193                                         reg = <0x5000 0x2f20>;
 194                                 };
 195
 196                                 precal_art_9000: precal@9000 {
 197                                         reg = <0x9000 0x2f20>;
 198                                 };
 199                         };
 200                 };
 201         };
 202 };
 203
 204 &blsp1_spi2 {
 205         pinctrl-0 = <&spi_1_pins>;
 206         pinctrl-names = "default";
 207         status = "okay";
 208
 209         spidev1: spi@0 {
 210                 compatible = "siliconlabs,si3210";
 211                 reg = <0>;
 212                 spi-max-frequency = <24000000>;
 213         };
 214 };
 215
 216 &blsp1_uart1 {
 217         pinctrl-0 = <&serial_pins>;
 218         pinctrl-names = "default";
 219         status = "okay";
 220 };
 221
 222 &blsp1_uart2 {
 223         pinctrl-0 = <&serial_1_pins>;
 224         pinctrl-names = "default";
 225         status = "okay";
 226 };
 227
 228 &tlmm {
 229         serial_pins: serial_pinmux {
 230                 mux {
 231                         pins = "gpio16", "gpio17";
 232                         function = "blsp_uart0";
 233                         bias-disable;
 234                 };
 235         };
 236
 237         serial_1_pins: serial1_pinmux {
 238                 mux {
 239                         pins = "gpio8", "gpio9",
 240                                 "gpio10", "gpio11";
 241                         function = "blsp_uart1";
 242                         bias-disable;
 243                 };
 244         };
 245
 246         spi_0_pins: spi_0_pinmux {
 247                 pinmux {
 248                         function = "blsp_spi0";
 249                         pins = "gpio13", "gpio14", "gpio15";
 250                 };
 251                 pinmux_cs {
 252                         function = "gpio";
 253                         pins = "gpio12";
 254                 };
 255                 pinconf {
 256                         pins = "gpio13", "gpio14", "gpio15";
 257                         drive-strength = <12>;
 258                         bias-disable;
 259                 };
 260                 pinconf_cs {
 261                         pins = "gpio12";
 262                         drive-strength = <2>;
 263                         bias-disable;
 264                         output-high;
 265                 };
 266         };
 267
 268         spi_1_pins: spi_1_pinmux {
 269                 mux {
 270                         pins = "gpio44", "gpio46", "gpio47";
 271                         function = "blsp_spi1";
 272                         bias-disable;
 273                 };
 274                 cs {
 275                         pins = "gpio45";
 276                         function = "gpio";
 277                         bias-pull-up;
 278                 };
 279                 reset {
 280                         pins = "gpio43";
 281                         function = "gpio";
 282                         output-high;
 283                 };
 284                 mux_2 {
 285                         pins = "gpio35";
 286                         function = "gpio";
 287                         output-high;
 288                 };
 289                 host_int {
 290                         pins = "gpio2";
 291                         function = "gpio";
 292                         input;
 293                 };
 294                 wake {
 295                         pins = "gpio48";
 296                         function = "gpio";
 297                         output-high;
 298                 };
 299         };
 300
 301         sd_pins: sd_pins {
 302                 pinmux {
 303                         function = "sdio";
 304                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 305                                 "gpio29", "gpio30", "gpio31", "gpio32";
 306                         drive-strength = <10>;
 307                 };
 308
 309                 pinmux_sd_clk {
 310                         function = "sdio";
 311                         pins = "gpio27";
 312                         drive-strength = <16>;
 313                 };
 314
 315                 pinmux_sd7 {
 316                         function = "sdio";
 317                         pins = "gpio28";
 318                         drive-strength = <10>;
 319                         bias-disable;
 320                 };
 321         };
 322
 323 };
 324
 325 &pcie0 {
 326         status = "okay";
 327         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 328         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 329
 330         bridge@0,0 {
 331                 reg = <0x00000000 0 0 0 0>;
 332                 #address-cells = <3>;
 333                 #size-cells = <2>;
 334                 ranges;
 335
 336                 wifi2: wifi@1,0 {
 337                         status = "okay";
 338                         /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
 339                         compatible = "qcom,ath10k";
 340                         reg = <0x00010000 0 0 0 0>;
 341                         nvmem-cell-names = "pre-calibration";
 342                         nvmem-cells = <&precal_art_9000>;
 343                         qcom,ath10k-calibration-variant = "GL-B2200";
 344                         ieee80211-freq-limit = <5450000 5900000>;
 345                 };
 346         };
 347 };
 348
 349 &wifi0 {
 350         status = "okay";
 351         nvmem-cell-names = "pre-calibration";
 352         nvmem-cells = <&precal_art_1000>;
 353         qcom,ath10k-calibration-variant = "GL-B2200";
 354 };
 355
 356 &wifi1 {
 357         status = "okay";
 358         nvmem-cell-names = "pre-calibration";
 359         nvmem-cells = <&precal_art_5000>;
 360         qcom,ath10k-calibration-variant = "GL-B2200";
 361         ieee80211-freq-limit = <5100000 5400000>;
 362 };