ipq40xx: utilize nvmem-cells for macs & (pre-)calibration data
[openwrt/staging/jow.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-habanero-dvk.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 model = "8devices Habanero DVK";
11 compatible = "8dev,habanero-dvk";
12
13 aliases {
14 led-boot = &led_status;
15 led-failsafe = &led_status;
16 led-running = &led_status;
17 led-upgrade = &led_upgrade;
18 };
19
20 soc {
21 rng@22000 {
22 status = "okay";
23 };
24
25 mdio@90000 {
26 status = "okay";
27
28 pinctrl-0 = <&mdio_pins>;
29 pinctrl-names = "default";
30 };
31
32 ess-psgmii@98000 {
33 status = "okay";
34 };
35
36 counter@4a1000 {
37 compatible = "qcom,qca-gcnt";
38 reg = <0x4a1000 0x4>;
39 };
40
41 tcsr@1949000 {
42 compatible = "qcom,tcsr";
43 reg = <0x1949000 0x100>;
44 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
45 };
46
47 tcsr@194b000 {
48 status = "okay";
49
50 compatible = "qcom,tcsr";
51 reg = <0x194b000 0x100>;
52 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
53 };
54
55 ess_tcsr@1953000 {
56 compatible = "qcom,tcsr";
57 reg = <0x1953000 0x1000>;
58 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
59 };
60
61 tcsr@1957000 {
62 compatible = "qcom,tcsr";
63 reg = <0x1957000 0x100>;
64 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
65 };
66
67 usb2: usb2@60f8800 {
68 status = "okay";
69 };
70
71 usb3: usb3@8af8800 {
72 status = "okay";
73 };
74
75 crypto@8e3a000 {
76 status = "okay";
77 };
78
79 watchdog@b017000 {
80 status = "okay";
81 };
82
83 ess-switch@c000000 {
84 status = "okay";
85 };
86
87 edma@c080000 {
88 status = "okay";
89 };
90 };
91
92 keys {
93 compatible = "gpio-keys";
94
95 reset {
96 label = "reset";
97 gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
98 linux,code = <KEY_RESTART>;
99 };
100 };
101
102 leds {
103 compatible = "gpio-leds";
104
105 led_status: status {
106 label = "green:status";
107 gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
108 panic-indicator;
109 };
110
111 led_upgrade: upgrade {
112 label = "green:upgrade";
113 gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
114 };
115
116 wlan2g {
117 label = "green:wlan2g";
118 gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
119 linux,default-trigger = "phy0tpt";
120 };
121
122 wlan5g {
123 label = "green:wlan5g";
124 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
125 linux,default-trigger = "phy1tpt";
126 };
127 };
128 };
129
130 &vqmmc {
131 status = "okay";
132 };
133
134 &sdhci {
135 status = "okay";
136
137 pinctrl-0 = <&sd_pins>;
138 pinctrl-names = "default";
139 cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
140 vqmmc-supply = <&vqmmc>;
141 };
142
143 &qpic_bam {
144 status = "okay";
145 };
146
147 &tlmm {
148 mdio_pins: mdio_pinmux {
149 mux_1 {
150 pins = "gpio6";
151 function = "mdio";
152 bias-pull-up;
153 };
154
155 mux_2 {
156 pins = "gpio7";
157 function = "mdc";
158 bias-pull-up;
159 };
160 };
161
162 serial_pins: serial_pinmux {
163 mux {
164 pins = "gpio16", "gpio17";
165 function = "blsp_uart0";
166 bias-disable;
167 };
168 };
169
170 spi_0_pins: spi_0_pinmux {
171 pinmux {
172 function = "blsp_spi0";
173 pins = "gpio13", "gpio14", "gpio15";
174 drive-strength = <12>;
175 bias-disable;
176 };
177
178 pinmux_cs {
179 function = "gpio";
180 pins = "gpio12";
181 drive-strength = <2>;
182 bias-disable;
183 output-high;
184 };
185 };
186
187 nand_pins: nand_pins {
188 pullups {
189 pins = "gpio52", "gpio53", "gpio58", "gpio59";
190 function = "qpic";
191 bias-pull-up;
192 };
193
194 pulldowns {
195 pins = "gpio54", "gpio55", "gpio56", "gpio57",
196 "gpio60", "gpio62", "gpio63", "gpio64",
197 "gpio65", "gpio66", "gpio67", "gpio68",
198 "gpio69";
199 function = "qpic";
200 bias-pull-down;
201 };
202 };
203
204 sd_pins: sd_pins {
205 pinmux {
206 function = "sdio";
207 pins = "gpio23", "gpio24", "gpio25", "gpio26",
208 "gpio28", "gpio29", "gpio30", "gpio31";
209 drive-strength = <10>;
210 };
211
212 pinmux_sd_clk {
213 function = "sdio";
214 pins = "gpio27";
215 drive-strength = <16>;
216 };
217
218 pinmux_sd7 {
219 function = "sdio";
220 pins = "gpio32";
221 drive-strength = <10>;
222 bias-disable;
223 };
224 };
225 };
226
227 &blsp_dma {
228 status = "okay";
229 };
230
231 &blsp1_spi1 {
232 status = "okay";
233
234 pinctrl-0 = <&spi_0_pins>;
235 pinctrl-names = "default";
236 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
237
238 flash@0 {
239 compatible = "jedec,spi-nor";
240 spi-max-frequency = <24000000>;
241 reg = <0>;
242
243 partitions {
244 compatible = "fixed-partitions";
245 #address-cells = <1>;
246 #size-cells = <1>;
247
248 partition@0 {
249 label = "SBL1";
250 reg = <0x00000000 0x00040000>;
251 read-only;
252 };
253 partition@40000 {
254 label = "MIBIB";
255 reg = <0x00040000 0x00020000>;
256 read-only;
257 };
258 partition@60000 {
259 label = "QSEE";
260 reg = <0x00060000 0x00060000>;
261 read-only;
262 };
263 partition@c0000 {
264 label = "CDT";
265 reg = <0x000c0000 0x00010000>;
266 read-only;
267 };
268 partition@d0000 {
269 label = "DDRPARAMS";
270 reg = <0x000d0000 0x00010000>;
271 read-only;
272 };
273 partition@e0000 {
274 label = "APPSBLENV"; /* uboot env */
275 reg = <0x000e0000 0x00010000>;
276 read-only;
277 };
278 partition@f0000 {
279 label = "APPSBL"; /* uboot */
280 reg = <0x000f0000 0x00080000>;
281 read-only;
282 };
283 partition@170000 {
284 label = "ART";
285 reg = <0x00170000 0x00010000>;
286 read-only;
287 compatible = "nvmem-cells";
288 #address-cells = <1>;
289 #size-cells = <1>;
290
291 precal_art_1000: precal@1000 {
292 reg = <0x1000 0x2f20>;
293 };
294
295 precal_art_5000: precal@5000 {
296 reg = <0x5000 0x2f20>;
297 };
298 };
299 partition@180000 {
300 label = "cfg";
301 reg = <0x00180000 0x00040000>;
302 };
303 partition@1c0000 {
304 label = "firmware";
305 compatible = "denx,fit";
306 reg = <0x001c0000 0x01e40000>;
307 };
308 };
309 };
310 };
311
312 /* Some DVK boards ship without NAND */
313 &nand {
314 status = "okay";
315
316 pinctrl-0 = <&nand_pins>;
317 pinctrl-names = "default";
318 };
319
320 &blsp1_uart1 {
321 status = "okay";
322
323 pinctrl-0 = <&serial_pins>;
324 pinctrl-names = "default";
325 };
326
327 &cryptobam {
328 status = "okay";
329 };
330
331 &pcie0 {
332 status = "okay";
333
334 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
335 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
336
337 /* Free slot for use */
338 bridge@0,0 {
339 reg = <0x00000000 0 0 0 0>;
340 #address-cells = <3>;
341 #size-cells = <2>;
342 ranges;
343 };
344 };
345
346 &wifi0 {
347 status = "okay";
348 nvmem-cell-names = "pre-calibration";
349 nvmem-cells = <&precal_art_1000>;
350 qcom,ath10k-calibration-variant = "8devices-Habanero";
351 };
352
353 &wifi1 {
354 status = "okay";
355 nvmem-cell-names = "pre-calibration";
356 nvmem-cells = <&precal_art_5000>;
357 qcom,ath10k-calibration-variant = "8devices-Habanero";
358 };
359
360 &usb3_ss_phy {
361 status = "okay";
362 };
363
364 &usb3_hs_phy {
365 status = "okay";
366 };
367
368 &usb2_hs_phy {
369 status = "okay";
370 };