target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2019, Robert Marko <robimarko@gmail.com> */
   3
   4 #include "qcom-ipq4019.dtsi"
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "8devices Habanero DVK";
  11         compatible = "8dev,habanero-dvk";
  12
  13         aliases {
  14                 led-boot = &led_status;
  15                 led-failsafe = &led_status;
  16                 led-running = &led_status;
  17                 led-upgrade = &led_upgrade;
  18         };
  19
  20         soc {
  21                 rng@22000 {
  22                         status = "okay";
  23                 };
  24
  25                 mdio@90000 {
  26                         status = "okay";
  27
  28                         pinctrl-0 = <&mdio_pins>;
  29                         pinctrl-names = "default";
  30                 };
  31
  32                 counter@4a1000 {
  33                         compatible = "qcom,qca-gcnt";
  34                         reg = <0x4a1000 0x4>;
  35                 };
  36
  37                 tcsr@1949000 {
  38                         compatible = "qcom,tcsr";
  39                         reg = <0x1949000 0x100>;
  40                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  41                 };
  42
  43                 tcsr@194b000 {
  44                         status = "okay";
  45
  46                         compatible = "qcom,tcsr";
  47                         reg = <0x194b000 0x100>;
  48                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  49                 };
  50
  51                 ess_tcsr@1953000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x1953000 0x1000>;
  54                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  55                 };
  56
  57                 tcsr@1957000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1957000 0x100>;
  60                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  61                 };
  62
  63                 usb2: usb2@60f8800 {
  64                         status = "okay";
  65                 };
  66
  67                 usb3: usb3@8af8800 {
  68                         status = "okay";
  69                 };
  70
  71                 crypto@8e3a000 {
  72                         status = "okay";
  73                 };
  74
  75                 watchdog@b017000 {
  76                         status = "okay";
  77                 };
  78         };
  79
  80         keys {
  81                 compatible = "gpio-keys";
  82
  83                 reset {
  84                         label = "reset";
  85                         gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
  86                         linux,code = <KEY_RESTART>;
  87                 };
  88         };
  89
  90         leds {
  91                 compatible = "gpio-leds";
  92
  93                 led_status: status {
  94                         label = "green:status";
  95                         gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  96                         panic-indicator;
  97                 };
  98
  99                 led_upgrade: upgrade {
 100                         label = "green:upgrade";
 101                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 102                 };
 103
 104                 wlan2g {
 105                         label = "green:wlan2g";
 106                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
 107                         linux,default-trigger = "phy0tpt";
 108                 };
 109
 110                 wlan5g {
 111                         label = "green:wlan5g";
 112                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 113                         linux,default-trigger = "phy1tpt";
 114                 };
 115         };
 116 };
 117
 118 &vqmmc {
 119         status = "okay";
 120 };
 121
 122 &sdhci {
 123         status = "okay";
 124
 125         pinctrl-0 = <&sd_pins>;
 126         pinctrl-names = "default";
 127         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 128         vqmmc-supply = <&vqmmc>;
 129 };
 130
 131 &qpic_bam {
 132         status = "okay";
 133 };
 134
 135 &tlmm {
 136         mdio_pins: mdio_pinmux {
 137                 mux_1 {
 138                         pins = "gpio6";
 139                         function = "mdio";
 140                         bias-pull-up;
 141                 };
 142
 143                 mux_2 {
 144                         pins = "gpio7";
 145                         function = "mdc";
 146                         bias-pull-up;
 147                 };
 148         };
 149
 150         serial_pins: serial_pinmux {
 151                 mux {
 152                         pins = "gpio16", "gpio17";
 153                         function = "blsp_uart0";
 154                         bias-disable;
 155                 };
 156         };
 157
 158         spi_0_pins: spi_0_pinmux {
 159                 pinmux {
 160                         function = "blsp_spi0";
 161                         pins = "gpio13", "gpio14", "gpio15";
 162                         drive-strength = <12>;
 163                         bias-disable;
 164                 };
 165
 166                 pinmux_cs {
 167                         function = "gpio";
 168                         pins = "gpio12";
 169                         drive-strength = <2>;
 170                         bias-disable;
 171                         output-high;
 172                 };
 173         };
 174
 175         nand_pins: nand_pins {
 176                 pullups {
 177                         pins =  "gpio52", "gpio53", "gpio58", "gpio59";
 178                         function = "qpic";
 179                         bias-pull-up;
 180                 };
 181
 182                 pulldowns {
 183                         pins = "gpio54", "gpio55", "gpio56", "gpio57",
 184                                 "gpio60", "gpio62", "gpio63", "gpio64",
 185                                 "gpio65", "gpio66", "gpio67", "gpio68",
 186                                 "gpio69";
 187                         function = "qpic";
 188                         bias-pull-down;
 189                 };
 190         };
 191
 192         sd_pins: sd_pins {
 193                 pinmux {
 194                         function = "sdio";
 195                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 196                                 "gpio28", "gpio29", "gpio30", "gpio31";
 197                         drive-strength = <10>;
 198                 };
 199
 200                 pinmux_sd_clk {
 201                         function = "sdio";
 202                         pins = "gpio27";
 203                         drive-strength = <16>;
 204                 };
 205
 206                 pinmux_sd7 {
 207                         function = "sdio";
 208                         pins = "gpio32";
 209                         drive-strength = <10>;
 210                         bias-disable;
 211                 };
 212         };
 213 };
 214
 215 &blsp_dma {
 216         status = "okay";
 217 };
 218
 219 &blsp1_spi1 {
 220         status = "okay";
 221
 222         pinctrl-0 = <&spi_0_pins>;
 223         pinctrl-names = "default";
 224         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 225
 226         flash@0 {
 227                 compatible = "jedec,spi-nor";
 228                 spi-max-frequency = <24000000>;
 229                 reg = <0>;
 230
 231                 partitions {
 232                         compatible = "fixed-partitions";
 233                         #address-cells = <1>;
 234                         #size-cells = <1>;
 235
 236                         partition@0 {
 237                                 label = "SBL1";
 238                                 reg = <0x00000000 0x00040000>;
 239                                 read-only;
 240                         };
 241                         partition@40000 {
 242                                 label = "MIBIB";
 243                                 reg = <0x00040000 0x00020000>;
 244                                 read-only;
 245                         };
 246                         partition@60000 {
 247                                 label = "QSEE";
 248                                 reg = <0x00060000 0x00060000>;
 249                                 read-only;
 250                         };
 251                         partition@c0000 {
 252                                 label = "CDT";
 253                                 reg = <0x000c0000 0x00010000>;
 254                                 read-only;
 255                         };
 256                         partition@d0000 {
 257                                 label = "DDRPARAMS";
 258                                 reg = <0x000d0000 0x00010000>;
 259                                 read-only;
 260                         };
 261                         partition@e0000 {
 262                                 label = "APPSBLENV"; /* uboot env */
 263                                 reg = <0x000e0000 0x00010000>;
 264                                 read-only;
 265                         };
 266                         partition@f0000 {
 267                                 label = "APPSBL"; /* uboot */
 268                                 reg = <0x000f0000 0x00080000>;
 269                                 read-only;
 270                         };
 271                         partition@170000 {
 272                                 label = "ART";
 273                                 reg = <0x00170000 0x00010000>;
 274                                 read-only;
 275                                 compatible = "nvmem-cells";
 276                                 #address-cells = <1>;
 277                                 #size-cells = <1>;
 278
 279                                 precal_art_1000: precal@1000 {
 280                                         reg = <0x1000 0x2f20>;
 281                                 };
 282
 283                                 precal_art_5000: precal@5000 {
 284                                         reg = <0x5000 0x2f20>;
 285                                 };
 286                         };
 287                         partition@180000 {
 288                                 label = "cfg";
 289                                 reg = <0x00180000 0x00040000>;
 290                         };
 291                         partition@1c0000 {
 292                                 label = "firmware";
 293                                 compatible = "denx,fit";
 294                                 reg = <0x001c0000 0x01e40000>;
 295                         };
 296                 };
 297         };
 298 };
 299
 300 /* Some DVK boards ship without NAND */
 301 &nand {
 302         status = "okay";
 303
 304         pinctrl-0 = <&nand_pins>;
 305         pinctrl-names = "default";
 306 };
 307
 308 &blsp1_uart1 {
 309         status = "okay";
 310
 311         pinctrl-0 = <&serial_pins>;
 312         pinctrl-names = "default";
 313 };
 314
 315 &cryptobam {
 316         status = "okay";
 317 };
 318
 319 &pcie0 {
 320         status = "okay";
 321
 322         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 323         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 324
 325         /* Free slot for use */
 326         bridge@0,0 {
 327                 reg = <0x00000000 0 0 0 0>;
 328                 #address-cells = <3>;
 329                 #size-cells = <2>;
 330                 ranges;
 331         };
 332 };
 333
 334 &wifi0 {
 335         status = "okay";
 336         nvmem-cell-names = "pre-calibration";
 337         nvmem-cells = <&precal_art_1000>;
 338         qcom,ath10k-calibration-variant = "8devices-Habanero";
 339 };
 340
 341 &wifi1 {
 342         status = "okay";
 343         nvmem-cell-names = "pre-calibration";
 344         nvmem-cells = <&precal_art_5000>;
 345         qcom,ath10k-calibration-variant = "8devices-Habanero";
 346 };
 347
 348 &usb3_ss_phy {
 349         status = "okay";
 350 };
 351
 352 &usb3_hs_phy {
 353         status = "okay";
 354 };
 355
 356 &usb2_hs_phy {
 357         status = "okay";
 358 };