1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
12 model = "ZTE MF282Plus";
13 compatible = "zte,mf282plus";
16 led-boot = &led_internal;
17 led-failsafe = &led_internal;
18 led-running = &led_internal;
19 led-upgrade = &led_internal;
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 bootargs-append = " root=/dev/ubiblock0_1";
31 compatible = "gpio-export";
35 gpio-export,name = "modem-reset";
36 gpio-export,output = <0>;
37 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
42 compatible = "gpio-leds";
45 function = LED_FUNCTION_STATUS;
46 color = <LED_COLOR_ID_BLUE>;
47 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
48 label = "blue:internal_led";
49 default-state = "keep";
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "phy0tpt";
61 compatible = "gpio-keys";
65 linux,code = <KEY_RFKILL>;
66 gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
71 linux,code = <KEY_RESTART>;
72 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_WPS_BUTTON>;
78 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
89 pinctrl-0 = <&mdio_pins>;
90 pinctrl-names = "default";
91 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
92 reset-delay-us = <2000>;
96 compatible = "qcom,tcsr";
97 reg = <0x1949000 0x100>;
98 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
102 /* select hostmode */
103 compatible = "qcom,tcsr";
104 reg = <0x194b000 0x100>;
105 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
110 compatible = "qcom,tcsr";
111 reg = <0x1953000 0x1000>;
112 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
116 compatible = "qcom,tcsr";
117 reg = <0x1957000 0x100>;
118 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
144 pinctrl-0 = <&spi_0_pins>;
145 pinctrl-names = "default";
147 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
150 /* u-boot is looking for "n25q128a11" property */
151 compatible = "jedec,spi-nor", "n25q128a11";
152 #address-cells = <1>;
155 spi-max-frequency = <24000000>;
158 compatible = "fixed-partitions";
159 #address-cells = <1>;
170 reg = <0x40000 0x20000>;
176 reg = <0x60000 0x60000>;
182 reg = <0xc0000 0x10000>;
187 label = "0:DDRPARAMS";
188 reg = <0xd0000 0x10000>;
193 label = "0:APPSBLENV";
194 reg = <0xe0000 0x10000>;
200 reg = <0xf0000 0xc0000>;
205 label = "0:reserved1";
206 reg = <0x1b0000 0x50000>;
214 pinctrl-0 = <&serial_pins>;
215 pinctrl-names = "default";
225 nvmem-cell-names = "mac-address";
226 nvmem-cells = <&macaddr_config_0 0>;
230 pinctrl-0 = <&nand_pins>;
231 pinctrl-names = "default";
236 compatible = "fixed-partitions";
237 #address-cells = <1>;
248 reg = <0xa0000 0x80000>;
252 compatible = "fixed-layout";
253 #address-cells = <1>;
256 precal_art_1000: precal@1000 {
257 reg = <0x1000 0x2f20>;
260 precal_art_5000: precal@5000 {
261 reg = <0x5000 0x2f20>;
268 reg = <0x120000 0x80000>;
272 compatible = "fixed-layout";
273 #address-cells = <1>;
276 macaddr_config_0: macaddr@0 {
277 compatible = "mac-base";
279 #nvmem-cell-cells = <1>;
286 reg = <0x1a0000 0xc0000>;
292 reg = <0x260000 0x400000>;
298 reg = <0x660000 0x400000>;
303 reg = <0xa60000 0xa0000>;
308 reg = <0xb00000 0x500000>;
314 reg = <0x1000000 0x800000>;
319 reg = <0x1800000 0x1d00000>;
324 reg = <0x3500000 0x1900000>;
329 reg = <0x4e00000 0x2800000>;
334 reg = <0x7600000 0xa00000>;
355 i2c_0_pins: i2c_0_pinmux {
357 pins = "gpio20", "gpio21";
358 function = "blsp_i2c0";
363 mdio_pins: mdio_pinmux {
377 nand_pins: nand_pins {
379 pins = "gpio52", "gpio53", "gpio58",
386 pins = "gpio54", "gpio55", "gpio56",
388 "gpio62", "gpio63", "gpio64",
389 "gpio65", "gpio66", "gpio67",
396 serial_pins: serial_pinmux {
398 pins = "gpio16", "gpio17";
399 function = "blsp_uart0";
404 spi_0_pins: spi_0_pinmux {
406 function = "blsp_spi0";
407 pins = "gpio13", "gpio14", "gpio15";
408 drive-strength = <12>;
415 drive-strength = <2>;
435 * The MD5 sum of the board file of the MF286D is identical to the board
436 * file in the OEM firmware
440 nvmem-cell-names = "pre-calibration", "mac-address";
441 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 1>;
442 qcom,ath10k-calibration-variant = "zte,mf286d";
446 * The MD5 sum of the board file of the MF286D is identical to the board
447 * file in the OEM firmware
451 nvmem-cell-names = "pre-calibration", "mac-address";
452 nvmem-cells = <&precal_art_5000>, <&macaddr_config_0 1>;
453 qcom,ath10k-calibration-variant = "zte,mf286d";