d2a010055c9bc5b7a79ec8ecbe6f20eb3df6fbe8
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf286d.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/soc/qcom,tcsr.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9
10 / {
11 model = "ZTE MF286D";
12 compatible = "zte,mf286d";
13
14 aliases {
15 led-boot = &led_internal;
16 led-failsafe = &led_internal;
17 led-running = &led_internal;
18 led-upgrade = &led_internal;
19 };
20
21 chosen {
22 /*
23 * bootargs forced by u-boot bootipq command:
24 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
25 */
26 bootargs-append = " root=/dev/ubiblock0_1";
27 };
28
29 gpio-restart {
30 compatible = "gpio-restart";
31 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 led_internal: led-0 {
38 function = LED_FUNCTION_STATUS;
39 color = <LED_COLOR_ID_BLUE>;
40 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
41 label = "blue:internal_led";
42 default-state = "keep";
43 };
44
45 led-1 {
46 function = LED_FUNCTION_WLAN;
47 color = <LED_COLOR_ID_BLUE>;
48 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
49 linux,default-trigger = "phy0tpt";
50 };
51 };
52
53 keys {
54 compatible = "gpio-keys";
55
56 wifi {
57 label = "wifi";
58 linux,code = <KEY_RFKILL>;
59 gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
60 };
61
62 reset {
63 label = "reset";
64 linux,code = <KEY_RESTART>;
65 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
66 };
67
68 wps {
69 label = "wps";
70 linux,code = <KEY_WPS_BUTTON>;
71 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
72 };
73 };
74
75 soc {
76 rng@22000 {
77 status = "okay";
78 };
79
80 mdio@90000 {
81 status = "okay";
82 pinctrl-0 = <&mdio_pins>;
83 pinctrl-names = "default";
84 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
85 reset-delay-us = <2000>;
86 };
87
88 ess-psgmii@98000 {
89 status = "okay";
90 };
91
92 tcsr@1949000 {
93 compatible = "qcom,tcsr";
94 reg = <0x1949000 0x100>;
95 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
96 };
97
98 tcsr@194b000 {
99 /* select hostmode */
100 compatible = "qcom,tcsr";
101 reg = <0x194b000 0x100>;
102 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
103 status = "okay";
104 };
105
106 ess_tcsr@1953000 {
107 compatible = "qcom,tcsr";
108 reg = <0x1953000 0x1000>;
109 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
110 };
111
112 tcsr@1957000 {
113 compatible = "qcom,tcsr";
114 reg = <0x1957000 0x100>;
115 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
116 };
117
118 usb2@60f8800 {
119 status = "okay";
120 };
121
122 usb3@8af8800 {
123 status = "okay";
124 };
125
126 crypto@8e3a000 {
127 status = "okay";
128 };
129
130 watchdog@b017000 {
131 status = "okay";
132 };
133 };
134 };
135
136 &blsp_dma {
137 status = "okay";
138 };
139
140 &blsp1_spi1 {
141 pinctrl-0 = <&spi_0_pins>;
142 pinctrl-names = "default";
143 status = "okay";
144 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
145
146 flash@0 {
147 /* u-boot is looking for "n25q128a11" property */
148 compatible = "jedec,spi-nor", "n25q128a11";
149 #address-cells = <1>;
150 #size-cells = <1>;
151 reg = <0>;
152 spi-max-frequency = <24000000>;
153
154 partitions {
155 compatible = "fixed-partitions";
156 #address-cells = <1>;
157 #size-cells = <1>;
158
159 partition@0 {
160 label = "0:SBL1";
161 reg = <0x0 0x40000>;
162 read-only;
163 };
164
165 partition@40000 {
166 label = "0:MIBIB";
167 reg = <0x40000 0x20000>;
168 read-only;
169 };
170
171 partition@60000 {
172 label = "0:QSEE";
173 reg = <0x60000 0x60000>;
174 read-only;
175 };
176
177 partition@c0000 {
178 label = "0:CDT";
179 reg = <0xc0000 0x10000>;
180 read-only;
181 };
182
183 partition@d0000 {
184 label = "0:DDRPARAMS";
185 reg = <0xd0000 0x10000>;
186 read-only;
187 };
188
189 partition@e0000 {
190 label = "0:APPSBLENV";
191 reg = <0xe0000 0x10000>;
192 read-only;
193 };
194
195 partition@f0000 {
196 label = "0:APPSBL";
197 reg = <0xf0000 0xc0000>;
198 read-only;
199 };
200
201 partition@1b0000 {
202 label = "0:reserved1";
203 reg = <0x1b0000 0x50000>;
204 read-only;
205 };
206 };
207 };
208 };
209
210 &blsp1_uart1 {
211 pinctrl-0 = <&serial_pins>;
212 pinctrl-names = "default";
213 status = "okay";
214 };
215
216 &cryptobam {
217 status = "okay";
218 };
219
220 &nand {
221 pinctrl-0 = <&nand_pins>;
222 pinctrl-names = "default";
223 status = "okay";
224
225 nand@0 {
226 partitions {
227 compatible = "fixed-partitions";
228 #address-cells = <1>;
229 #size-cells = <1>;
230
231 partition@0 {
232 label = "fota-flag";
233 reg = <0x0 0xa0000>;
234 read-only;
235 };
236
237 partition@a0000 {
238 label = "ART";
239 reg = <0xa0000 0x80000>;
240 read-only;
241 compatible = "nvmem-cells";
242 #address-cells = <1>;
243 #size-cells = <1>;
244
245 precal_art_1000: precal@1000 {
246 reg = <0x1000 0x2f20>;
247 };
248
249 precal_art_5000: precal@5000 {
250 reg = <0x5000 0x2f20>;
251 };
252 };
253
254 partition@120000 {
255 label = "mac";
256 reg = <0x120000 0x80000>;
257 read-only;
258 compatible = "nvmem-cells";
259 #address-cells = <1>;
260 #size-cells = <1>;
261
262 macaddr_config_0: macaddr@0 {
263 reg = <0x0 0x6>;
264 };
265 };
266
267 partition@1a0000 {
268 label = "reserved2";
269 reg = <0x1a0000 0xc0000>;
270 read-only;
271 };
272
273 partition@260000 {
274 label = "cfg-param";
275 reg = <0x260000 0x400000>;
276 read-only;
277 };
278
279 partition@660000 {
280 label = "log";
281 reg = <0x660000 0x400000>;
282 };
283
284 partition@a60000 {
285 label = "oops";
286 reg = <0xa60000 0xa0000>;
287 };
288
289 partition@b00000 {
290 label = "reserved3";
291 reg = <0xb00000 0x500000>;
292 read-only;
293 };
294
295 partition@1000000 {
296 label = "web";
297 reg = <0x1000000 0x800000>;
298 };
299
300 partition@1800000 {
301 label = "rootfs";
302 reg = <0x1800000 0x1d00000>;
303 };
304
305 partition@3500000 {
306 label = "data";
307 reg = <0x3500000 0x1900000>;
308 };
309
310 partition@4e00000 {
311 label = "fota";
312 reg = <0x4e00000 0x3200000>;
313 };
314 };
315 };
316 };
317
318 &qpic_bam {
319 status = "okay";
320 };
321
322 &tlmm {
323 i2c_0_pins: i2c_0_pinmux {
324 mux {
325 pins = "gpio20", "gpio21";
326 function = "blsp_i2c0";
327 bias-disable;
328 };
329 };
330
331 mdio_pins: mdio_pinmux {
332 mux_1 {
333 pins = "gpio6";
334 function = "mdio";
335 bias-pull-up;
336 };
337
338 mux_2 {
339 pins = "gpio7";
340 function = "mdc";
341 bias-pull-up;
342 };
343 };
344
345 nand_pins: nand_pins {
346 pullups {
347 pins = "gpio52", "gpio53", "gpio58",
348 "gpio59";
349 function = "qpic";
350 bias-pull-up;
351 };
352
353 pulldowns {
354 pins = "gpio54", "gpio55", "gpio56",
355 "gpio57", "gpio60",
356 "gpio62", "gpio63", "gpio64",
357 "gpio65", "gpio66", "gpio67",
358 "gpio69";
359 function = "qpic";
360 bias-pull-down;
361 };
362 };
363
364 serial_pins: serial_pinmux {
365 mux {
366 pins = "gpio16", "gpio17";
367 function = "blsp_uart0";
368 bias-disable;
369 };
370 };
371
372 spi_0_pins: spi_0_pinmux {
373 pinmux {
374 function = "blsp_spi0";
375 pins = "gpio13", "gpio14", "gpio15";
376 drive-strength = <12>;
377 bias-disable;
378 };
379
380 pinmux_cs {
381 function = "gpio";
382 pins = "gpio12";
383 drive-strength = <2>;
384 bias-disable;
385 output-high;
386 };
387 };
388 };
389
390 &usb2_hs_phy {
391 status = "okay";
392 };
393
394 &usb3_ss_phy {
395 status = "okay";
396 };
397
398 &usb3_hs_phy {
399 status = "okay";
400 };
401
402 &wifi0 {
403 status = "okay";
404 nvmem-cell-names = "pre-calibration", "mac-address";
405 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>;
406 mac-address-increment = <2>;
407 qcom,ath10k-calibration-variant = "zte,mf286d";
408 };
409
410 &wifi1 {
411 status = "okay";
412 nvmem-cell-names = "pre-calibration", "mac-address";
413 nvmem-cells = <&precal_art_5000>, <&macaddr_config_0>;
414 mac-address-increment = <3>;
415 qcom,ath10k-calibration-variant = "zte,mf286d";
416 };