1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2017-2020, Sven Eckelmann <sven@narfation.org>
3 * Copyright (c) 2018, Marek Lindner <marek.lindner@kaiwoo.ai>
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/soc/qcom,tcsr.h>
12 model = "Plasma Cloud PA2200";
13 compatible = "plasmacloud,pa2200";
21 compatible = "qcom,tcsr";
22 reg = <0x1949000 0x100>;
23 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
27 compatible = "qcom,tcsr";
28 reg = <0x1953000 0x1000>;
29 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
33 compatible = "qcom,tcsr";
34 reg = <0x1957000 0x100>;
35 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
48 compatible = "gpio-keys";
52 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
53 linux,code = <KEY_RESTART >;
58 led-boot = &led_power_orange;
59 led-failsafe = &led_status_blue;
60 led-running = &led_power_orange;
61 led-upgrade = &led_status_blue;
62 label-mac-device = &swport4;
66 compatible = "gpio-leds";
68 led_power_orange: power_orange {
69 label = "orange:power";
70 gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
75 gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
76 linux,default-trigger = "phy1tpt";
81 gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
82 linux,default-trigger = "phy0tpt";
87 gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
88 linux,default-trigger = "phy2tpt";
91 led_status_blue: status_blue {
92 label = "blue:status";
93 gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
99 serial_pins: serial_pinmux {
101 pins = "gpio16", "gpio17";
102 function = "blsp_uart0";
107 spi_0_pins: spi_0_pinmux {
109 function = "blsp_spi0";
110 pins = "gpio13", "gpio14", "gpio15";
111 drive-strength = <12>;
117 drive-strength = <2>;
129 pinctrl-0 = <&spi_0_pins>;
130 pinctrl-names = "default";
132 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
135 #address-cells = <1>;
137 compatible = "jedec,spi-nor";
139 spi-max-frequency = <24000000>;
141 /* partitions are passed via bootloader */
144 compatible = "nvmem-cells";
145 #address-cells = <1>;
149 precal_art_1000: precal@1000 {
150 reg = <0x1000 0x2f20>;
153 precal_art_5000: precal@5000 {
154 reg = <0x5000 0x2f20>;
157 precal_art_9000: precal@9000 {
158 reg = <0x9000 0x2f20>;
161 macaddr_gmac0: macaddr@0 {
165 macaddr_gmac1: macaddr@6 {
174 pinctrl-0 = <&serial_pins>;
175 pinctrl-names = "default";
185 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
186 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
189 reg = <0x00000000 0 0 0 0>;
190 #address-cells = <3>;
195 compatible = "qcom,ath10k";
197 reg = <0x00010000 0 0 0 0>;
198 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
199 ieee80211-freq-limit = <5170000 5350000>;
201 nvmem-cell-names = "pre-calibration";
202 nvmem-cells = <&precal_art_9000>;
223 nvmem-cell-names = "mac-address";
224 nvmem-cells = <&macaddr_gmac0>;
231 nvmem-cell-names = "mac-address";
232 nvmem-cells = <&macaddr_gmac1>;
237 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
239 nvmem-cell-names = "pre-calibration";
240 nvmem-cells = <&precal_art_1000>;
245 qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200";
246 ieee80211-freq-limit = <5470000 5875000>;
248 nvmem-cell-names = "pre-calibration";
249 nvmem-cells = <&precal_art_5000>;