1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/leds/common.h>
11 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
16 led-failsafe = &led_sys;
17 led-running = &led_sys;
18 led-upgrade = &led_sys;
19 label-mac-device = &gmac0;
29 pinctrl-0 = <&mdio_pins>;
30 pinctrl-names = "default";
38 compatible = "qcom,tcsr";
39 reg = <0x1949000 0x100>;
40 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
44 compatible = "qcom,tcsr";
45 reg = <0x194b000 0x100>;
46 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
50 compatible = "qcom,tcsr";
51 reg = <0x1953000 0x1000>;
52 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
56 compatible = "qcom,tcsr";
57 reg = <0x1957000 0x100>;
58 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
87 compatible = "gpio-leds";
91 gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
92 color = <LED_COLOR_ID_BLUE>;
93 function = LED_FUNCTION_POWER;
97 label = "blue:wlan2g";
98 gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
99 linux,default-trigger = "phy0tpt";
100 color = <LED_COLOR_ID_BLUE>;
101 function = LED_FUNCTION_WLAN;
102 function-enumerator = <0>;
106 label = "blue:wlan5g";
107 gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
108 linux,default-trigger = "phy1tpt";
109 color = <LED_COLOR_ID_BLUE>;
110 function = LED_FUNCTION_WLAN;
111 function-enumerator = <1>;
116 compatible = "gpio-keys";
120 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
121 linux,code = <KEY_RESTART>;
135 compatible = "jedec,spi-nor";
136 spi-max-frequency = <24000000>;
139 compatible = "fixed-partitions";
140 #address-cells = <1>;
151 reg = <0x40000 0x20000>;
157 reg = <0x60000 0x60000>;
163 reg = <0xc0000 0x10000>;
169 reg = <0xd0000 0x10000>;
175 reg = <0xe0000 0x10000>;
181 reg = <0xf0000 0x80000>;
187 reg = <0x170000 0x10000>;
189 compatible = "nvmem-cells";
190 #address-cells = <1>;
193 precal_art_1000: precal@1000 {
194 reg = <0x1000 0x2f20>;
197 precal_art_5000: precal@5000 {
198 reg = <0x5000 0x2f20>;
210 compatible = "fixed-partitions";
211 #address-cells = <1>;
214 nand_rootfs: partition@0 {
216 /* reg defined in 64M/128M variant dts. */
223 pinctrl-0 = <&serial_0_pins>;
224 pinctrl-names = "default";
234 pinctrl-names = "default";
235 pinctrl-0 = <&pcie_pins>;
236 perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
237 wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
239 /* Free slot for use */
241 reg = <0x00000000 0 0 0 0>;
242 #address-cells = <3>;
253 pinctrl-0 = <&sd_0_pins>;
254 pinctrl-names = "default";
255 vqmmc-supply = <&vqmmc>;
260 pcie_pins: pcie_pinmux {
269 mdio_pins: mdio_pinmux {
283 sd_0_pins: sd_0_pinmux {
285 pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
287 drive-strength = <10>;
293 drive-strength = <16>;
297 serial_0_pins: serial0-pinmux {
299 pins = "gpio16", "gpio17";
300 function = "blsp_uart0";
307 qcom,single-led-1000;
313 qcom,single-led-1000;
319 qcom,single-led-1000;
325 qcom,single-led-1000;
331 qcom,single-led-1000;
354 nvmem-cell-names = "pre-calibration";
355 nvmem-cells = <&precal_art_1000>;
356 qcom,ath10k-calibration-variant = "P&W R619AC";
361 nvmem-cell-names = "pre-calibration";
362 nvmem-cells = <&precal_art_5000>;
363 qcom,ath10k-calibration-variant = "P&W R619AC";