ipq40xx: rename RT-AC42U WLAN/LAN LEDs
[openwrt/staging/jow.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-rt-ac42u.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 model = "ASUS RT-AC42U";
11 compatible = "asus,rt-ac42u";
12
13 memory {
14 device_type = "memory";
15 reg = <0x80000000 0x10000000>; /* 256MB */
16 };
17
18 aliases {
19 led-boot = &led_power;
20 led-failsafe = &led_power;
21 led-running = &led_power;
22 led-upgrade = &led_power;
23 };
24
25 soc {
26 rng@22000 {
27 status = "okay";
28 };
29
30 mdio@90000 {
31 status = "okay";
32 };
33
34 ess-psgmii@98000 {
35 status = "okay";
36 };
37
38 tcsr@1949000 {
39 compatible = "qcom,tcsr";
40 reg = <0x1949000 0x100>;
41 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
42 };
43
44 tcsr@194b000 {
45 compatible = "qcom,tcsr";
46 reg = <0x194b000 0x100>;
47 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
48 };
49
50 ess_tcsr@1953000 {
51 compatible = "qcom,tcsr";
52 reg = <0x1953000 0x1000>;
53 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
54 };
55
56 tcsr@1957000 {
57 compatible = "qcom,tcsr";
58 reg = <0x1957000 0x100>;
59 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
60 };
61
62 usb3@8af8800 {
63 status = "okay";
64
65 dwc3@8a00000 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68
69 usb3_port1: port@1 {
70 reg = <1>;
71 #trigger-source-cells = <0>;
72 };
73
74 usb3_port2: port@2 {
75 reg = <2>;
76 #trigger-source-cells = <0>;
77 };
78 };
79 };
80
81 crypto@8e3a000 {
82 status = "okay";
83 };
84
85 watchdog@b017000 {
86 status = "okay";
87 };
88
89 ess-switch@c000000 {
90 status = "okay";
91 };
92
93 edma@c080000 {
94 status = "okay";
95 };
96 };
97
98 keys {
99 compatible = "gpio-keys";
100
101 reset {
102 label = "reset";
103 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
104 linux,code = <KEY_RESTART>;
105 };
106
107 wps {
108 label = "wps";
109 gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
110 linux,code = <KEY_WPS_BUTTON>;
111 };
112 };
113
114 leds {
115 compatible = "gpio-leds";
116
117 led_power: led-0 {
118 color = <LED_COLOR_ID_BLUE>;
119 function = LED_FUNCTION_STATUS;
120 gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
121 label = "blue:status";
122 };
123
124 led-1 {
125 color = <LED_COLOR_ID_BLUE>;
126 function = LED_FUNCTION_WAN;
127 gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
128 linux,default-trigger = "90000.mdio-1:04:link";
129 };
130
131 led-2 {
132 color = <LED_COLOR_ID_RED>;
133 function = LED_FUNCTION_WAN;
134 gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
135 linux,default-trigger = "none";
136 };
137
138 led-3 {
139 color = <LED_COLOR_ID_BLUE>;
140 function = LED_FUNCTION_WLAN;
141 function-enumerator = <0>;
142 gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
143 linux,default-trigger = "phy1tpt";
144 };
145
146 led-4 {
147 color = <LED_COLOR_ID_BLUE>;
148 function = LED_FUNCTION_WLAN;
149 function-enumerator = <1>;
150 gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
151 linux,default-trigger = "phy0tpt";
152 };
153
154 led-5 {
155 color = <LED_COLOR_ID_BLUE>;
156 function = LED_FUNCTION_LAN;
157 function-enumerator = <1>;
158 gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
159 };
160
161 led-6 {
162 color = <LED_COLOR_ID_BLUE>;
163 function = LED_FUNCTION_LAN;
164 function-enumerator = <2>;
165 gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
166 };
167
168 led-7 {
169 color = <LED_COLOR_ID_BLUE>;
170 function = LED_FUNCTION_LAN;
171 function-enumerator = <3>;
172 gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
173 };
174
175 led-8 {
176 color = <LED_COLOR_ID_BLUE>;
177 function = LED_FUNCTION_LAN;
178 function-enumerator = <4>;
179 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
180 };
181 };
182 };
183
184 &cryptobam {
185 status = "okay";
186 };
187
188 &blsp_dma {
189 status = "okay";
190 };
191
192 &qpic_bam {
193 status = "okay";
194 };
195
196 &tlmm {
197 serial_0_pins: serial0_pinmux {
198 mux {
199 pins = "gpio16", "gpio17";
200 function = "blsp_uart0";
201 bias-disable;
202 };
203 };
204
205 nand_pins: nand_pins {
206 pullups {
207 pins = "gpio53", "gpio58", "gpio59";
208 function = "qpic";
209 bias-pull-up;
210 };
211
212 pulldowns {
213 pins = "gpio55", "gpio56", "gpio57", "gpio60",
214 "gpio62", "gpio63", "gpio64", "gpio65",
215 "gpio66", "gpio67", "gpio69";
216 function = "qpic";
217 bias-pull-down;
218 };
219 };
220 };
221
222 &blsp1_uart1 {
223 pinctrl-0 = <&serial_0_pins>;
224 pinctrl-names = "default";
225 status = "okay";
226 };
227
228 &nand {
229 pinctrl-0 = <&nand_pins>;
230 pinctrl-names = "default";
231 status = "okay";
232
233 nand@0 {
234 partitions {
235 compatible = "fixed-partitions";
236 #address-cells = <1>;
237 #size-cells = <1>;
238
239 partition@0 {
240 label = "SBL1";
241 reg = <0x00000000 0x00080000>;
242 read-only;
243 };
244 partition@80000 {
245 label = "MIBIB";
246 reg = <0x00080000 0x00080000>;
247 read-only;
248 };
249 partition@100000 {
250 label = "QSEE";
251 reg = <0x00100000 0x00100000>;
252 read-only;
253 };
254 partition@200000 {
255 label = "CDT";
256 reg = <0x00200000 0x00080000>;
257 read-only;
258 };
259 partition@280000 {
260 label = "APPSBL";
261 reg = <0x00280000 0x00140000>;
262 read-only;
263 };
264 partition@3C0000 {
265 label = "APPSBLENV";
266 reg = <0x003C0000 0x00040000>;
267 read-only;
268 };
269 partition@400000 {
270 label = "ubi";
271 reg = <0x00400000 0x07C00000>;
272 };
273 };
274 };
275 };
276
277 &usb3_ss_phy {
278 status = "okay";
279 };
280
281 &usb3_hs_phy {
282 status = "okay";
283 };
284
285 &wifi0 {
286 status = "okay";
287 qcom,ath10k-calibration-variant = "ASUS-RT-AC42U";
288 };
289
290 &pcie0 {
291 status = "okay";
292 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
293 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
294 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
295
296 bridge@0,0 {
297 reg = <0x00000000 0 0 0 0>;
298 #address-cells = <3>;
299 #size-cells = <2>;
300 ranges;
301
302 wifi2: wifi@1,0 {
303 compatible = "qcom,ath10k";
304 reg = <0x00010000 0 0 0 0>;
305
306 qcom,ath10k-calibration-variant = "ASUS-RT-AC42U";
307 };
308 };
309 };