1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
3 * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include "qcom-ipq4019.dtsi"
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/soc/qcom,tcsr.h>
25 model = "Compex WPJ428";
26 compatible = "compex,wpj428";
35 pinctrl-0 = <&mdio_pins>;
36 pinctrl-names = "default";
37 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
38 reset-delay-us = <2000>;
43 compatible = "qcom,tcsr";
44 reg = <0x194b000 0x100>;
45 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
50 compatible = "qcom,tcsr";
51 reg = <0x1949000 0x100>;
52 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
56 compatible = "qcom,tcsr";
57 reg = <0x1953000 0x1000>;
58 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
62 compatible = "qcom,tcsr";
63 reg = <0x1957000 0x100>;
64 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
85 compatible = "gpio-keys";
89 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
90 linux,code = <KEY_RESTART>;
96 led-failsafe = &status;
97 led-upgrade = &status;
101 compatible = "gpio-leds";
104 label = "green:rss4";
105 gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
109 label = "green:rss3";
110 gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
115 compatible = "gpio-beeper";
116 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
121 mdio_pins: mdio_pinmux {
135 serial_pins: serial_pinmux {
137 pins = "gpio60", "gpio61";
138 function = "blsp_uart0";
143 spi_0_pins: spi_0_pinmux {
145 function = "blsp_spi0";
146 pins = "gpio55", "gpio56", "gpio57";
147 drive-strength = <12>;
153 drive-strength = <2>;
165 pinctrl-0 = <&spi_0_pins>;
166 pinctrl-names = "default";
168 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
171 compatible = "jedec,spi-nor";
173 spi-max-frequency = <24000000>;
176 compatible = "fixed-partitions";
177 #address-cells = <1>;
182 reg = <0x00000000 0x00040000>;
187 reg = <0x00040000 0x00020000>;
192 reg = <0x00060000 0x00060000>;
197 reg = <0x000c0000 0x00010000>;
201 label = "0:DDRPARAMS";
202 reg = <0x000d0000 0x00010000>;
206 label = "0:APPSBLENV"; /* uboot env*/
207 reg = <0x000e0000 0x00010000>;
211 label = "0:APPSBL"; /* uboot */
212 reg = <0x000f0000 0x00080000>;
217 reg = <0x00170000 0x00010000>;
219 compatible = "nvmem-cells";
220 #address-cells = <1>;
223 precal_art_1000: precal@1000 {
224 reg = <0x1000 0x2f20>;
227 precal_art_5000: precal@5000 {
228 reg = <0x5000 0x2f20>;
232 compatible = "denx,fit";
234 reg = <0x00180000 0x01e80000>;
241 pinctrl-0 = <&serial_pins>;
242 pinctrl-names = "default";
264 nvmem-cell-names = "pre-calibration";
265 nvmem-cells = <&precal_art_1000>;
270 nvmem-cell-names = "pre-calibration";
271 nvmem-cells = <&precal_art_5000>;