target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  *
   3  * Permission to use, copy, modify, and/or distribute this software for any
   4  * purpose with or without fee is hereby granted, provided that the above
   5  * copyright notice and this permission notice appear in all copies.
   6  *
   7  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   8  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   9  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14  *
  15  */
  16
  17 #include "qcom-ipq4019.dtsi"
  18 #include <dt-bindings/gpio/gpio.h>
  19 #include <dt-bindings/input/input.h>
  20 #include <dt-bindings/soc/qcom,tcsr.h>
  21
  22 / {
  23         model = "GL.iNet GL-B1300";
  24         compatible = "glinet,gl-b1300";
  25
  26         aliases {
  27                 led-boot = &power;
  28                 led-failsafe = &power;
  29                 led-running = &power;
  30                 led-upgrade = &power;
  31         };
  32
  33         memory {
  34                 device_type = "memory";
  35                 reg = <0x80000000 0x10000000>;
  36         };
  37
  38         soc {
  39                 rng@22000 {
  40                         status = "okay";
  41                 };
  42
  43                 mdio@90000 {
  44                         status = "okay";
  45                 };
  46
  47                 tcsr@1949000 {
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x1949000 0x100>;
  50                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  51                 };
  52
  53                 tcsr@194b000 {
  54                         /* select hostmode */
  55                         compatible = "qcom,tcsr";
  56                         reg = <0x194b000 0x100>;
  57                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  58                         status = "okay";
  59                 };
  60
  61                 ess_tcsr@1953000 {
  62                         compatible = "qcom,tcsr";
  63                         reg = <0x1953000 0x1000>;
  64                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  65                 };
  66
  67                 tcsr@1957000 {
  68                         compatible = "qcom,tcsr";
  69                         reg = <0x1957000 0x100>;
  70                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  71                 };
  72
  73                 usb2@60f8800 {
  74                         status = "okay";
  75                 };
  76
  77                 usb3@8af8800 {
  78                         status = "okay";
  79                 };
  80
  81                 crypto@8e3a000 {
  82                         status = "okay";
  83                 };
  84
  85                 watchdog@b017000 {
  86                         status = "okay";
  87                 };
  88         };
  89
  90         keys {
  91                 compatible = "gpio-keys";
  92
  93                 wps {
  94                         label = "wps";
  95                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  96                         linux,code = <KEY_WPS_BUTTON>;
  97                 };
  98
  99                 reset {
 100                         label = "reset";
 101                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
 102                         linux,code = <KEY_RESTART>;
 103                 };
 104         };
 105
 106         leds {
 107                 compatible = "gpio-leds";
 108
 109                 power: power {
 110                         label = "green:power";
 111                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 112                         default-state = "on";
 113                 };
 114
 115                 mesh {
 116                         label = "green:mesh";
 117                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
 118                 };
 119
 120                 wlan {
 121                         label = "green:wlan";
 122                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
 123                 };
 124         };
 125 };
 126
 127 &blsp_dma {
 128         status = "okay";
 129 };
 130
 131 &cryptobam {
 132         status = "okay";
 133 };
 134
 135 &blsp1_spi1 {
 136         pinctrl-0 = <&spi_0_pins>;
 137         pinctrl-names = "default";
 138         status = "okay";
 139         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 140
 141         mx25l25635f@0 {
 142                 compatible = "jedec,spi-nor";
 143                 reg = <0>;
 144                 spi-max-frequency = <24000000>;
 145
 146                 partitions {
 147                         compatible = "fixed-partitions";
 148                         #address-cells = <1>;
 149                         #size-cells = <1>;
 150
 151                         SBL1@0 {
 152                                 label = "SBL1";
 153                                 reg = <0x0 0x40000>;
 154                                 read-only;
 155                         };
 156
 157                         MIBIB@40000 {
 158                                 label = "MIBIB";
 159                                 reg = <0x40000 0x20000>;
 160                                 read-only;
 161                         };
 162
 163                         QSEE@60000 {
 164                                 label = "QSEE";
 165                                 reg = <0x60000 0x60000>;
 166                                 read-only;
 167                         };
 168
 169                         CDT@c0000 {
 170                                 label = "CDT";
 171                                 reg = <0xc0000 0x10000>;
 172                                 read-only;
 173                         };
 174
 175                         DDRPARAMS@d0000 {
 176                                 label = "DDRPARAMS";
 177                                 reg = <0xd0000 0x10000>;
 178                                 read-only;
 179                         };
 180
 181                         APPSBLENV@e0000 {
 182                                 label = "APPSBLENV";
 183                                 reg = <0xe0000 0x10000>;
 184                                 read-only;
 185                         };
 186
 187                         APPSBL@f0000 {
 188                                 label = "APPSBL";
 189                                 reg = <0xf0000 0x80000>;
 190                                 read-only;
 191                         };
 192
 193                         ART@170000 {
 194                                 label = "ART";
 195                                 reg = <0x170000 0x10000>;
 196                                 read-only;
 197                                 compatible = "nvmem-cells";
 198                                 #address-cells = <1>;
 199                                 #size-cells = <1>;
 200
 201                                 precal_art_1000: precal@1000 {
 202                                         reg = <0x1000 0x2f20>;
 203                                 };
 204
 205                                 precal_art_5000: precal@5000 {
 206                                         reg = <0x5000 0x2f20>;
 207                                 };
 208                         };
 209
 210                         firmware@180000 {
 211                                 compatible = "denx,fit";
 212                                 label = "firmware";
 213                                 reg = <0x180000 0x1e80000>;
 214                         };
 215                 };
 216         };
 217 };
 218
 219 &blsp1_uart1 {
 220         pinctrl-0 = <&serial_pins>;
 221         pinctrl-names = "default";
 222         status = "okay";
 223 };
 224
 225 &tlmm {
 226         serial_pins: serial_pinmux {
 227                 mux {
 228                         pins = "gpio60", "gpio61";
 229                         function = "blsp_uart0";
 230                         bias-disable;
 231                 };
 232         };
 233
 234         spi_0_pins: spi_0_pinmux {
 235                 pinmux {
 236                         function = "blsp_spi0";
 237                         pins = "gpio55", "gpio56", "gpio57";
 238                 };
 239                 pinmux_cs {
 240                         function = "gpio";
 241                         pins = "gpio54";
 242                 };
 243                 pinconf {
 244                         pins = "gpio55", "gpio56", "gpio57";
 245                         drive-strength = <12>;
 246                         bias-disable;
 247                 };
 248                 pinconf_cs {
 249                         pins = "gpio54";
 250                         drive-strength = <2>;
 251                         bias-disable;
 252                         output-high;
 253                 };
 254         };
 255 };
 256
 257 &usb2_hs_phy {
 258         status = "okay";
 259 };
 260
 261 &usb3_hs_phy {
 262         status = "okay";
 263 };
 264
 265 &usb3_ss_phy {
 266         status = "okay";
 267 };
 268
 269 &wifi0 {
 270         status = "okay";
 271         nvmem-cell-names = "pre-calibration";
 272         nvmem-cells = <&precal_art_1000>;
 273         qcom,ath10k-calibration-variant = "GL-B1300";
 274 };
 275
 276 &wifi1 {
 277         status = "okay";
 278         nvmem-cell-names = "pre-calibration";
 279         nvmem-cells = <&precal_art_5000>;
 280         qcom,ath10k-calibration-variant = "GL-B1300";
 281 };