1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for Meraki "Insect" series
5 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
8 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
15 #include "qcom-ipq4019.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19 #include <dt-bindings/leds/common.h>
23 led-boot = &status_green;
24 led-failsafe = &status_red;
25 led-running = &status_green;
26 led-upgrade = &power_orange;
29 /* Do we really need this defined? */
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>;
42 pinctrl-0 = <&mdio_pins>;
43 pinctrl-names = "default";
46 /* It is a 56-bit counter that supplies the count to the ARM arch
47 timers and without upstream driver */
49 compatible = "qcom,qca-gcnt";
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
60 compatible = "qcom,tcsr";
61 reg = <0x1949000 0x100>;
62 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
66 compatible = "qcom,tcsr";
67 reg = <0x1957000 0x100>;
68 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
72 pinctrl-0 = <&serial_1_pins>;
73 pinctrl-names = "default";
77 compatible = "ti,cc2650";
78 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
91 switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
92 switch_lan_bmp = <0x0>; /* lan port bitmap */
93 switch_wan_bmp = <0x10>; /* wan port bitmap */
99 phy-mode = "rgmii-rxid";
105 compatible = "gpio-keys";
109 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
110 linux,code = <KEY_RESTART>;
115 compatible = "gpio-leds";
117 power_orange: power {
118 label = "orange:power";
119 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
130 pinctrl-0 = <&serial_0_pins>;
131 pinctrl-names = "default";
140 qcom,phy_mdio_addr = <1>;
141 qcom,poll_required = <1>;
146 pinctrl-0 = <&i2c_0_pins>;
147 pinctrl-names = "default";
150 compatible = "atmel,24c64";
153 read-only; /* This holds our MAC & Meraki board-data */
158 pinctrl-0 = <&i2c_1_pins>;
159 pinctrl-names = "default";
162 tricolor: led-controller@30 {
163 compatible = "ti,lp5562";
165 clock-mode = /bits/8 <2>;
166 #address-cells = <1>;
171 chan-name = "red:status";
172 led-cur = /bits/ 8 <0x20>;
173 max-cur = /bits/ 8 <0x60>;
175 color = <LED_COLOR_ID_RED>;
178 status_green: chan@1 {
179 chan-name = "green:status";
180 led-cur = /bits/ 8 <0x20>;
181 max-cur = /bits/ 8 <0x60>;
183 color = <LED_COLOR_ID_GREEN>;
187 chan-name = "blue:status";
188 led-cur = /bits/ 8 <0x20>;
189 max-cur = /bits/ 8 <0x60>;
191 color = <LED_COLOR_ID_BLUE>;
195 chan-name = "white:status";
196 led-cur = /bits/ 8 <0x20>;
197 max-cur = /bits/ 8 <0x60>;
199 color = <LED_COLOR_ID_WHITE>;
205 pinctrl-0 = <&nand_pins>;
206 pinctrl-names = "default";
211 compatible = "fixed-partitions";
212 #address-cells = <1>;
217 reg = <0x00000000 0x00100000>;
222 reg = <0x00100000 0x00100000>;
226 label = "bootconfig";
227 reg = <0x00200000 0x00100000>;
232 reg = <0x00300000 0x00100000>;
237 reg = <0x00400000 0x00100000>;
242 reg = <0x00500000 0x00080000>;
247 reg = <0x00580000 0x00080000>;
252 reg = <0x00600000 0x00080000>;
257 reg = <0x00700000 0x00200000>;
261 label = "u-boot-backup";
262 reg = <0x00900000 0x00200000>;
267 reg = <0x00b00000 0x00080000>;
272 reg = <0x00c00000 0x07000000>;
274 * Do not try to allocate the remaining
275 * 4 MiB to this ubi partition. It will
276 * confuse the u-boot and it might not
277 * find the kernel partition anymore.
286 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
287 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
290 reg = <0x00000000 0 0 0 0>;
291 #address-cells = <3>;
296 compatible = "qcom,ath10k";
298 reg = <0x00010000 0 0 0 0>;
309 * GPIO43 should be 0/1 whenever the unit is
310 * powered through PoE or AC-Adapter.
311 * That said, playing with this seems to
315 mdio_pins: mdio_pinmux {
328 serial_0_pins: serial_pinmux {
330 pins = "gpio16", "gpio17";
331 function = "blsp_uart0";
336 serial_1_pins: serial1_pinmux {
338 /* We use the i2c-0 pins for serial_1 */
339 pins = "gpio8", "gpio9";
340 function = "blsp_uart1";
345 i2c_0_pins: i2c_0_pinmux {
347 function = "blsp_i2c0";
348 pins = "gpio20", "gpio21";
351 pins = "gpio20", "gpio21";
352 drive-strength = <16>;
357 i2c_1_pins: i2c_1_pinmux {
359 function = "blsp_i2c1";
360 pins = "gpio34", "gpio35";
363 pins = "gpio34", "gpio35";
364 drive-strength = <16>;
369 nand_pins: nand_pins {
371 * There are 18 pins. 15 pins are common between LCD and NAND.
372 * The QPIC controller arbitrates between LCD and NAND. Of the
373 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
375 * The meraki source hints that the bluetooth module claims
376 * pin 52 as well. But sadly, there's no data whenever this
377 * is a NAND or LCD exclusive pin or not.
381 pins = "gpio52", "gpio53", "gpio58",
388 pins = "gpio54", "gpio55", "gpio56",
389 "gpio57", "gpio60", "gpio61",
390 "gpio62", "gpio63", "gpio64",
391 "gpio65", "gpio66", "gpio67",
401 qcom,ath10k-calibration-variant = "Meraki-MR33";
406 qcom,ath10k-calibration-variant = "Meraki-MR33";