ipq40xx: add support for Meraki MR74
[openwrt/staging/wigyori.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4029-insect-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Device Tree Source for Meraki "Insect" series
4 *
5 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
7 *
8 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15 #include "qcom-ipq4019.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19 #include <dt-bindings/leds/common.h>
20
21 / {
22 aliases {
23 led-boot = &status_green;
24 led-failsafe = &status_red;
25 led-running = &status_green;
26 led-upgrade = &power_orange;
27 };
28
29 /* Do we really need this defined? */
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>;
33 };
34
35 soc {
36 rng@22000 {
37 status = "okay";
38 };
39
40 mdio@90000 {
41 status = "okay";
42 pinctrl-0 = <&mdio_pins>;
43 pinctrl-names = "default";
44 };
45
46 /* It is a 56-bit counter that supplies the count to the ARM arch
47 timers and without upstream driver */
48 counter@4a1000 {
49 compatible = "qcom,qca-gcnt";
50 reg = <0x4a1000 0x4>;
51 };
52
53 ess_tcsr@1953000 {
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
57 };
58
59 tcsr@1949000 {
60 compatible = "qcom,tcsr";
61 reg = <0x1949000 0x100>;
62 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
63 };
64
65 tcsr@1957000 {
66 compatible = "qcom,tcsr";
67 reg = <0x1957000 0x100>;
68 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
69 };
70
71 serial@78b0000 {
72 pinctrl-0 = <&serial_1_pins>;
73 pinctrl-names = "default";
74 status = "okay";
75
76 bluetooth {
77 compatible = "ti,cc2650";
78 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 crypto@8e3a000 {
83 status = "okay";
84 };
85
86 watchdog@b017000 {
87 status = "okay";
88 };
89
90 ess-switch@c000000 {
91 switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
92 switch_lan_bmp = <0x0>; /* lan port bitmap */
93 switch_wan_bmp = <0x10>; /* wan port bitmap */
94 };
95
96 edma@c080000 {
97 qcom,single-phy;
98 qcom,num_gmac = <1>;
99 phy-mode = "rgmii-rxid";
100 status = "okay";
101 };
102 };
103
104 keys {
105 compatible = "gpio-keys";
106
107 reset {
108 label = "reset";
109 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
110 linux,code = <KEY_RESTART>;
111 };
112 };
113
114 leds {
115 compatible = "gpio-leds";
116
117 power_orange: power {
118 label = "orange:power";
119 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
120 panic-indicator;
121 };
122 };
123 };
124
125 &blsp_dma {
126 status = "okay";
127 };
128
129 &blsp1_uart1 {
130 pinctrl-0 = <&serial_0_pins>;
131 pinctrl-names = "default";
132 status = "okay";
133 };
134
135 &cryptobam {
136 status = "okay";
137 };
138
139 &gmac0 {
140 qcom,phy_mdio_addr = <1>;
141 qcom,poll_required = <1>;
142 vlan_tag = <0 0x20>;
143 };
144
145 &blsp1_i2c3 {
146 pinctrl-0 = <&i2c_0_pins>;
147 pinctrl-names = "default";
148 status = "okay";
149 at24@50 {
150 compatible = "atmel,24c64";
151 pagesize = <32>;
152 reg = <0x50>;
153 read-only; /* This holds our MAC & Meraki board-data */
154 };
155 };
156
157 &blsp1_i2c4 {
158 pinctrl-0 = <&i2c_1_pins>;
159 pinctrl-names = "default";
160 status = "okay";
161
162 tricolor: led-controller@30 {
163 compatible = "ti,lp5562";
164 reg = <0x30>;
165 clock-mode = /bits/8 <2>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 /* RGB led */
170 status_red: chan@0 {
171 chan-name = "red:status";
172 led-cur = /bits/ 8 <0x20>;
173 max-cur = /bits/ 8 <0x60>;
174 reg = <0>;
175 color = <LED_COLOR_ID_RED>;
176 };
177
178 status_green: chan@1 {
179 chan-name = "green:status";
180 led-cur = /bits/ 8 <0x20>;
181 max-cur = /bits/ 8 <0x60>;
182 reg = <1>;
183 color = <LED_COLOR_ID_GREEN>;
184 };
185
186 chan@2 {
187 chan-name = "blue:status";
188 led-cur = /bits/ 8 <0x20>;
189 max-cur = /bits/ 8 <0x60>;
190 reg = <2>;
191 color = <LED_COLOR_ID_BLUE>;
192 };
193
194 chan@3 {
195 chan-name = "white:status";
196 led-cur = /bits/ 8 <0x20>;
197 max-cur = /bits/ 8 <0x60>;
198 reg = <3>;
199 color = <LED_COLOR_ID_WHITE>;
200 };
201 };
202 };
203
204 &nand {
205 pinctrl-0 = <&nand_pins>;
206 pinctrl-names = "default";
207 status = "okay";
208
209 nand@0 {
210 partitions {
211 compatible = "fixed-partitions";
212 #address-cells = <1>;
213 #size-cells = <1>;
214
215 partition@0 {
216 label = "sbl1";
217 reg = <0x00000000 0x00100000>;
218 read-only;
219 };
220 partition@100000 {
221 label = "mibib";
222 reg = <0x00100000 0x00100000>;
223 read-only;
224 };
225 partition@200000 {
226 label = "bootconfig";
227 reg = <0x00200000 0x00100000>;
228 read-only;
229 };
230 partition@300000 {
231 label = "qsee";
232 reg = <0x00300000 0x00100000>;
233 read-only;
234 };
235 partition@400000 {
236 label = "qsee_alt";
237 reg = <0x00400000 0x00100000>;
238 read-only;
239 };
240 partition@500000 {
241 label = "cdt";
242 reg = <0x00500000 0x00080000>;
243 read-only;
244 };
245 partition@580000 {
246 label = "cdt_alt";
247 reg = <0x00580000 0x00080000>;
248 read-only;
249 };
250 partition@600000 {
251 label = "ddrparams";
252 reg = <0x00600000 0x00080000>;
253 read-only;
254 };
255 partition@700000 {
256 label = "u-boot";
257 reg = <0x00700000 0x00200000>;
258 read-only;
259 };
260 partition@900000 {
261 label = "u-boot-backup";
262 reg = <0x00900000 0x00200000>;
263 read-only;
264 };
265 partition@b00000 {
266 label = "ART";
267 reg = <0x00b00000 0x00080000>;
268 read-only;
269 };
270 partition@c00000 {
271 label = "ubi";
272 reg = <0x00c00000 0x07000000>;
273 /*
274 * Do not try to allocate the remaining
275 * 4 MiB to this ubi partition. It will
276 * confuse the u-boot and it might not
277 * find the kernel partition anymore.
278 */
279 };
280 };
281 };
282 };
283
284 &pcie0 {
285 status = "okay";
286 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
287 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
288
289 bridge@0,0 {
290 reg = <0x00000000 0 0 0 0>;
291 #address-cells = <3>;
292 #size-cells = <2>;
293 ranges;
294
295 wifi2: wifi@1,0 {
296 compatible = "qcom,ath10k";
297 status = "okay";
298 reg = <0x00010000 0 0 0 0>;
299 };
300 };
301 };
302
303 &qpic_bam {
304 status = "okay";
305 };
306
307 &tlmm {
308 /*
309 * GPIO43 should be 0/1 whenever the unit is
310 * powered through PoE or AC-Adapter.
311 * That said, playing with this seems to
312 * reset the AP.
313 */
314
315 mdio_pins: mdio_pinmux {
316 mux_1 {
317 pins = "gpio6";
318 function = "mdio";
319 bias-pull-up;
320 };
321 mux_2 {
322 pins = "gpio7";
323 function = "mdc";
324 bias-pull-up;
325 };
326 };
327
328 serial_0_pins: serial_pinmux {
329 mux {
330 pins = "gpio16", "gpio17";
331 function = "blsp_uart0";
332 bias-disable;
333 };
334 };
335
336 serial_1_pins: serial1_pinmux {
337 mux {
338 /* We use the i2c-0 pins for serial_1 */
339 pins = "gpio8", "gpio9";
340 function = "blsp_uart1";
341 bias-disable;
342 };
343 };
344
345 i2c_0_pins: i2c_0_pinmux {
346 pinmux {
347 function = "blsp_i2c0";
348 pins = "gpio20", "gpio21";
349 };
350 pinconf {
351 pins = "gpio20", "gpio21";
352 drive-strength = <16>;
353 bias-disable;
354 };
355 };
356
357 i2c_1_pins: i2c_1_pinmux {
358 pinmux {
359 function = "blsp_i2c1";
360 pins = "gpio34", "gpio35";
361 };
362 pinconf {
363 pins = "gpio34", "gpio35";
364 drive-strength = <16>;
365 bias-disable;
366 };
367 };
368
369 nand_pins: nand_pins {
370 /*
371 * There are 18 pins. 15 pins are common between LCD and NAND.
372 * The QPIC controller arbitrates between LCD and NAND. Of the
373 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
374 *
375 * The meraki source hints that the bluetooth module claims
376 * pin 52 as well. But sadly, there's no data whenever this
377 * is a NAND or LCD exclusive pin or not.
378 */
379
380 pullups {
381 pins = "gpio52", "gpio53", "gpio58",
382 "gpio59";
383 function = "qpic";
384 bias-pull-up;
385 };
386
387 pulldowns {
388 pins = "gpio54", "gpio55", "gpio56",
389 "gpio57", "gpio60", "gpio61",
390 "gpio62", "gpio63", "gpio64",
391 "gpio65", "gpio66", "gpio67",
392 "gpio68", "gpio69";
393 function = "qpic";
394 bias-pull-down;
395 };
396 };
397 };
398
399 &wifi0 {
400 status = "okay";
401 qcom,ath10k-calibration-variant = "Meraki-MR33";
402 };
403
404 &wifi1 {
405 status = "okay";
406 qcom,ath10k-calibration-variant = "Meraki-MR33";
407 };