ipq40xx: Meraki MR33: convert MAC addresses to nvmem
[openwrt/staging/noltari.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4029-insect-common.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Device Tree Source for Meraki "Insect" series
4 *
5 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
6 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
7 *
8 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15 #include "qcom-ipq4019.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19 #include <dt-bindings/leds/common.h>
20
21 / {
22 aliases {
23 led-boot = &status_green;
24 led-failsafe = &status_red;
25 led-running = &status_green;
26 led-upgrade = &power_orange;
27 };
28
29 /* Do we really need this defined? */
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>;
33 };
34
35 soc {
36 rng@22000 {
37 status = "okay";
38 };
39
40 mdio@90000 {
41 status = "okay";
42 pinctrl-0 = <&mdio_pins>;
43 pinctrl-names = "default";
44 };
45
46 /* It is a 56-bit counter that supplies the count to the ARM arch
47 timers and without upstream driver */
48 counter@4a1000 {
49 compatible = "qcom,qca-gcnt";
50 reg = <0x4a1000 0x4>;
51 };
52
53 ess_tcsr@1953000 {
54 compatible = "qcom,tcsr";
55 reg = <0x1953000 0x1000>;
56 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
57 };
58
59 tcsr@1949000 {
60 compatible = "qcom,tcsr";
61 reg = <0x1949000 0x100>;
62 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
63 };
64
65 tcsr@1957000 {
66 compatible = "qcom,tcsr";
67 reg = <0x1957000 0x100>;
68 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
69 };
70
71 serial@78b0000 {
72 pinctrl-0 = <&serial_1_pins>;
73 pinctrl-names = "default";
74 status = "okay";
75
76 bluetooth {
77 compatible = "ti,cc2650";
78 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 crypto@8e3a000 {
83 status = "okay";
84 };
85
86 watchdog@b017000 {
87 status = "okay";
88 };
89 };
90
91 keys {
92 compatible = "gpio-keys";
93
94 reset {
95 label = "reset";
96 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_RESTART>;
98 };
99 };
100
101 leds {
102 compatible = "gpio-leds";
103
104 power_orange: power {
105 label = "orange:power";
106 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
107 panic-indicator;
108 };
109 };
110 };
111
112 &blsp_dma {
113 status = "okay";
114 };
115
116 &blsp1_uart1 {
117 pinctrl-0 = <&serial_0_pins>;
118 pinctrl-names = "default";
119 status = "okay";
120 };
121
122 &cryptobam {
123 status = "okay";
124 };
125
126 &blsp1_i2c3 {
127 pinctrl-0 = <&i2c_0_pins>;
128 pinctrl-names = "default";
129 status = "okay";
130
131 eeprom@50 {
132 compatible = "atmel,24c64";
133 pagesize = <32>;
134 reg = <0x50>;
135 read-only; /* This holds our MAC & Meraki board-data */
136 #address-cells = <1>;
137 #size-cells = <1>;
138
139 mac_address: mac-address@66 {
140 reg = <0x66 0x6>;
141 };
142 };
143 };
144
145 &blsp1_i2c4 {
146 pinctrl-0 = <&i2c_1_pins>;
147 pinctrl-names = "default";
148 status = "okay";
149
150 tricolor: led-controller@30 {
151 compatible = "ti,lp5562";
152 reg = <0x30>;
153 clock-mode = /bits/8 <2>;
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 /* RGB led */
158 status_red: chan@0 {
159 chan-name = "red:status";
160 led-cur = /bits/ 8 <0x20>;
161 max-cur = /bits/ 8 <0x60>;
162 reg = <0>;
163 color = <LED_COLOR_ID_RED>;
164 };
165
166 status_green: chan@1 {
167 chan-name = "green:status";
168 led-cur = /bits/ 8 <0x20>;
169 max-cur = /bits/ 8 <0x60>;
170 reg = <1>;
171 color = <LED_COLOR_ID_GREEN>;
172 };
173
174 chan@2 {
175 chan-name = "blue:status";
176 led-cur = /bits/ 8 <0x20>;
177 max-cur = /bits/ 8 <0x60>;
178 reg = <2>;
179 color = <LED_COLOR_ID_BLUE>;
180 };
181
182 chan@3 {
183 chan-name = "white:status";
184 led-cur = /bits/ 8 <0x20>;
185 max-cur = /bits/ 8 <0x60>;
186 reg = <3>;
187 color = <LED_COLOR_ID_WHITE>;
188 };
189 };
190 };
191
192 &nand {
193 pinctrl-0 = <&nand_pins>;
194 pinctrl-names = "default";
195 status = "okay";
196
197 nand@0 {
198 partitions {
199 compatible = "fixed-partitions";
200 #address-cells = <1>;
201 #size-cells = <1>;
202
203 partition@0 {
204 label = "sbl1";
205 reg = <0x00000000 0x00100000>;
206 read-only;
207 };
208 partition@100000 {
209 label = "mibib";
210 reg = <0x00100000 0x00100000>;
211 read-only;
212 };
213 partition@200000 {
214 label = "bootconfig";
215 reg = <0x00200000 0x00100000>;
216 read-only;
217 };
218 partition@300000 {
219 label = "qsee";
220 reg = <0x00300000 0x00100000>;
221 read-only;
222 };
223 partition@400000 {
224 label = "qsee_alt";
225 reg = <0x00400000 0x00100000>;
226 read-only;
227 };
228 partition@500000 {
229 label = "cdt";
230 reg = <0x00500000 0x00080000>;
231 read-only;
232 };
233 partition@580000 {
234 label = "cdt_alt";
235 reg = <0x00580000 0x00080000>;
236 read-only;
237 };
238 partition@600000 {
239 label = "ddrparams";
240 reg = <0x00600000 0x00080000>;
241 read-only;
242 };
243 partition@700000 {
244 label = "u-boot";
245 reg = <0x00700000 0x00200000>;
246 read-only;
247 };
248 partition@900000 {
249 label = "u-boot-backup";
250 reg = <0x00900000 0x00200000>;
251 read-only;
252 };
253 partition@b00000 {
254 label = "ART";
255 reg = <0x00b00000 0x00080000>;
256 read-only;
257 };
258 partition@c00000 {
259 label = "ubi";
260 reg = <0x00c00000 0x07000000>;
261 /*
262 * Do not try to allocate the remaining
263 * 4 MiB to this ubi partition. It will
264 * confuse the u-boot and it might not
265 * find the kernel partition anymore.
266 */
267 };
268 };
269 };
270 };
271
272 &pcie0 {
273 status = "okay";
274 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
275 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
276
277 bridge@0,0 {
278 reg = <0x00000000 0 0 0 0>;
279 #address-cells = <3>;
280 #size-cells = <2>;
281 ranges;
282
283 wifi2: wifi@1,0 {
284 compatible = "qcom,ath10k";
285 status = "okay";
286 reg = <0x00010000 0 0 0 0>;
287 nvmem-cells = <&mac_address>;
288 nvmem-cell-names = "mac-address";
289 mac-address-increment = <1>;
290 };
291 };
292 };
293
294 &qpic_bam {
295 status = "okay";
296 };
297
298 &tlmm {
299 /*
300 * GPIO43 should be 0/1 whenever the unit is
301 * powered through PoE or AC-Adapter.
302 * That said, playing with this seems to
303 * reset the AP.
304 */
305
306 mdio_pins: mdio_pinmux {
307 mux_1 {
308 pins = "gpio6";
309 function = "mdio";
310 bias-pull-up;
311 };
312 mux_2 {
313 pins = "gpio7";
314 function = "mdc";
315 bias-pull-up;
316 };
317 };
318
319 serial_0_pins: serial_pinmux {
320 mux {
321 pins = "gpio16", "gpio17";
322 function = "blsp_uart0";
323 bias-disable;
324 };
325 };
326
327 serial_1_pins: serial1_pinmux {
328 mux {
329 /* We use the i2c-0 pins for serial_1 */
330 pins = "gpio8", "gpio9";
331 function = "blsp_uart1";
332 bias-disable;
333 };
334 };
335
336 i2c_0_pins: i2c_0_pinmux {
337 pinmux {
338 function = "blsp_i2c0";
339 pins = "gpio20", "gpio21";
340 };
341 pinconf {
342 pins = "gpio20", "gpio21";
343 drive-strength = <16>;
344 bias-disable;
345 };
346 };
347
348 i2c_1_pins: i2c_1_pinmux {
349 pinmux {
350 function = "blsp_i2c1";
351 pins = "gpio34", "gpio35";
352 };
353 pinconf {
354 pins = "gpio34", "gpio35";
355 drive-strength = <16>;
356 bias-disable;
357 };
358 };
359
360 nand_pins: nand_pins {
361 /*
362 * There are 18 pins. 15 pins are common between LCD and NAND.
363 * The QPIC controller arbitrates between LCD and NAND. Of the
364 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
365 *
366 * The meraki source hints that the bluetooth module claims
367 * pin 52 as well. But sadly, there's no data whenever this
368 * is a NAND or LCD exclusive pin or not.
369 */
370
371 pullups {
372 pins = "gpio52", "gpio53", "gpio58",
373 "gpio59";
374 function = "qpic";
375 bias-pull-up;
376 };
377
378 pulldowns {
379 pins = "gpio54", "gpio55", "gpio56",
380 "gpio57", "gpio60", "gpio61",
381 "gpio62", "gpio63", "gpio64",
382 "gpio65", "gpio66", "gpio67",
383 "gpio68", "gpio69";
384 function = "qpic";
385 bias-pull-down;
386 };
387 };
388 };
389
390 &wifi0 {
391 status = "okay";
392 qcom,ath10k-calibration-variant = "Meraki-MR33";
393 nvmem-cells = <&mac_address>;
394 nvmem-cell-names = "mac-address";
395 mac-address-increment = <2>;
396 };
397
398 &wifi1 {
399 status = "okay";
400 qcom,ath10k-calibration-variant = "Meraki-MR33";
401 nvmem-cells = <&mac_address>;
402 nvmem-cell-names = "mac-address";
403 mac-address-increment = <3>;
404 };
405
406 &gmac {
407 status = "okay";
408 nvmem-cells = <&mac_address>;
409 nvmem-cell-names = "mac-address";
410 };
411
412 &switch {
413 status = "okay";
414
415 /delete-property/ psgmii-ethphy;
416 };
417
418 &swport5 {
419 status = "okay";
420
421 label = "lan";
422 phy-handle = <&ethphy1>;
423 phy-mode = "rgmii-rxid";
424 };
425
426 &ethphy0 {
427 status = "disabled";
428 };
429
430 &ethphy2 {
431 status = "disabled";
432 };
433
434 &ethphy3 {
435 status = "disabled";
436 };
437
438 &ethphy4 {
439 status = "disabled";
440 };
441
442 &psgmiiphy {
443 status = "disabled";
444 };