target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Device Tree Source for Meraki MR33 (Stinkbug)
   4  *
   5  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   6  * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
   7  *
   8  * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without
  12  * any warranty of any kind, whether express or implied.
  13  */
  14
  15 #include "qcom-ipq4019.dtsi"
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/input/input.h>
  18 #include <dt-bindings/soc/qcom,tcsr.h>
  19 #include <dt-bindings/leds/common.h>
  20
  21 / {
  22         model = "Meraki MR33 Access Point";
  23         compatible = "meraki,mr33";
  24
  25         aliases {
  26                 led-boot = &status_green;
  27                 led-failsafe = &status_red;
  28                 led-running = &status_green;
  29                 led-upgrade = &power_orange;
  30         };
  31
  32         /* Do we really need this defined? */
  33         memory {
  34                 device_type = "memory";
  35                 reg = <0x80000000 0x10000000>;
  36         };
  37
  38         soc {
  39                 rng@22000 {
  40                         status = "okay";
  41                 };
  42
  43                 mdio@90000 {
  44                         status = "okay";
  45                         pinctrl-0 = <&mdio_pins>;
  46                         pinctrl-names = "default";
  47                 };
  48
  49                 /* It is a 56-bit counter that supplies the count to the ARM arch
  50                    timers and without upstream driver */
  51                 counter@4a1000 {
  52                         compatible = "qcom,qca-gcnt";
  53                         reg = <0x4a1000 0x4>;
  54                 };
  55
  56                 ess_tcsr@1953000 {
  57                         compatible = "qcom,tcsr";
  58                         reg = <0x1953000 0x1000>;
  59                         qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
  60                 };
  61
  62                 tcsr@1949000 {
  63                         compatible = "qcom,tcsr";
  64                         reg = <0x1949000 0x100>;
  65                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  66                 };
  67
  68                 tcsr@1957000 {
  69                         compatible = "qcom,tcsr";
  70                         reg = <0x1957000 0x100>;
  71                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  72                 };
  73
  74                 serial@78b0000 {
  75                         pinctrl-0 = <&serial_1_pins>;
  76                         pinctrl-names = "default";
  77                         status = "okay";
  78
  79                         bluetooth {
  80                                 compatible = "ti,cc2650";
  81                                 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  82                         };
  83                 };
  84
  85                 crypto@8e3a000 {
  86                         status = "okay";
  87                 };
  88
  89                 watchdog@b017000 {
  90                         status = "okay";
  91                 };
  92
  93                 ess-switch@c000000 {
  94                         switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
  95                         switch_lan_bmp = <0x0>; /* lan port bitmap */
  96                         switch_wan_bmp = <0x10>; /* wan port bitmap */
  97                 };
  98
  99                 edma@c080000 {
 100                         qcom,single-phy;
 101                         qcom,num_gmac = <1>;
 102                         phy-mode = "rgmii-rxid";
 103                         status = "okay";
 104                 };
 105         };
 106
 107         keys {
 108                 compatible = "gpio-keys";
 109
 110                 reset {
 111                         label = "reset";
 112                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 113                         linux,code = <KEY_RESTART>;
 114                 };
 115         };
 116
 117         leds {
 118                 compatible = "gpio-leds";
 119
 120                 power_orange: power {
 121                         label = "orange:power";
 122                         gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
 123                         panic-indicator;
 124                 };
 125         };
 126 };
 127
 128 &blsp_dma {
 129         status = "okay";
 130 };
 131
 132 &blsp1_uart1 {
 133         pinctrl-0 = <&serial_0_pins>;
 134         pinctrl-names = "default";
 135         status = "okay";
 136 };
 137
 138 &cryptobam {
 139         status = "okay";
 140 };
 141
 142 &gmac0 {
 143         qcom,phy_mdio_addr = <1>;
 144         qcom,poll_required = <1>;
 145         vlan_tag = <0 0x20>;
 146 };
 147
 148 &blsp1_i2c3 {
 149         pinctrl-0 = <&i2c_0_pins>;
 150         pinctrl-names = "default";
 151         status = "okay";
 152         at24@50 {
 153                 compatible = "atmel,24c64";
 154                 pagesize = <32>;
 155                 reg = <0x50>;
 156                 read-only; /* This holds our MAC & Meraki board-data */
 157         };
 158 };
 159
 160 &blsp1_i2c4 {
 161         pinctrl-0 = <&i2c_1_pins>;
 162         pinctrl-names = "default";
 163         status = "okay";
 164
 165         led-controller@30 {
 166                 compatible = "ti,lp5562";
 167                 reg = <0x30>;
 168                 clock-mode = /bits/8 <2>;
 169                 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 170                 #address-cells = <1>;
 171                 #size-cells = <0>;
 172
 173                 /* RGB led */
 174                 status_red: chan@0 {
 175                         chan-name = "red:status";
 176                         led-cur = /bits/ 8 <0x20>;
 177                         max-cur = /bits/ 8 <0x60>;
 178                         reg = <0>;
 179                         color = <LED_COLOR_ID_RED>;
 180                 };
 181
 182                 status_green: chan@1 {
 183                         chan-name = "green:status";
 184                         led-cur = /bits/ 8 <0x20>;
 185                         max-cur = /bits/ 8 <0x60>;
 186                         reg = <1>;
 187                         color = <LED_COLOR_ID_GREEN>;
 188                 };
 189
 190                 chan@2 {
 191                         chan-name = "blue:status";
 192                         led-cur = /bits/ 8 <0x20>;
 193                         max-cur = /bits/ 8 <0x60>;
 194                         reg = <2>;
 195                         color = <LED_COLOR_ID_BLUE>;
 196                 };
 197
 198                 chan@3 {
 199                         chan-name = "white:status";
 200                         led-cur = /bits/ 8 <0x20>;
 201                         max-cur = /bits/ 8 <0x60>;
 202                         reg = <3>;
 203                         color = <LED_COLOR_ID_WHITE>;
 204                 };
 205         };
 206 };
 207
 208 &nand {
 209         pinctrl-0 = <&nand_pins>;
 210         pinctrl-names = "default";
 211         status = "okay";
 212
 213         nand@0 {
 214                 partitions {
 215                         compatible = "fixed-partitions";
 216                         #address-cells = <1>;
 217                         #size-cells = <1>;
 218
 219                         partition@0 {
 220                                 label = "sbl1";
 221                                 reg = <0x00000000 0x00100000>;
 222                                 read-only;
 223                         };
 224                         partition@100000 {
 225                                 label = "mibib";
 226                                 reg = <0x00100000 0x00100000>;
 227                                 read-only;
 228                         };
 229                         partition@200000 {
 230                                 label = "bootconfig";
 231                                 reg = <0x00200000 0x00100000>;
 232                                 read-only;
 233                         };
 234                         partition@300000 {
 235                                 label = "qsee";
 236                                 reg = <0x00300000 0x00100000>;
 237                                 read-only;
 238                         };
 239                         partition@400000 {
 240                                 label = "qsee_alt";
 241                                 reg = <0x00400000 0x00100000>;
 242                                 read-only;
 243                         };
 244                         partition@500000 {
 245                                 label = "cdt";
 246                                 reg = <0x00500000 0x00080000>;
 247                                 read-only;
 248                         };
 249                         partition@580000 {
 250                                 label = "cdt_alt";
 251                                 reg = <0x00580000 0x00080000>;
 252                                 read-only;
 253                         };
 254                         partition@600000 {
 255                                 label = "ddrparams";
 256                                 reg = <0x00600000 0x00080000>;
 257                                 read-only;
 258                         };
 259                         partition@700000 {
 260                                 label = "u-boot";
 261                                 reg = <0x00700000 0x00200000>;
 262                                 read-only;
 263                         };
 264                         partition@900000 {
 265                                 label = "u-boot-backup";
 266                                 reg = <0x00900000 0x00200000>;
 267                                 read-only;
 268                         };
 269                         partition@b00000 {
 270                                 label = "ART";
 271                                 reg = <0x00b00000 0x00080000>;
 272                                 read-only;
 273                         };
 274                         partition@c00000 {
 275                                 label = "ubi";
 276                                 reg = <0x00c00000 0x07000000>;
 277                                 /*
 278                                  * Do not try to allocate the remaining
 279                                  * 4 MiB to this ubi partition. It will
 280                                  * confuse the u-boot and it might not
 281                                  * find the kernel partition anymore.
 282                                  */
 283                         };
 284                 };
 285         };
 286 };
 287
 288 &pcie0 {
 289         status = "okay";
 290         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 291         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 292
 293         bridge@0,0 {
 294                 reg = <0x00000000 0 0 0 0>;
 295                 #address-cells = <3>;
 296                 #size-cells = <2>;
 297                 ranges;
 298
 299                 wifi2: wifi@1,0 {
 300                         compatible = "qcom,ath10k";
 301                         status = "okay";
 302                         reg = <0x00010000 0 0 0 0>;
 303                 };
 304         };
 305 };
 306
 307 &qpic_bam {
 308         status = "okay";
 309 };
 310
 311 &tlmm {
 312         /*
 313          * GPIO43 should be 0/1 whenever the unit is
 314          * powered through PoE or AC-Adapter.
 315          * That said, playing with this seems to
 316          * reset the AP.
 317          */
 318
 319         mdio_pins: mdio_pinmux {
 320                 mux_1 {
 321                         pins = "gpio6";
 322                         function = "mdio";
 323                         bias-pull-up;
 324                 };
 325                 mux_2 {
 326                         pins = "gpio7";
 327                         function = "mdc";
 328                         bias-pull-up;
 329                 };
 330         };
 331
 332         serial_0_pins: serial_pinmux {
 333                 mux {
 334                         pins = "gpio16", "gpio17";
 335                         function = "blsp_uart0";
 336                         bias-disable;
 337                 };
 338         };
 339
 340         serial_1_pins: serial1_pinmux {
 341                 mux {
 342                         /* We use the i2c-0 pins for serial_1 */
 343                         pins = "gpio8", "gpio9";
 344                         function = "blsp_uart1";
 345                         bias-disable;
 346                 };
 347         };
 348
 349         i2c_0_pins: i2c_0_pinmux {
 350                 pinmux {
 351                         function = "blsp_i2c0";
 352                         pins = "gpio20", "gpio21";
 353                 };
 354                 pinconf {
 355                         pins = "gpio20", "gpio21";
 356                         drive-strength = <16>;
 357                         bias-disable;
 358                 };
 359         };
 360
 361         i2c_1_pins: i2c_1_pinmux {
 362                 pinmux {
 363                         function = "blsp_i2c1";
 364                         pins = "gpio34", "gpio35";
 365                 };
 366                 pinconf {
 367                         pins = "gpio34", "gpio35";
 368                         drive-strength = <16>;
 369                         bias-disable;
 370                 };
 371         };
 372
 373         nand_pins: nand_pins {
 374                 /*
 375                  * There are 18 pins. 15 pins are common between LCD and NAND.
 376                  * The QPIC controller arbitrates between LCD and NAND. Of the
 377                  * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
 378                  *
 379                  * The meraki source hints that the bluetooth module claims
 380                  * pin 52 as well. But sadly, there's no data whenever this
 381                  * is a NAND or LCD exclusive pin or not.
 382                  */
 383
 384                 pullups {
 385                         pins = "gpio52", "gpio53", "gpio58",
 386                                 "gpio59";
 387                         function = "qpic";
 388                         bias-pull-up;
 389                 };
 390
 391                 pulldowns {
 392                         pins = "gpio54", "gpio55", "gpio56",
 393                                 "gpio57", "gpio60", "gpio61",
 394                                 "gpio62", "gpio63", "gpio64",
 395                                 "gpio65", "gpio66", "gpio67",
 396                                 "gpio68", "gpio69";
 397                         function = "qpic";
 398                         bias-pull-down;
 399                 };
 400         };
 401 };
 402
 403 &wifi0 {
 404         status = "okay";
 405         qcom,ath10k-calibration-variant = "Meraki-MR33";
 406 };
 407
 408 &wifi1 {
 409         status = "okay";
 410         qcom,ath10k-calibration-variant = "Meraki-MR33";
 411 };