f9ea31acb4b4af33e17ce9736d05ee0b93cb37e9
[openwrt/staging/dedeckeh.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4018-jalapeno.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 *
16 */
17
18 #include "qcom-ipq4019.dtsi"
19 #include "qcom-ipq4019-bus.dtsi"
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/soc/qcom,tcsr.h>
23
24 / {
25 model = "8devices Jalapeno";
26 compatible = "8dev,jalapeno", "qcom,ipq4019";
27
28 reserved-memory {
29 #address-cells = <0x1>;
30 #size-cells = <0x1>;
31 ranges;
32
33 smem@87e00000 {
34 reg = <0x87e00000 0x080000>;
35 no-map;
36 };
37
38 tz@87e80000 {
39 reg = <0x87e80000 0x180000>;
40 no-map;
41 };
42 };
43
44 soc {
45 mdio@90000 {
46 status = "okay";
47 pinctrl-0 = <&mdio_pins>;
48 pinctrl-names = "default";
49 };
50
51 ess-psgmii@98000 {
52 status = "okay";
53 };
54
55 counter@4a1000 {
56 compatible = "qcom,qca-gcnt";
57 reg = <0x4a1000 0x4>;
58 };
59
60 tcsr@1949000 {
61 compatible = "qcom,tcsr";
62 reg = <0x1949000 0x100>;
63 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
64 };
65
66 tcsr@194b000 {
67 /* select hostmode */
68 compatible = "qcom,tcsr";
69 reg = <0x194b000 0x100>;
70 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
71 status = "okay";
72 };
73
74 ess_tcsr@1953000 {
75 compatible = "qcom,tcsr";
76 reg = <0x1953000 0x1000>;
77 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
78 };
79
80 tcsr@1957000 {
81 compatible = "qcom,tcsr";
82 reg = <0x1957000 0x100>;
83 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
84 };
85
86 usb2: usb2@60f8800 {
87 status = "okay";
88 };
89
90 serial@78af000 {
91 pinctrl-0 = <&serial_pins>;
92 pinctrl-names = "default";
93 status = "okay";
94 };
95
96 usb3: usb3@8af8800 {
97 status = "okay";
98 };
99
100 crypto@8e3a000 {
101 status = "okay";
102 };
103
104 watchdog@b017000 {
105 status = "okay";
106 };
107
108 ess-switch@c000000 {
109 status = "okay";
110 switch_lan_bmp = <0x10>; /* lan port bitmap */
111 };
112
113 edma@c080000 {
114 status = "okay";
115 };
116 };
117 };
118
119 &tlmm {
120 mdio_pins: mdio_pinmux {
121 pinmux_1 {
122 pins = "gpio53";
123 function = "mdio";
124 };
125 pinmux_2 {
126 pins = "gpio52";
127 function = "mdc";
128 };
129 pinconf {
130 pins = "gpio52", "gpio53";
131 bias-pull-up;
132 };
133 };
134
135 serial_pins: serial_pinmux {
136 mux {
137 pins = "gpio60", "gpio61";
138 function = "blsp_uart0";
139 bias-disable;
140 };
141 };
142
143 spi_0_pins: spi_0_pinmux {
144 pin {
145 function = "blsp_spi0";
146 pins = "gpio55", "gpio56", "gpio57";
147 drive-strength = <2>;
148 bias-disable;
149 };
150 pin_cs {
151 function = "gpio";
152 pins = "gpio54", "gpio59";
153 drive-strength = <2>;
154 bias-disable;
155 output-high;
156 };
157 };
158 };
159
160 &blsp_dma {
161 status = "okay";
162 };
163
164 &spi_0 {
165 pinctrl-0 = <&spi_0_pins>;
166 pinctrl-names = "default";
167 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
168 status = "okay";
169
170 m25p80@0 {
171 #address-cells = <1>;
172 #size-cells = <0>;
173 reg = <0>;
174 compatible = "jedec,spi-nor";
175 spi-max-frequency = <24000000>;
176
177 partitions {
178 compatible = "fixed-partitions";
179 #address-cells = <1>;
180 #size-cells = <1>;
181
182 partition0@0 {
183 label = "SBL1";
184 reg = <0x00000000 0x00040000>;
185 read-only;
186 };
187 partition1@40000 {
188 label = "MIBIB";
189 reg = <0x00040000 0x00020000>;
190 read-only;
191 };
192 partition2@60000 {
193 label = "QSEE";
194 reg = <0x00060000 0x00060000>;
195 read-only;
196 };
197 partition3@c0000 {
198 label = "CDT";
199 reg = <0x000c0000 0x00010000>;
200 read-only;
201 };
202 partition4@d0000 {
203 label = "DDRPARAMS";
204 reg = <0x000d0000 0x00010000>;
205 read-only;
206 };
207 partition5@e0000 {
208 label = "APPSBLENV"; /* uboot env*/
209 reg = <0x000e0000 0x00010000>;
210 read-only;
211 };
212 partition5@f0000 {
213 label = "APPSBL"; /* uboot */
214 reg = <0x000f0000 0x00080000>;
215 read-only;
216 };
217 partition5@170000 {
218 label = "ART";
219 reg = <0x00170000 0x00010000>;
220 read-only;
221 };
222 };
223 };
224
225 mt29f@1 {
226 status = "okay";
227 #address-cells = <1>;
228 #size-cells = <0>;
229 compatible = "spinand,mt29f", "w25n01gv";
230 reg = <1>;
231 spi-max-frequency = <24000000>;
232 partitions {
233 compatible = "fixed-partitions";
234 #address-cells = <1>;
235 #size-cells = <1>;
236
237 partition0@0 {
238 label = "ubi";
239 reg = <0x00000000 0x08000000>;
240 };
241 };
242 };
243 };
244
245 &cryptobam {
246 status = "okay";
247 };
248
249 &gmac0 {
250 qcom,poll_required = <1>;
251 qcom,poll_required_dynamic = <1>;
252 qcom,phy_mdio_addr = <3>;
253 vlan_tag = <1 0x10>;
254 };
255
256 &gmac1 {
257 qcom,poll_required = <1>;
258 qcom,poll_required_dynamic = <1>;
259 qcom,phy_mdio_addr = <4>;
260 vlan_tag = <2 0x20>;
261 };
262
263 &wifi0 {
264 status = "okay";
265 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
266 };
267
268 &wifi1 {
269 status = "okay";
270 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
271 };
272
273 &usb3_ss_phy {
274 status = "okay";
275 };
276
277 &usb3_hs_phy {
278 status = "okay";
279 };
280
281 &usb2_hs_phy {
282 status = "okay";
283 };