88ea370858859ee6068e986170e023a93268c683
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4028-wpj428.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
3 * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 */
18
19 #include "qcom-ipq4019.dtsi"
20 #include "qcom-ipq4019-bus.dtsi"
21 #include <dt-bindings/gpio/gpio.h>
22 #include <dt-bindings/input/input.h>
23 #include <dt-bindings/soc/qcom,tcsr.h>
24
25 / {
26 model = "Compex WPJ428";
27 compatible = "compex,wpj428", "qcom,ipq4019";
28
29 reserved-memory {
30 #address-cells = <0x1>;
31 #size-cells = <0x1>;
32 ranges;
33
34 tz_apps@87b80000 {
35 reg = <0x87b80000 0x280000>;
36 no-map;
37 };
38
39 smem@87e00000 {
40 reg = <0x87e00000 0x080000>;
41 no-map;
42 };
43
44 tz@87e80000 {
45 reg = <0x87e80000 0x180000>;
46 no-map;
47 };
48 };
49
50 soc {
51 mdio@90000 {
52 status = "okay";
53 };
54
55 ess-psgmii@98000 {
56 status = "okay";
57 };
58
59 tcsr@194b000 {
60 /* select hostmode */
61 compatible = "qcom,tcsr";
62 reg = <0x194b000 0x100>;
63 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
64 status = "okay";
65 };
66
67 tcsr@1949000 {
68 compatible = "qcom,tcsr";
69 reg = <0x1949000 0x100>;
70 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
71 };
72
73 ess_tcsr@1953000 {
74 compatible = "qcom,tcsr";
75 reg = <0x1953000 0x1000>;
76 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
77 };
78
79 tcsr@1957000 {
80 compatible = "qcom,tcsr";
81 reg = <0x1957000 0x100>;
82 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
83 };
84
85 usb2: usb2@60f8800 {
86 status = "okay";
87 };
88
89 serial@78af000 {
90 pinctrl-0 = <&serial_pins>;
91 pinctrl-names = "default";
92 status = "okay";
93 };
94
95 usb3: usb3@8af8800 {
96 status = "okay";
97 };
98
99 crypto@8e3a000 {
100 status = "okay";
101 };
102
103 watchdog@b017000 {
104 status = "okay";
105 };
106
107 ess-switch@c000000 {
108 switch_lan_bmp = <0x10>;
109 switch_wan_bmp = <0x20>;
110
111 status = "okay";
112 };
113
114 edma@c080000 {
115 status = "okay";
116 };
117 };
118
119 gpio-keys {
120 compatible = "gpio-keys";
121
122 reset {
123 label = "reset";
124 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
125 linux,code = <KEY_RESTART>;
126 };
127 };
128
129 aliases {
130 led-boot = &status;
131 led-failsafe = &status;
132 led-upgrade = &status;
133 };
134
135 gpio-leds {
136 compatible = "gpio-leds";
137
138 status: rss4 {
139 label = "wpj428:green:rss4";
140 gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
141 default-state = "off";
142 };
143
144 rss3 {
145 label = "wpj428:green:rss3";
146 gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
147 default-state = "off";
148 };
149 };
150
151 beeper: beeper {
152 compatible = "gpio-beeper";
153 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
154 };
155 };
156
157 &tlmm {
158 serial_pins: serial_pinmux {
159 mux {
160 pins = "gpio60", "gpio61";
161 function = "blsp_uart0";
162 bias-disable;
163 };
164 };
165
166 spi_0_pins: spi_0_pinmux {
167 pin {
168 function = "blsp_spi0";
169 pins = "gpio55", "gpio56", "gpio57";
170 drive-strength = <12>;
171 bias-disable;
172 };
173 pin_cs {
174 function = "gpio";
175 pins = "gpio54";
176 drive-strength = <2>;
177 bias-disable;
178 output-high;
179 };
180 };
181 };
182
183 &blsp_dma {
184 status = "okay";
185 };
186
187 &spi_0 {
188 pinctrl-0 = <&spi_0_pins>;
189 pinctrl-names = "default";
190 status = "okay";
191 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
192
193 m25p80@0 {
194 #address-cells = <1>;
195 #size-cells = <1>;
196 compatible = "jedec,spi-nor";
197 reg = <0>;
198 spi-max-frequency = <24000000>;
199
200 partitions {
201 compatible = "fixed-partitions";
202 #address-cells = <1>;
203 #size-cells = <1>;
204
205 partition0@0 {
206 label = "0:SBL1";
207 reg = <0x00000000 0x00040000>;
208 read-only;
209 };
210 partition1@40000 {
211 label = "0:MIBIB";
212 reg = <0x00040000 0x00020000>;
213 read-only;
214 };
215 partition2@60000 {
216 label = "0:QSEE";
217 reg = <0x00060000 0x00060000>;
218 read-only;
219 };
220 partition3@c0000 {
221 label = "0:CDT";
222 reg = <0x000c0000 0x00010000>;
223 read-only;
224 };
225 partition4@d0000 {
226 label = "0:DDRPARAMS";
227 reg = <0x000d0000 0x00010000>;
228 read-only;
229 };
230 partition5@e0000 {
231 label = "0:APPSBLENV"; /* uboot env*/
232 reg = <0x000e0000 0x00010000>;
233 read-only;
234 };
235 partition5@f0000 {
236 label = "0:APPSBL"; /* uboot */
237 reg = <0x000f0000 0x00080000>;
238 read-only;
239 };
240 partition5@170000 {
241 label = "0:ART";
242 reg = <0x00170000 0x00010000>;
243 read-only;
244 };
245 partition6@180000 {
246 label = "firmware";
247 reg = <0x00180000 0x01e80000>;
248 };
249 };
250 };
251 };
252
253 &cryptobam {
254 status = "okay";
255 };
256
257 &gmac0 {
258 qcom,phy_mdio_addr = <4>;
259 qcom,poll_required = <1>;
260 qcom,forced_speed = <1000>;
261 qcom,forced_duplex = <1>;
262 vlan_tag = <2 0x20>;
263 };
264
265 &gmac1 {
266 qcom,phy_mdio_addr = <3>;
267 qcom,poll_required = <1>;
268 qcom,forced_speed = <1000>;
269 qcom,forced_duplex = <1>;
270 vlan_tag = <1 0x10>;
271 };
272
273 &usb3_ss_phy {
274 status = "okay";
275 };
276
277 &usb3_hs_phy {
278 status = "okay";
279 };
280
281 &usb2_hs_phy {
282 status = "okay";
283 };
284
285 &wifi0 {
286 status = "okay";
287 };
288
289 &wifi1 {
290 status = "okay";
291 };