1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 #include "qcom-ipq4029-aruba-glenmorangie.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
7 model = "Aruba AP-365";
8 compatible = "aruba,ap-365";
11 led-boot = &led_system_green;
12 led-failsafe = &led_system_red;
13 led-running = &led_system_green;
14 led-upgrade = &led_system_red;
18 compatible = "gpio-leds";
20 led_system_red: system_red {
21 label = "ap-365:red:system";
22 gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
25 led_system_green: system_green {
26 label = "ap-365:green:system";
27 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
31 label = "ap-365:amber:system";
32 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
37 compatible = "linux,wdt-gpio";
38 gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
40 hw_margin_ms = <1000>;
47 * In addition to the Pins listed below,
48 * the following GPIOs have "features":
49 * 39 - out - pulse low to reset watchdog status flipflop
50 * 40 - out - active high to enable watchdog
51 * 41 - out - watchdog poke
52 * 42 - out - active low to reset BLE radio
53 * 43 - out - active low to reset TPM
54 * 47 - out - pulse low to reset warm reset status
55 * 54 - out - active low to force HW reset
56 * 18 - in - PHY interrupt line
57 * 45 - in - power monitor interrupt
58 * 48 - in - active low when cold reset
59 * 52 - in - active high when watchdog reset
63 line-name = "PHY-reset";
64 gpios = <42 GPIO_ACTIVE_HIGH>;
73 compatible = "isl,isl28022";
77 temperature-sensor@48 {
78 compatible = "adi,ad7416";
84 pinctrl-0 = <&spi_0_pins>;
85 pinctrl-names = "default";
87 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
90 compatible = "jedec,spi-nor";
92 spi-max-frequency = <24000000>;
95 compatible = "fixed-partitions";
100 * There is no partition map for the NOR flash
101 * in the stock firmware.
103 * All partitions here are based on offsets
104 * found in the U-Boot GPL code and information
116 reg = <0x40000 0x20000>;
122 reg = <0x60000 0x60000>;
128 reg = <0xc0000 0x10000>;
134 reg = <0xd0000 0x10000>;
139 label = "u-boot-env";
140 reg = <0xe0000 0x10000>;
146 reg = <0xf0000 0x100000>;
152 reg = <0x1f0000 0x10000>;
158 reg = <0x200000 0x170000>;
164 reg = <0x370000 0x10000>;
170 reg = <0x380000 0x10000>;
176 reg = <0x390000 0x10000>;
182 reg = <0x3a0000 0x10000>;
188 reg = <0x3b0000 0x50000>;