1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
13 compatible = "zte,mf289f";
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 bootargs-append = " root=/dev/ubiblock0_1";
31 * This node is used to restart modem module to avoid anomalous
32 * behaviours on initial communication.
35 compatible = "gpio-restart";
36 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
40 compatible = "gpio-leds";
43 function = LED_FUNCTION_POWER;
44 color = <LED_COLOR_ID_BLUE>;
45 gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
49 function = LED_FUNCTION_WLAN;
50 color = <LED_COLOR_ID_BLUE>;
51 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
52 linux,default-trigger = "phy0tpt";
57 compatible = "gpio-keys";
61 linux,code = <KEY_RESTART>;
62 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
67 linux,code = <KEY_WPS_BUTTON>;
68 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
74 compatible = "qcom,tcsr";
75 reg = <0x1949000 0x100>;
76 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
81 compatible = "qcom,tcsr";
82 reg = <0x194b000 0x100>;
83 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
88 compatible = "qcom,tcsr";
89 reg = <0x1953000 0x1000>;
90 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
94 compatible = "qcom,tcsr";
95 reg = <0x1957000 0x100>;
96 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
107 pinctrl-0 = <&mdio_pins>;
108 pinctrl-names = "default";
109 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
110 reset-delay-us = <2000>;
130 pinctrl-0 = <&spi_0_pins>;
131 pinctrl-names = "default";
133 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
134 <&tlmm 54 GPIO_ACTIVE_HIGH>;
137 compatible = "jedec,spi-nor";
138 #address-cells = <1>;
141 spi-max-frequency = <24000000>;
144 compatible = "fixed-partitions";
145 #address-cells = <1>;
156 reg = <0x40000 0x20000>;
162 reg = <0x60000 0x60000>;
168 reg = <0xc0000 0x10000>;
173 label = "0:DDRPARAMS";
174 reg = <0xd0000 0x10000>;
179 label = "0:APPSBLENV";
180 reg = <0xe0000 0x10000>;
186 reg = <0xf0000 0xc0000>;
191 label = "0:reserved1";
192 reg = <0x1b0000 0x50000>;
198 spi-nand@1 { /* flash@1 ? */
199 compatible = "spi-nand";
201 spi-max-frequency = <24000000>;
204 compatible = "fixed-partitions";
205 #address-cells = <1>;
216 reg = <0xa0000 0x80000>;
220 compatible = "fixed-layout";
221 #address-cells = <1>;
224 precal_art_1000: precal@1000 {
225 reg = <0x1000 0x2f20>;
228 precal_art_5000: precal@5000 {
229 reg = <0x5000 0x2f20>;
236 reg = <0x120000 0x80000>;
240 compatible = "fixed-layout";
241 #address-cells = <1>;
244 macaddr_mac_0: macaddr@0 {
245 compatible = "mac-base";
247 #nvmem-cell-cells = <1>;
254 reg = <0x1a0000 0xc0000>;
260 reg = <0x260000 0x400000>;
266 reg = <0x660000 0x400000>;
271 reg = <0xa60000 0xa0000>;
276 reg = <0xb00000 0x500000>;
282 reg = <0x1000000 0x800000>;
287 reg = <0x1800000 0x1d00000>;
292 reg = <0x3500000 0x1900000>;
297 reg = <0x4e00000 0x3200000>;
304 pinctrl-0 = <&serial_pins>;
305 pinctrl-names = "default";
319 nvmem-cell-names = "mac-address";
320 nvmem-cells = <&macaddr_mac_0 0>;
332 nvmem-cell-names = "mac-address";
333 nvmem-cells = <&macaddr_mac_0 1>;
347 i2c_0_pins: i2c_0_pinmux {
349 pins = "gpio20", "gpio21";
350 function = "blsp_i2c0";
355 mdio_pins: mdio_pinmux {
369 serial_pins: serial_pinmux {
371 pins = "gpio16", "gpio17";
372 function = "blsp_uart0";
377 spi_0_pins: spi_0_pinmux {
379 function = "blsp_spi0";
380 pins = "gpio13", "gpio14", "gpio15";
381 drive-strength = <12>;
387 pins = "gpio12", "gpio54";
388 drive-strength = <2>;
409 nvmem-cell-names = "pre-calibration", "mac-address";
410 nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0 2>;
411 qcom,ath10k-calibration-variant = "zte,mf289f";
414 /* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
417 nvmem-cell-names = "pre-calibration", "mac-address";
418 nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0 3>;
419 qcom,ath10k-calibration-variant = "zte,mf289f";
422 /* This node is used only on AT1 version for 5Ghz on QCA9984 */
425 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
426 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
427 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
430 reg = <0x00000000 0 0 0 0>;
431 #address-cells = <3>;
436 nvmem-cell-names = "mac-address";
437 nvmem-cells = <&macaddr_mac_0 4>;
438 compatible = "qcom,ath10k";
439 reg = <0x00010000 0 0 0 0>;
440 qcom,ath10k-calibration-variant = "zte,mf289f";