1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/leds/common.h>
11 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
16 led-failsafe = &led_sys;
17 led-running = &led_sys;
18 led-upgrade = &led_sys;
28 pinctrl-0 = <&mdio_pins>;
29 pinctrl-names = "default";
33 compatible = "qcom,tcsr";
34 reg = <0x1949000 0x100>;
35 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
39 compatible = "qcom,tcsr";
40 reg = <0x194b000 0x100>;
41 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
45 compatible = "qcom,tcsr";
46 reg = <0x1953000 0x1000>;
47 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
51 compatible = "qcom,tcsr";
52 reg = <0x1957000 0x100>;
53 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
74 compatible = "gpio-leds";
77 gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
78 color = <LED_COLOR_ID_BLUE>;
79 function = LED_FUNCTION_POWER;
83 gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
84 linux,default-trigger = "phy0tpt";
85 color = <LED_COLOR_ID_BLUE>;
86 function = LED_FUNCTION_WLAN;
87 function-enumerator = <0>;
91 gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
92 linux,default-trigger = "phy1tpt";
93 color = <LED_COLOR_ID_BLUE>;
94 function = LED_FUNCTION_WLAN;
95 function-enumerator = <1>;
100 compatible = "gpio-keys";
104 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
105 linux,code = <KEY_RESTART>;
119 compatible = "jedec,spi-nor";
120 spi-max-frequency = <24000000>;
123 compatible = "fixed-partitions";
124 #address-cells = <1>;
135 reg = <0x40000 0x20000>;
141 reg = <0x60000 0x60000>;
147 reg = <0xc0000 0x10000>;
153 reg = <0xd0000 0x10000>;
159 reg = <0xe0000 0x10000>;
165 reg = <0xf0000 0x80000>;
171 reg = <0x170000 0x10000>;
175 compatible = "fixed-layout";
176 #address-cells = <1>;
179 precal_art_1000: precal@1000 {
180 reg = <0x1000 0x2f20>;
183 precal_art_5000: precal@5000 {
184 reg = <0x5000 0x2f20>;
197 compatible = "fixed-partitions";
198 #address-cells = <1>;
201 nand_rootfs: partition@0 {
203 /* reg defined in 64M/128M variant dts. */
210 pinctrl-0 = <&serial_0_pins>;
211 pinctrl-names = "default";
221 pinctrl-names = "default";
222 pinctrl-0 = <&pcie_pins>;
223 perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
224 wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
226 /* Free slot for use */
228 reg = <0x00000000 0 0 0 0>;
229 #address-cells = <3>;
240 pinctrl-0 = <&sd_0_pins>;
241 pinctrl-names = "default";
242 vqmmc-supply = <&vqmmc>;
247 pcie_pins: pcie_pinmux {
256 mdio_pins: mdio_pinmux {
270 sd_0_pins: sd_0_pinmux {
272 pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
274 drive-strength = <10>;
280 drive-strength = <16>;
284 serial_0_pins: serial0-pinmux {
286 pins = "gpio16", "gpio17";
287 function = "blsp_uart0";
294 qcom,single-led-1000;
300 qcom,single-led-1000;
306 qcom,single-led-1000;
312 qcom,single-led-1000;
318 qcom,single-led-1000;
377 nvmem-cell-names = "pre-calibration";
378 nvmem-cells = <&precal_art_1000>;
379 qcom,ath10k-calibration-variant = "P&W-R619AC";
384 nvmem-cell-names = "pre-calibration";
385 nvmem-cells = <&precal_art_5000>;
386 qcom,ath10k-calibration-variant = "P&W-R619AC";