1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
9 model = "Aruba AP-303H";
10 compatible = "aruba,ap-303h";
13 led-boot = &led_system_green;
14 led-failsafe = &led_system_red;
15 led-running = &led_system_green;
16 led-upgrade = &led_system_amber;
20 device_type = "memory";
21 reg = <0x80000000 0x10000000>;
31 pinctrl-0 = <&mdio_pins>;
32 pinctrl-names = "default";
34 reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
35 reset-delay-us = <2000>;
39 compatible = "qcom,qca-gcnt";
44 compatible = "qcom,tcsr";
45 reg = <0x1953000 0x1000>;
46 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
50 compatible = "qcom,tcsr";
51 reg = <0x1949000 0x100>;
52 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
56 compatible = "qcom,tcsr";
57 reg = <0x194b000 0x100>;
58 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
62 compatible = "qcom,tcsr";
63 reg = <0x1957000 0x100>;
64 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
80 pinctrl-0 = <&i2c_0_pins>;
81 pinctrl-names = "default";
86 compatible = "atmel,at97sc3203";
93 compatible = "isl,isl28022";
100 compatible = "gpio-leds";
103 label = "green:wifi";
104 gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
105 linux,default-trigger = "phy0tpt";
109 label = "amber:wifi";
110 gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
111 linux,default-trigger = "phy1tpt";
116 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
119 led_system_red: system_red {
120 label = "red:system";
121 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
124 led_system_green: system_green {
125 label = "green:system";
126 gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
129 led_system_amber: system_amber {
130 label = "amber:system";
131 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
136 compatible = "gpio-keys";
139 label = "Reset button";
140 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
141 linux,code = <KEY_RESTART>;
151 pinctrl-0 = <&serial_0_pins>;
152 pinctrl-names = "default";
157 /* Texas Instruments CC2540T BLE radio */
158 pinctrl-0 = <&serial_1_pins>;
159 pinctrl-names = "default";
173 * In addition to the Pins listed below,
174 * the following GPIOs have "features":
175 * 39 - out - active low to force HW reset
176 * 32 - out - active low to reset TPM
177 * 43 - out - active low to reset BLE radio
178 * 41 - out - pulse to set warm reset status
179 * 34 - out - active low to enable PSE port
180 * 22 - in - active low when 802.3at powered
181 * 29 - in - active high when DC powered
182 * 40 - in - active low when reset due to cold HW reset
183 * 30 - in - active low when USB overcurrent detected
184 * 35 - in - interrupt line for power monitor chip
185 * 31 - in - active low when PSE port active
187 mdio_pins: mdio_pinmux {
200 spi_0_pins: spi_0_pinmux {
202 function = "blsp_spi0";
203 pins = "gpio13", "gpio14", "gpio15";
204 drive-strength = <12>;
209 pins = "gpio12", "gpio59";
210 drive-strength = <2>;
216 i2c_0_pins: i2c_0_pinmux {
218 pins = "gpio20", "gpio21";
219 function = "blsp_i2c0";
220 drive-strength = <4>;
225 serial_0_pins: serial_0_pinmux {
227 pins = "gpio16", "gpio17";
228 function = "blsp_uart0";
233 serial_1_pins: serial_1_pinmux {
235 pins = "gpio8", "gpio9";
236 function = "blsp_uart1";
242 line-name = "USB-power";
243 gpios = <23 GPIO_ACTIVE_HIGH>;
250 pinctrl-0 = <&spi_0_pins>;
251 pinctrl-names = "default";
253 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
256 compatible = "jedec,spi-nor";
258 spi-max-frequency = <24000000>;
261 compatible = "fixed-partitions";
262 #address-cells = <1>;
266 * There is no partition map for the NOR flash
267 * in the stock firmware.
269 * All partitions here are based on offsets
270 * found in the U-Boot GPL code and information
282 reg = <0x40000 0x20000>;
288 reg = <0x60000 0x60000>;
294 reg = <0xc0000 0x10000>;
300 reg = <0xd0000 0x10000>;
306 reg = <0xe0000 0x10000>;
312 reg = <0xf0000 0x100000>;
318 reg = <0x1f0000 0x10000>;
322 compatible = "fixed-layout";
323 #address-cells = <1>;
326 precal_art_1000: precal@1000 {
327 reg = <0x1000 0x2f20>;
330 precal_art_5000: precal@5000 {
331 reg = <0x5000 0x2f20>;
338 reg = <0x200000 0x170000>;
344 reg = <0x370000 0x10000>;
350 reg = <0x380000 0x10000>;
356 reg = <0x390000 0x10000>;
360 compatible = "fixed-layout";
361 #address-cells = <1>;
364 macaddr_mfginfo_1d: macaddr@1d {
368 macaddr_mfginfo_45: macaddr@45 {
369 compatible = "mac-base";
371 #nvmem-cell-cells = <1>;
378 reg = <0x3a0000 0x10000>;
383 /* Called osss1 in smem */
384 label = "u-boot-env-bak";
385 reg = <0x3b0000 0x10000>;
390 label = "u-boot-env";
391 reg = <0x3c0000 0x40000>;
400 compatible = "spi-nand";
402 spi-max-frequency = <24000000>;
405 compatible = "fixed-partitions";
406 #address-cells = <1>;
410 /* 'aos0' in Aruba firmware */
412 reg = <0x0 0x2000000>;
417 /* 'aos1' in Aruba firmware */
419 reg = <0x2000000 0x2000000>;
423 label = "aruba-ubifs";
424 reg = <0x4000000 0x4000000>;
469 nvmem-cell-names = "pre-calibration", "mac-address";
470 nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45 0>;
471 qcom,ath10k-calibration-variant = "Aruba-AP-303";
476 nvmem-cell-names = "pre-calibration", "mac-address";
477 nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45 1>;
478 qcom,ath10k-calibration-variant = "Aruba-AP-303";